gem5  v21.1.0.2
RubyPort.cc
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1 /*
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14  * Copyright (c) 2009-2013 Advanced Micro Devices, Inc.
15  * Copyright (c) 2011 Mark D. Hill and David A. Wood
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41 
43 
44 #include "base/compiler.hh"
46 #include "debug/Config.hh"
47 #include "debug/Drain.hh"
48 #include "debug/Ruby.hh"
49 #include "mem/ruby/protocol/AccessPermission.hh"
51 #include "mem/simple_mem.hh"
52 #include "sim/full_system.hh"
53 #include "sim/system.hh"
54 
55 namespace gem5
56 {
57 
58 namespace ruby
59 {
60 
62  : ClockedObject(p), m_ruby_system(p.ruby_system), m_version(p.version),
63  m_controller(NULL), m_mandatory_q_ptr(NULL),
64  m_usingRubyTester(p.using_ruby_tester), system(p.system),
65  pioRequestPort(csprintf("%s.pio-request-port", name()), this),
66  pioResponsePort(csprintf("%s.pio-response-port", name()), this),
67  memRequestPort(csprintf("%s.mem-request-port", name()), this),
68  memResponsePort(csprintf("%s-mem-response-port", name()), this,
69  p.ruby_system->getAccessBackingStore(), -1,
70  p.no_retry_on_stall),
71  gotAddrRanges(p.port_interrupt_out_port_connection_count),
72  m_isCPUSequencer(p.is_cpu_sequencer)
73 {
74  assert(m_version != -1);
75 
76  // create the response ports based on the number of connected ports
77  for (size_t i = 0; i < p.port_in_ports_connection_count; ++i) {
79  ("%s.response_ports%d", name(), i), this,
80  p.ruby_system->getAccessBackingStore(),
81  i, p.no_retry_on_stall));
82  }
83 
84  // create the request ports based on the number of connected ports
85  for (size_t i = 0; i < p.port_interrupt_out_port_connection_count; ++i) {
87  "%s.request_ports%d", name(), i), this));
88  }
89 }
90 
91 void
93 {
94  assert(m_controller != NULL);
96  for (const auto &response_port : response_ports)
97  response_port->sendRangeChange();
98 }
99 
100 Port &
101 RubyPort::getPort(const std::string &if_name, PortID idx)
102 {
103  if (if_name == "mem_request_port") {
104  return memRequestPort;
105  } else if (if_name == "pio_request_port") {
106  return pioRequestPort;
107  } else if (if_name == "mem_response_port") {
108  return memResponsePort;
109  } else if (if_name == "pio_response_port") {
110  return pioResponsePort;
111  } else if (if_name == "interrupt_out_port") {
112  // used by the x86 CPUs to connect the interrupt PIO and interrupt
113  // response port
114  if (idx >= static_cast<PortID>(request_ports.size())) {
115  panic("%s: unknown %s index (%d)\n", __func__, if_name, idx);
116  }
117 
118  return *request_ports[idx];
119  } else if (if_name == "in_ports") {
120  // used by the CPUs to connect the caches to the interconnect, and
121  // for the x86 case also the interrupt request port
122  if (idx >= static_cast<PortID>(response_ports.size())) {
123  panic("%s: unknown %s index (%d)\n", __func__, if_name, idx);
124  }
125 
126  return *response_ports[idx];
127  }
128 
129  // pass it along to our super class
130  return ClockedObject::getPort(if_name, idx);
131 }
132 
134  RubyPort *_port)
135  : QueuedRequestPort(_name, _port, reqQueue, snoopRespQueue),
136  reqQueue(*_port, *this), snoopRespQueue(*_port, *this)
137 {
138  DPRINTF(RubyPort, "Created request pioport on sequencer %s\n", _name);
139 }
140 
142  RubyPort *_port)
143  : QueuedResponsePort(_name, _port, queue), queue(*_port, *this)
144 {
145  DPRINTF(RubyPort, "Created response pioport on sequencer %s\n", _name);
146 }
147 
149  RubyPort *_port)
150  : QueuedRequestPort(_name, _port, reqQueue, snoopRespQueue),
151  reqQueue(*_port, *this), snoopRespQueue(*_port, *this)
152 {
153  DPRINTF(RubyPort, "Created request memport on ruby sequencer %s\n", _name);
154 }
155 
158  bool _access_backing_store, PortID id,
159  bool _no_retry_on_stall)
160  : QueuedResponsePort(_name, _port, queue, id), queue(*_port, *this),
161  access_backing_store(_access_backing_store),
162  no_retry_on_stall(_no_retry_on_stall)
163 {
164  DPRINTF(RubyPort, "Created response memport on ruby sequencer %s\n",
165  _name);
166 }
167 
168 bool
170 {
171  RubyPort *rp = static_cast<RubyPort *>(&owner);
172  DPRINTF(RubyPort, "Response for address: 0x%#x\n", pkt->getAddr());
173 
174  // send next cycle
176  pkt, curTick() + rp->m_ruby_system->clockPeriod());
177  return true;
178 }
179 
181 {
182  // got a response from a device
183  assert(pkt->isResponse());
184  assert(!pkt->htmTransactionFailedInCache());
185 
186  // First we must retrieve the request port from the sender State
187  RubyPort::SenderState *senderState =
188  safe_cast<RubyPort::SenderState *>(pkt->popSenderState());
189  MemResponsePort *port = senderState->port;
190  assert(port != NULL);
191  delete senderState;
192 
193  // In FS mode, ruby memory will receive pio responses from devices
194  // and it must forward these responses back to the particular CPU.
195  DPRINTF(RubyPort, "Pio response for address %#x, going to %s\n",
196  pkt->getAddr(), port->name());
197 
198  // attempt to send the response in the next cycle
199  RubyPort *rp = static_cast<RubyPort *>(&owner);
200  port->schedTimingResp(pkt, curTick() + rp->m_ruby_system->clockPeriod());
201 
202  return true;
203 }
204 
205 bool
207 {
208  RubyPort *ruby_port = static_cast<RubyPort *>(&owner);
209 
210  for (size_t i = 0; i < ruby_port->request_ports.size(); ++i) {
211  AddrRangeList l = ruby_port->request_ports[i]->getAddrRanges();
212  for (auto it = l.begin(); it != l.end(); ++it) {
213  if (it->contains(pkt->getAddr())) {
214  // generally it is not safe to assume success here as
215  // the port could be blocked
216  GEM5_VAR_USED bool success =
217  ruby_port->request_ports[i]->sendTimingReq(pkt);
218  assert(success);
219  return true;
220  }
221  }
222  }
223  panic("Should never reach here!\n");
224 }
225 
226 Tick
228 {
229  RubyPort *ruby_port = static_cast<RubyPort *>(&owner);
230  // Only atomic_noncaching mode supported!
231  if (!ruby_port->system->bypassCaches()) {
232  panic("Ruby supports atomic accesses only in noncaching mode\n");
233  }
234 
235  for (size_t i = 0; i < ruby_port->request_ports.size(); ++i) {
236  AddrRangeList l = ruby_port->request_ports[i]->getAddrRanges();
237  for (auto it = l.begin(); it != l.end(); ++it) {
238  if (it->contains(pkt->getAddr())) {
239  return ruby_port->request_ports[i]->sendAtomic(pkt);
240  }
241  }
242  }
243  panic("Could not find address in Ruby PIO address ranges!\n");
244 }
245 
246 bool
248 {
249  DPRINTF(RubyPort, "Timing request for address %#x on port %d\n",
250  pkt->getAddr(), id);
251  RubyPort *ruby_port = static_cast<RubyPort *>(&owner);
252 
253  if (pkt->cacheResponding())
254  panic("RubyPort should never see request with the "
255  "cacheResponding flag set\n");
256 
257  // ruby doesn't support cache maintenance operations at the
258  // moment, as a workaround, we respond right away
259  if (pkt->req->isCacheMaintenance()) {
260  warn_once("Cache maintenance operations are not supported in Ruby.\n");
261  pkt->makeResponse();
262  schedTimingResp(pkt, curTick());
263  return true;
264  }
265  // Check for pio requests and directly send them to the dedicated
266  // pio port.
267  if (pkt->cmd != MemCmd::MemSyncReq) {
268  if (!isPhysMemAddress(pkt)) {
269  assert(!pkt->req->isHTMCmd());
270  assert(ruby_port->memRequestPort.isConnected());
271  DPRINTF(RubyPort, "Request address %#x assumed to be a "
272  "pio address\n", pkt->getAddr());
273 
274  // Save the port in the sender state object to be used later to
275  // route the response
276  pkt->pushSenderState(new SenderState(this));
277 
278  // send next cycle
279  RubySystem *rs = ruby_port->m_ruby_system;
280  ruby_port->memRequestPort.schedTimingReq(pkt,
281  curTick() + rs->clockPeriod());
282  return true;
283  }
284  }
285 
286  // Save the port in the sender state object to be used later to
287  // route the response
288  pkt->pushSenderState(new SenderState(this));
289 
290  // Submit the ruby request
291  RequestStatus requestStatus = ruby_port->makeRequest(pkt);
292 
293  // If the request successfully issued then we should return true.
294  // Otherwise, we need to tell the port to retry at a later point
295  // and return false.
296  if (requestStatus == RequestStatus_Issued) {
297  DPRINTF(RubyPort, "Request %s 0x%x issued\n", pkt->cmdString(),
298  pkt->getAddr());
299  return true;
300  }
301 
302  // pop off sender state as this request failed to issue
303  SenderState *ss = safe_cast<SenderState *>(pkt->popSenderState());
304  delete ss;
305 
306  if (pkt->cmd != MemCmd::MemSyncReq) {
308  "Request %s for address %#x did not issue because %s\n",
309  pkt->cmdString(), pkt->getAddr(),
310  RequestStatus_to_string(requestStatus));
311  }
312 
313  addToRetryList();
314 
315  return false;
316 }
317 
318 Tick
320 {
321  RubyPort *ruby_port = static_cast<RubyPort *>(&owner);
322  // Only atomic_noncaching mode supported!
323  if (!ruby_port->system->bypassCaches()) {
324  panic("Ruby supports atomic accesses only in noncaching mode\n");
325  }
326 
327  // Check for pio requests and directly send them to the dedicated
328  // pio port.
329  if (pkt->cmd != MemCmd::MemSyncReq) {
330  if (!isPhysMemAddress(pkt)) {
331  assert(ruby_port->memRequestPort.isConnected());
332  DPRINTF(RubyPort, "Request address %#x assumed to be a "
333  "pio address\n", pkt->getAddr());
334 
335  // Save the port in the sender state object to be used later to
336  // route the response
337  pkt->pushSenderState(new SenderState(this));
338 
339  // send next cycle
340  Tick req_ticks = ruby_port->memRequestPort.sendAtomic(pkt);
341  return ruby_port->ticksToCycles(req_ticks);
342  }
343 
344  assert(getOffset(pkt->getAddr()) + pkt->getSize() <=
346  }
347 
348  // Find appropriate directory for address
349  // This assumes that protocols have a Directory machine,
350  // which has its memPort hooked up to memory. This can
351  // fail for some custom protocols.
352  MachineID id = ruby_port->m_controller->mapAddressToMachine(
353  pkt->getAddr(), MachineType_Directory);
354  RubySystem *rs = ruby_port->m_ruby_system;
355  AbstractController *directory =
356  rs->m_abstract_controls[id.getType()][id.getNum()];
357  Tick latency = directory->recvAtomic(pkt);
358  if (access_backing_store)
359  rs->getPhysMem()->access(pkt);
360  return latency;
361 }
362 
363 void
365 {
366  RubyPort *ruby_port = static_cast<RubyPort *>(&owner);
367 
368  //
369  // Unless the request port do not want retries (e.g., the Ruby tester),
370  // record the stalled M5 port for later retry when the sequencer
371  // becomes free.
372  //
373  if (!no_retry_on_stall && !ruby_port->onRetryList(this)) {
374  ruby_port->addToRetryList(this);
375  }
376 }
377 
378 void
380 {
381  DPRINTF(RubyPort, "Functional access for address: %#x\n", pkt->getAddr());
382 
383  GEM5_VAR_USED RubyPort *rp = static_cast<RubyPort *>(&owner);
384  RubySystem *rs = rp->m_ruby_system;
385 
386  // Check for pio requests and directly send them to the dedicated
387  // pio port.
388  if (!isPhysMemAddress(pkt)) {
389  DPRINTF(RubyPort, "Pio Request for address: 0x%#x\n", pkt->getAddr());
390  assert(rp->pioRequestPort.isConnected());
391  rp->pioRequestPort.sendFunctional(pkt);
392  return;
393  }
394 
395  assert(pkt->getAddr() + pkt->getSize() <=
397 
398  if (access_backing_store) {
399  // The attached physmem contains the official version of data.
400  // The following command performs the real functional access.
401  // This line should be removed once Ruby supplies the official version
402  // of data.
403  rs->getPhysMem()->functionalAccess(pkt);
404  } else {
405  bool accessSucceeded = false;
406  bool needsResponse = pkt->needsResponse();
407 
408  // Do the functional access on ruby memory
409  if (pkt->isRead()) {
410  accessSucceeded = rs->functionalRead(pkt);
411  } else if (pkt->isWrite()) {
412  accessSucceeded = rs->functionalWrite(pkt);
413  } else {
414  panic("Unsupported functional command %s\n", pkt->cmdString());
415  }
416 
417  // Unless the request port explicitly said otherwise, generate an error
418  // if the functional request failed
419  if (!accessSucceeded && !pkt->suppressFuncError()) {
420  fatal("Ruby functional %s failed for address %#x\n",
421  pkt->isWrite() ? "write" : "read", pkt->getAddr());
422  }
423 
424  // turn packet around to go back to request port if response expected
425  if (needsResponse) {
426  // The pkt is already turned into a reponse if the directory
427  // forwarded the request to the memory controller (see
428  // AbstractController::functionalMemoryWrite and
429  // AbstractMemory::functionalAccess)
430  if (!pkt->isResponse())
431  pkt->makeResponse();
432  pkt->setFunctionalResponseStatus(accessSucceeded);
433  }
434 
435  DPRINTF(RubyPort, "Functional access %s!\n",
436  accessSucceeded ? "successful":"failed");
437  }
438 }
439 
440 void
442 {
443  DPRINTF(RubyPort, "Hit callback for %s 0x%x\n", pkt->cmdString(),
444  pkt->getAddr());
445 
446  // The packet was destined for memory and has not yet been turned
447  // into a response
448  assert(system->isMemAddr(pkt->getAddr()) || system->isDeviceMemAddr(pkt));
449  assert(pkt->isRequest());
450 
451  // First we must retrieve the request port from the sender State
452  RubyPort::SenderState *senderState =
453  safe_cast<RubyPort::SenderState *>(pkt->popSenderState());
454  MemResponsePort *port = senderState->port;
455  assert(port != NULL);
456  delete senderState;
457 
458  port->hitCallback(pkt);
459 
460  trySendRetries();
461 }
462 
463 void
465 {
466  //
467  // If we had to stall the MemResponsePorts, wake them up because the
468  // sequencer likely has free resources now.
469  //
470  if (!retryList.empty()) {
471  // Record the current list of ports to retry on a temporary list
472  // before calling sendRetryReq on those ports. sendRetryReq will cause
473  // an immediate retry, which may result in the ports being put back on
474  // the list. Therefore we want to clear the retryList before calling
475  // sendRetryReq.
477 
478  retryList.clear();
479 
480  for (auto i = curRetryList.begin(); i != curRetryList.end(); ++i) {
482  "Sequencer may now be free. SendRetry to port %s\n",
483  (*i)->name());
484  (*i)->sendRetryReq();
485  }
486  }
487 }
488 
489 void
491 {
492  //If we weren't able to drain before, we might be able to now.
493  if (drainState() == DrainState::Draining) {
494  unsigned int drainCount = outstandingCount();
495  DPRINTF(Drain, "Drain count: %u\n", drainCount);
496  if (drainCount == 0) {
497  DPRINTF(Drain, "RubyPort done draining, signaling drain done\n");
498  signalDrainDone();
499  }
500  }
501 }
502 
505 {
506  if (isDeadlockEventScheduled()) {
508  }
509 
510  //
511  // If the RubyPort is not empty, then it needs to clear all outstanding
512  // requests before it should call signalDrainDone()
513  //
514  DPRINTF(Config, "outstanding count %d\n", outstandingCount());
515  if (outstandingCount() > 0) {
516  DPRINTF(Drain, "RubyPort not drained\n");
517  return DrainState::Draining;
518  } else {
519  return DrainState::Drained;
520  }
521 }
522 
523 void
525 {
526  bool needsResponse = pkt->needsResponse();
527 
528  // Unless specified at configuration, all responses except failed SC
529  // and Flush operations access M5 physical memory.
530  bool accessPhysMem = access_backing_store;
531 
532  if (pkt->isLLSC()) {
533  if (pkt->isWrite()) {
534  if (pkt->req->getExtraData() != 0) {
535  //
536  // Successful SC packets convert to normal writes
537  //
538  pkt->convertScToWrite();
539  } else {
540  //
541  // Failed SC packets don't access physical memory and thus
542  // the RubyPort itself must convert it to a response.
543  //
544  accessPhysMem = false;
545  }
546  } else {
547  //
548  // All LL packets convert to normal loads so that M5 PhysMem does
549  // not lock the blocks.
550  //
551  pkt->convertLlToRead();
552  }
553  }
554 
555  // Flush, acquire, release requests don't access physical memory
556  if (pkt->isFlush() || pkt->cmd == MemCmd::MemSyncReq
557  || pkt->cmd == MemCmd::WriteCompleteResp) {
558  accessPhysMem = false;
559  }
560 
561  if (pkt->req->isKernel()) {
562  accessPhysMem = false;
563  needsResponse = true;
564  }
565 
566  DPRINTF(RubyPort, "Hit callback needs response %d\n", needsResponse);
567 
568  RubyPort *ruby_port = static_cast<RubyPort *>(&owner);
569  RubySystem *rs = ruby_port->m_ruby_system;
570  if (accessPhysMem) {
571  // We must check device memory first in case it overlaps with the
572  // system memory range.
573  if (ruby_port->system->isDeviceMemAddr(pkt)) {
574  auto dmem = ruby_port->system->getDeviceMemory(pkt);
575  dmem->access(pkt);
576  } else if (ruby_port->system->isMemAddr(pkt->getAddr())) {
577  rs->getPhysMem()->access(pkt);
578  } else {
579  panic("Packet is in neither device nor system memory!");
580  }
581  } else if (needsResponse) {
582  pkt->makeResponse();
583  }
584 
585  // turn packet around to go back to request port if response expected
586  if (needsResponse || pkt->isResponse()) {
587  DPRINTF(RubyPort, "Sending packet back over port\n");
588  // Send a response in the same cycle. There is no need to delay the
589  // response because the response latency is already incurred in the
590  // Ruby protocol.
591  schedTimingResp(pkt, curTick());
592  } else {
593  delete pkt;
594  }
595 
596  DPRINTF(RubyPort, "Hit callback done!\n");
597 }
598 
601 {
602  // at the moment the assumption is that the request port does not care
603  AddrRangeList ranges;
604  RubyPort *ruby_port = static_cast<RubyPort *>(&owner);
605 
606  for (size_t i = 0; i < ruby_port->request_ports.size(); ++i) {
607  ranges.splice(ranges.begin(),
608  ruby_port->request_ports[i]->getAddrRanges());
609  }
610  for (GEM5_VAR_USED const auto &r : ranges)
611  DPRINTF(RubyPort, "%s\n", r.to_string());
612  return ranges;
613 }
614 
615 bool
617 {
618  RubyPort *ruby_port = static_cast<RubyPort *>(&owner);
619  AddrRangeList ranges = ruby_port->system->getShadowRomRanges();
620 
621  for (auto it = ranges.begin(); it != ranges.end(); ++it) {
622  if (it->contains(addr)) {
623  return true;
624  }
625  }
626 
627  return false;
628 }
629 
630 bool
632 {
633  RubyPort *ruby_port = static_cast<RubyPort *>(&owner);
634  Addr addr = pkt->getAddr();
635  return (ruby_port->system->isMemAddr(addr) && !isShadowRomAddress(addr))
636  || ruby_port->system->isDeviceMemAddr(pkt);
637 }
638 
639 void
641 {
642  DPRINTF(RubyPort, "Sending invalidations.\n");
643  // Allocate the invalidate request and packet on the stack, as it is
644  // assumed they will not be modified or deleted by receivers.
645  // TODO: should this really be using funcRequestorId?
646  auto request = std::make_shared<Request>(
647  address, RubySystem::getBlockSizeBytes(), 0,
649 
650  // Use a single packet to signal all snooping ports of the invalidation.
651  // This assumes that snooping ports do NOT modify the packet/request
652  Packet pkt(request, MemCmd::InvalidateReq);
653  for (CpuPortIter p = response_ports.begin(); p != response_ports.end();
654  ++p) {
655  // check if the connected request port is snooping
656  if ((*p)->isSnooping()) {
657  // send as a snoop request
658  (*p)->sendTimingSnoopReq(&pkt);
659  }
660  }
661 }
662 
663 void
665 {
666  RubyPort &r = static_cast<RubyPort &>(owner);
667  r.gotAddrRanges--;
668  if (r.gotAddrRanges == 0 && FullSystem) {
669  r.pioResponsePort.sendRangeChange();
670  }
671 }
672 
673 int
675 {
676  int num_written = 0;
677  for (auto port : response_ports) {
678  if (port->trySatisfyFunctional(func_pkt)) {
679  num_written += 1;
680  }
681  }
682  return num_written;
683 }
684 
685 } // namespace ruby
686 } // namespace gem5
gem5::curTick
Tick curTick()
The universal simulation clock.
Definition: cur_tick.hh:46
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:189
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:252
gem5::Packet::cmdString
const std::string & cmdString() const
Return the string name of the cmd field (for debugging and tracing).
Definition: packet.hh:577
gem5::SimObject::getPort
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
Definition: sim_object.cc:126
gem5::ruby::RubyPort::m_version
uint32_t m_version
Definition: RubyPort.hh:196
gem5::ruby::RubyPort::SenderState::port
MemResponsePort * port
Definition: RubyPort.hh:148
gem5::ruby::RubyPort::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: RubyPort.cc:101
gem5::Packet::isRequest
bool isRequest() const
Definition: packet.hh:586
gem5::Packet::setFunctionalResponseStatus
void setFunctionalResponseStatus(bool success)
Definition: packet.hh:1055
gem5::Port::name
const std::string name() const
Return port name (for DPRINTF).
Definition: port.hh:111
system.hh
gem5::ruby::RubyPort::descheduleDeadlockEvent
virtual void descheduleDeadlockEvent()=0
gem5::Drainable::drainState
DrainState drainState() const
Return the current drain state of an object.
Definition: drain.hh:324
gem5::ruby::RubyPort::PioRequestPort::recvRangeChange
void recvRangeChange()
Called to receive an address range change from the peer response port.
Definition: RubyPort.cc:664
warn_once
#define warn_once(...)
Definition: logging.hh:249
gem5::ruby::RubyPort::MemResponsePort::recvFunctional
void recvFunctional(PacketPtr pkt)
Receive a functional request packet from the peer.
Definition: RubyPort.cc:379
gem5::QueuedRequestPort
The QueuedRequestPort combines two queues, a request queue and a snoop response queue,...
Definition: qport.hh:109
gem5::Packet::pushSenderState
void pushSenderState(SenderState *sender_state)
Push a new sender state to the packet and make the current sender state the predecessor of the new on...
Definition: packet.cc:316
gem5::Packet::req
RequestPtr req
A pointer to the original request.
Definition: packet.hh:366
gem5::Packet::convertScToWrite
void convertScToWrite()
It has been determined that the SC packet should successfully update memory.
Definition: packet.hh:827
gem5::ruby::RubyPort::CpuPortIter
std::vector< MemResponsePort * >::iterator CpuPortIter
Vector of M5 Ports attached to this Ruby port.
Definition: RubyPort.hh:223
gem5::ruby::RubyPort::system
System * system
Definition: RubyPort.hh:200
gem5::ruby::RubyPort::memResponsePort
MemResponsePort memResponsePort
Definition: RubyPort.hh:219
gem5::ruby::RubyPort::response_ports
std::vector< MemResponsePort * > response_ports
Definition: RubyPort.hh:202
gem5::RequestPort::sendAtomic
Tick sendAtomic(PacketPtr pkt)
Send an atomic request packet, where the data is moved and the state is updated in zero time,...
Definition: port.hh:464
gem5::ruby::RubyPort::pioResponsePort
PioResponsePort pioResponsePort
Definition: RubyPort.hh:217
gem5::ruby::RubyPort::MemResponsePort
Definition: RubyPort.hh:81
gem5::ruby::RubyPort::MemRequestPort::recvTimingResp
bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
Definition: RubyPort.cc:180
gem5::ruby::RubyPort::MemResponsePort::recvAtomic
Tick recvAtomic(PacketPtr pkt)
Receive an atomic request packet from the peer.
Definition: RubyPort.cc:319
gem5::System::bypassCaches
bool bypassCaches() const
Should caches be bypassed?
Definition: system.hh:285
gem5::Packet::cacheResponding
bool cacheResponding() const
Definition: packet.hh:646
AbstractController.hh
gem5::ruby::RubyPort::ruby_hit_callback
void ruby_hit_callback(PacketPtr pkt)
Definition: RubyPort.cc:441
gem5::System::getShadowRomRanges
AddrRangeList getShadowRomRanges() const
Definition: system.hh:390
gem5::Packet::isWrite
bool isWrite() const
Definition: packet.hh:583
gem5::ruby::RubySystem::getBlockSizeBytes
static uint32_t getBlockSizeBytes()
Definition: RubySystem.hh:72
gem5::X86ISA::system
Bitfield< 15 > system
Definition: misc.hh:1003
std::vector
STL vector class.
Definition: stl.hh:37
gem5::ruby::RubyPort::retryList
std::vector< MemResponsePort * > retryList
Definition: RubyPort.hh:230
gem5::csprintf
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:161
gem5::ruby::RubyPort::trySendRetries
void trySendRetries()
Definition: RubyPort.cc:464
gem5::System::getDeviceMemory
memory::AbstractMemory * getDeviceMemory(const PacketPtr &pkt) const
Return a pointer to the device memory.
Definition: system.cc:399
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:66
gem5::ruby::RubyPort::MemResponsePort::isShadowRomAddress
bool isShadowRomAddress(Addr addr) const
Definition: RubyPort.cc:616
gem5::ruby::makeLineAddress
Addr makeLineAddress(Addr addr)
Definition: Address.cc:60
gem5::ruby::AbstractController
Definition: AbstractController.hh:82
gem5::ruby::RubyPort::SenderState
Definition: RubyPort.hh:146
gem5::ruby::RubyPort::MemResponsePort::hitCallback
void hitCallback(PacketPtr pkt)
Definition: RubyPort.cc:524
gem5::ruby::RubyPort::m_mandatory_q_ptr
MessageBuffer * m_mandatory_q_ptr
Definition: RubyPort.hh:198
gem5::Packet::convertLlToRead
void convertLlToRead()
When ruby is in use, Ruby will monitor the cache line and the phys memory should treat LL ops as norm...
Definition: packet.hh:839
gem5::ruby::RubyPort::MemResponsePort::MemResponsePort
MemResponsePort(const std::string &_name, RubyPort *_port, bool _access_backing_store, PortID id, bool _no_retry_on_stall)
Definition: RubyPort.cc:157
gem5::DrainState
DrainState
Object drain/handover states.
Definition: drain.hh:74
gem5::ruby::RubyPort::MemResponsePort::isPhysMemAddress
bool isPhysMemAddress(PacketPtr pkt) const
Definition: RubyPort.cc:631
gem5::ruby::RubyPort::init
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: RubyPort.cc:92
gem5::Packet::isRead
bool isRead() const
Definition: packet.hh:582
gem5::ruby::RubyPort::makeRequest
virtual RequestStatus makeRequest(PacketPtr pkt)=0
gem5::ruby::RubyPort::ruby_eviction_callback
void ruby_eviction_callback(Addr address)
Definition: RubyPort.cc:640
gem5::System::isMemAddr
bool isMemAddr(Addr addr) const
Check if a physical address is within a range of a memory that is part of the global address map.
Definition: system.cc:376
gem5::Named::name
virtual std::string name() const
Definition: named.hh:47
gem5::ruby::RubyPort::PioResponsePort::PioResponsePort
PioResponsePort(const std::string &_name, RubyPort *_port)
Definition: RubyPort.cc:141
gem5::QueuedResponsePort
A queued port is a port that has an infinite queue for outgoing packets and thus decouples the module...
Definition: qport.hh:61
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::Packet::htmTransactionFailedInCache
bool htmTransactionFailedInCache() const
Returns whether or not this packet/request has returned from the cache hierarchy in a failed transact...
Definition: packet.cc:508
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::ruby::AbstractController::mapAddressToMachine
MachineID mapAddressToMachine(Addr addr, MachineType mtype) const
Map an address to the correct MachineID.
Definition: AbstractController.cc:403
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::ruby::RubyPort::request_ports
std::vector< PioRequestPort * > request_ports
Definition: RubyPort.hh:224
RubyTester.hh
gem5::MemCmd::MemSyncReq
@ MemSyncReq
Definition: packet.hh:119
gem5::ruby::RubyPort::isDeadlockEventScheduled
virtual bool isDeadlockEventScheduled() const =0
gem5::ruby::AbstractController::recvAtomic
Tick recvAtomic(PacketPtr pkt)
Definition: AbstractController.cc:397
gem5::Packet::suppressFuncError
bool suppressFuncError() const
Definition: packet.hh:745
gem5::Packet::isLLSC
bool isLLSC() const
Definition: packet.hh:609
gem5::ruby::RubyPort::PioRequestPort::PioRequestPort
PioRequestPort(const std::string &_name, RubyPort *_port)
Definition: RubyPort.cc:133
gem5::ruby::RubyPort::RubyPort
RubyPort(const Params &p)
Definition: RubyPort.cc:61
gem5::ruby::getOffset
Addr getOffset(Addr addr)
Definition: Address.cc:54
gem5::ruby::RubyPort::outstandingCount
virtual int outstandingCount() const =0
gem5::MipsISA::l
Bitfield< 5 > l
Definition: pra_constants.hh:323
gem5::ruby::RubyPort::memRequestPort
MemRequestPort memRequestPort
Definition: RubyPort.hh:218
gem5::Port::isConnected
bool isConnected() const
Is this port currently connected to a peer?
Definition: port.hh:133
ss
std::stringstream ss
Definition: trace.test.cc:45
compiler.hh
gem5::DrainState::Drained
@ Drained
Buffers drained, ready for serialization/handover.
gem5::Packet::cmd
MemCmd cmd
The command field of the packet.
Definition: packet.hh:361
gem5::Packet::needsResponse
bool needsResponse() const
Definition: packet.hh:597
gem5::ruby::RubyPort::testDrainComplete
void testDrainComplete()
Definition: RubyPort.cc:490
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
name
const std::string & name()
Definition: trace.cc:49
gem5::ruby::RubyPort::PioRequestPort
Definition: RubyPort.hh:112
gem5::ruby::RubyPort::m_ruby_system
RubySystem * m_ruby_system
Definition: RubyPort.hh:195
gem5::ClockedObject
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
Definition: clocked_object.hh:234
full_system.hh
gem5::Packet::popSenderState
SenderState * popSenderState()
Pop the top of the state stack and return a pointer to it.
Definition: packet.cc:324
gem5::Drainable::signalDrainDone
void signalDrainDone() const
Signal that an object is drained.
Definition: drain.hh:305
gem5::MemCmd::WriteCompleteResp
@ WriteCompleteResp
Definition: packet.hh:91
gem5::FullSystem
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
Definition: root.cc:223
gem5::System::isDeviceMemAddr
bool isDeviceMemAddr(const PacketPtr &pkt) const
Similar to isMemAddr but for devices.
Definition: system.cc:389
gem5::ruby::RubySystem
Definition: RubySystem.hh:63
gem5::ruby::RubyPort::functionalWrite
virtual int functionalWrite(Packet *func_pkt)
Definition: RubyPort.cc:674
gem5::ruby::RubyPort::PioResponsePort::getAddrRanges
AddrRangeList getAddrRanges() const
Get a list of the non-overlapping address ranges the owner is responsible for.
Definition: RubyPort.cc:600
gem5::Packet::isFlush
bool isFlush() const
Definition: packet.hh:612
gem5::Request::funcRequestorId
@ funcRequestorId
This requestor id is used for functional requests that don't come from a particular device.
Definition: request.hh:260
gem5::ruby::RubyPort::PioResponsePort::recvAtomic
Tick recvAtomic(PacketPtr pkt)
Receive an atomic request packet from the peer.
Definition: RubyPort.cc:227
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
gem5::ruby::RubyPort::Params
RubyPortParams Params
Definition: RubyPort.hh:153
gem5::ruby::RubyPort::m_controller
AbstractController * m_controller
Definition: RubyPort.hh:197
gem5::Packet::makeResponse
void makeResponse()
Take a request packet and modify it in place to be suitable for returning as a response to that reque...
Definition: packet.hh:1031
gem5::ruby::RubyPort::addToRetryList
void addToRetryList(MemResponsePort *port)
Definition: RubyPort.hh:210
gem5::MemCmd::InvalidateReq
@ InvalidateReq
Definition: packet.hh:137
gem5::ArmISA::id
Bitfield< 33 > id
Definition: misc_types.hh:250
gem5::MipsISA::r
r
Definition: pra_constants.hh:98
gem5::QueuedRequestPort::schedTimingReq
void schedTimingReq(PacketPtr pkt, Tick when)
Schedule the sending of a timing request.
Definition: qport.hh:149
gem5::ruby::RubyPort::onRetryList
bool onRetryList(MemResponsePort *port)
Definition: RubyPort.hh:205
gem5::Clocked::ticksToCycles
Cycles ticksToCycles(Tick t) const
Definition: clocked_object.hh:222
gem5::ruby::AbstractController::getMandatoryQueue
virtual MessageBuffer * getMandatoryQueue() const =0
std::list< AddrRange >
gem5::Packet::getAddr
Addr getAddr() const
Definition: packet.hh:781
gem5::QueuedResponsePort::schedTimingResp
void schedTimingResp(PacketPtr pkt, Tick when)
Schedule the sending of a timing response.
Definition: qport.hh:93
gem5::memory::AbstractMemory::access
void access(PacketPtr pkt)
Perform an untimed memory access and update all the state (e.g.
Definition: abstract_mem.cc:380
gem5::ruby::RubyPort::PioResponsePort::recvTimingReq
bool recvTimingReq(PacketPtr pkt)
Receive a timing request from the peer.
Definition: RubyPort.cc:206
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::ruby::RubyPort::MemResponsePort::addToRetryList
void addToRetryList()
Definition: RubyPort.cc:364
RubyPort.hh
gem5::ruby::RubyPort
Definition: RubyPort.hh:64
gem5::ruby::MachineID
Definition: MachineID.hh:56
gem5::ruby::RubyPort::drain
DrainState drain() override
Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are pa...
Definition: RubyPort.cc:504
gem5::Packet::isResponse
bool isResponse() const
Definition: packet.hh:587
gem5::ruby::RubyPort::MemRequestPort::MemRequestPort
MemRequestPort(const std::string &_name, RubyPort *_port)
Definition: RubyPort.cc:148
gem5::Packet::getSize
unsigned getSize() const
Definition: packet.hh:791
gem5::Named::_name
const std::string _name
Definition: named.hh:41
gem5::ArmISA::rs
Bitfield< 9, 8 > rs
Definition: misc_types.hh:376
gem5::DrainState::Draining
@ Draining
Draining buffers pending serialization/handover.
gem5::ruby::RubyPort::MemResponsePort::recvTimingReq
bool recvTimingReq(PacketPtr pkt)
Receive a timing request from the peer.
Definition: RubyPort.cc:247
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:177
gem5::Clocked::clockPeriod
Tick clockPeriod() const
Definition: clocked_object.hh:217
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84
simple_mem.hh
gem5::SenderState
RubyTester::SenderState SenderState
Definition: Check.cc:40
gem5::ruby::RubyPort::PioRequestPort::recvTimingResp
bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
Definition: RubyPort.cc:169
gem5::ruby::RubyPort::pioRequestPort
PioRequestPort pioRequestPort
Definition: RubyPort.hh:216

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