gem5 v24.0.0.0
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remote_gdb.cc
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1/*
2 * Copyright 2015 LabWare
3 * Copyright 2014 Google, Inc.
4 * Copyright (c) 2007 The Hewlett-Packard Development Company
5 * All rights reserved.
6 *
7 * The license below extends only to copyright in the software and shall
8 * not be construed as granting a license to any other intellectual
9 * property including but not limited to intellectual property relating
10 * to a hardware implementation of the functionality of the software
11 * licensed hereunder. You may use the software subject to the license
12 * terms below provided that you ensure that this notice is replicated
13 * unmodified and in its entirety in all distributions of the software,
14 * modified or unmodified, in source code or in binary form.
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions are
18 * met: redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer;
20 * redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution;
23 * neither the name of the copyright holders nor the names of its
24 * contributors may be used to endorse or promote products derived from
25 * this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 */
39
41
42#include <sys/signal.h>
43#include <unistd.h>
44
45#include <string>
46
47#include "arch/x86/mmu.hh"
49#include "arch/x86/process.hh"
50#include "arch/x86/regs/int.hh"
51#include "arch/x86/regs/misc.hh"
53#include "base/logging.hh"
54#include "base/remote_gdb.hh"
55#include "base/socket.hh"
56#include "base/trace.hh"
57#include "cpu/base.hh"
58#include "cpu/thread_context.hh"
59#include "debug/GDBAcc.hh"
60#include "mem/page_table.hh"
61#include "sim/full_system.hh"
62#include "sim/workload.hh"
63
64namespace gem5
65{
66
67using namespace X86ISA;
68
69RemoteGDB::RemoteGDB(System *_system, ListenSocketConfig _listen_config) :
70 BaseRemoteGDB(_system, _listen_config),
71 regCache32(this), regCache64(this)
72{}
73
74bool
75RemoteGDB::acc(Addr va, size_t len)
76{
77 if (FullSystem) {
78 Walker *walker = dynamic_cast<MMU *>(
79 context()->getMMUPtr())->getDataWalker();
80 unsigned logBytes;
81 Fault fault = walker->startFunctional(context(), va, logBytes,
82 BaseMMU::Read);
83 if (fault != NoFault)
84 return false;
85
86 Addr endVa = va + len - 1;
87 if ((va & ~mask(logBytes)) == (endVa & ~mask(logBytes)))
88 return true;
89
90 fault = walker->startFunctional(context(), endVa, logBytes,
91 BaseMMU::Read);
92 return fault == NoFault;
93 } else {
94 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
95 }
96}
97
98BaseGdbRegCache*
99RemoteGDB::gdbRegs()
100{
101 // First, try to figure out which type of register cache to return based
102 // on the architecture reported by the workload.
103 if (system()->workload) {
104 auto arch = system()->workload->getArch();
105 if (arch == loader::X86_64) {
106 return &regCache64;
107 } else if (arch == loader::I386) {
108 return &regCache32;
109 } else if (arch != loader::UnknownArch) {
110 panic("Unrecognized workload arch %s.",
111 loader::archToString(arch));
112 }
113 }
114
115 // If that didn't work, decide based on the current mode of the context.
116 HandyM5Reg m5reg = context()->readMiscRegNoEffect(misc_reg::M5Reg);
117 if (m5reg.submode == SixtyFourBitMode)
118 return &regCache64;
119 else
120 return &regCache32;
121}
122
123
124
125void
126RemoteGDB::AMD64GdbRegCache::getRegs(ThreadContext *context)
127{
128 DPRINTF(GDBAcc, "getRegs in remotegdb \n");
129 r.rax = context->getReg(int_reg::Rax);
130 r.rbx = context->getReg(int_reg::Rbx);
131 r.rcx = context->getReg(int_reg::Rcx);
132 r.rdx = context->getReg(int_reg::Rdx);
133 r.rsi = context->getReg(int_reg::Rsi);
134 r.rdi = context->getReg(int_reg::Rdi);
135 r.rbp = context->getReg(int_reg::Rbp);
136 r.rsp = context->getReg(int_reg::Rsp);
137 r.r8 = context->getReg(int_reg::R8);
138 r.r9 = context->getReg(int_reg::R9);
139 r.r10 = context->getReg(int_reg::R10);
140 r.r11 = context->getReg(int_reg::R11);
141 r.r12 = context->getReg(int_reg::R12);
142 r.r13 = context->getReg(int_reg::R13);
143 r.r14 = context->getReg(int_reg::R14);
144 r.r15 = context->getReg(int_reg::R15);
145 r.rip = context->pcState().instAddr();
146 r.eflags = context->readMiscRegNoEffect(misc_reg::Rflags);
147 r.cs = context->readMiscRegNoEffect(misc_reg::Cs);
148 r.ss = context->readMiscRegNoEffect(misc_reg::Ss);
149 r.ds = context->readMiscRegNoEffect(misc_reg::Ds);
150 r.es = context->readMiscRegNoEffect(misc_reg::Es);
151 r.fs = context->readMiscRegNoEffect(misc_reg::Fs);
152 r.gs = context->readMiscRegNoEffect(misc_reg::Gs);
153}
154
155void
156RemoteGDB::X86GdbRegCache::getRegs(ThreadContext *context)
157{
158 DPRINTF(GDBAcc, "getRegs in remotegdb \n");
159 r.eax = context->getReg(int_reg::Rax);
160 r.ecx = context->getReg(int_reg::Rcx);
161 r.edx = context->getReg(int_reg::Rdx);
162 r.ebx = context->getReg(int_reg::Rbx);
163 r.esp = context->getReg(int_reg::Rsp);
164 r.ebp = context->getReg(int_reg::Rbp);
165 r.esi = context->getReg(int_reg::Rsi);
166 r.edi = context->getReg(int_reg::Rdi);
167 r.eip = context->pcState().instAddr();
168 r.eflags = context->readMiscRegNoEffect(misc_reg::Rflags);
169 r.cs = context->readMiscRegNoEffect(misc_reg::Cs);
170 r.ss = context->readMiscRegNoEffect(misc_reg::Ss);
171 r.ds = context->readMiscRegNoEffect(misc_reg::Ds);
172 r.es = context->readMiscRegNoEffect(misc_reg::Es);
173 r.fs = context->readMiscRegNoEffect(misc_reg::Fs);
174 r.gs = context->readMiscRegNoEffect(misc_reg::Gs);
175}
176
177void
178RemoteGDB::AMD64GdbRegCache::setRegs(ThreadContext *context) const
179{
180 DPRINTF(GDBAcc, "setRegs in remotegdb \n");
181 context->setReg(int_reg::Rax, r.rax);
182 context->setReg(int_reg::Rbx, r.rbx);
183 context->setReg(int_reg::Rcx, r.rcx);
184 context->setReg(int_reg::Rdx, r.rdx);
185 context->setReg(int_reg::Rsi, r.rsi);
186 context->setReg(int_reg::Rdi, r.rdi);
187 context->setReg(int_reg::Rbp, r.rbp);
188 context->setReg(int_reg::Rsp, r.rsp);
189 context->setReg(int_reg::R8, r.r8);
190 context->setReg(int_reg::R9, r.r9);
191 context->setReg(int_reg::R10, r.r10);
192 context->setReg(int_reg::R11, r.r11);
193 context->setReg(int_reg::R12, r.r12);
194 context->setReg(int_reg::R13, r.r13);
195 context->setReg(int_reg::R14, r.r14);
196 context->setReg(int_reg::R15, r.r15);
197 context->pcState(r.rip);
198 context->setMiscReg(misc_reg::Rflags, r.eflags);
199 if (r.cs != context->readMiscRegNoEffect(misc_reg::Cs))
200 warn("Remote gdb: Ignoring update to CS.\n");
201 if (r.ss != context->readMiscRegNoEffect(misc_reg::Ss))
202 warn("Remote gdb: Ignoring update to SS.\n");
203 if (r.ds != context->readMiscRegNoEffect(misc_reg::Ds))
204 warn("Remote gdb: Ignoring update to DS.\n");
205 if (r.es != context->readMiscRegNoEffect(misc_reg::Es))
206 warn("Remote gdb: Ignoring update to ES.\n");
207 if (r.fs != context->readMiscRegNoEffect(misc_reg::Fs))
208 warn("Remote gdb: Ignoring update to FS.\n");
209 if (r.gs != context->readMiscRegNoEffect(misc_reg::Gs))
210 warn("Remote gdb: Ignoring update to GS.\n");
211}
212
213void
214RemoteGDB::X86GdbRegCache::setRegs(ThreadContext *context) const
215{
216 DPRINTF(GDBAcc, "setRegs in remotegdb \n");
217 context->setReg(int_reg::Rax, r.eax);
218 context->setReg(int_reg::Rcx, r.ecx);
219 context->setReg(int_reg::Rdx, r.edx);
220 context->setReg(int_reg::Rbx, r.ebx);
221 context->setReg(int_reg::Rsp, r.esp);
222 context->setReg(int_reg::Rbp, r.ebp);
223 context->setReg(int_reg::Rsi, r.esi);
224 context->setReg(int_reg::Rdi, r.edi);
225 context->pcState(r.eip);
226 context->setMiscReg(misc_reg::Rflags, r.eflags);
227 if (r.cs != context->readMiscRegNoEffect(misc_reg::Cs))
228 warn("Remote gdb: Ignoring update to CS.\n");
229 if (r.ss != context->readMiscRegNoEffect(misc_reg::Ss))
230 warn("Remote gdb: Ignoring update to SS.\n");
231 if (r.ds != context->readMiscRegNoEffect(misc_reg::Ds))
232 warn("Remote gdb: Ignoring update to DS.\n");
233 if (r.es != context->readMiscRegNoEffect(misc_reg::Es))
234 warn("Remote gdb: Ignoring update to ES.\n");
235 if (r.fs != context->readMiscRegNoEffect(misc_reg::Fs))
236 warn("Remote gdb: Ignoring update to FS.\n");
237 if (r.gs != context->readMiscRegNoEffect(misc_reg::Gs))
238 warn("Remote gdb: Ignoring update to GS.\n");
239}
240
241} // namespace gem5
#define DPRINTF(x,...)
Definition trace.hh:210
RemoteGDB(System *_system, ListenSocketConfig _listen_config)
Addr instAddr() const
Returns the memory address of the instruction this PC points to.
Definition pcstate.hh:108
ThreadContext is the external interface to all thread state for anything outside of the CPU.
virtual void setMiscReg(RegIndex misc_reg, RegVal val)=0
virtual RegVal getReg(const RegId &reg) const
virtual void setReg(const RegId &reg, RegVal val)
virtual const PCStateBase & pcState() const =0
virtual RegVal readMiscRegNoEffect(RegIndex misc_reg) const =0
#define panic(...)
This implements a cprintf based panic() function.
Definition logging.hh:188
uint16_t len
Definition helpers.cc:83
#define warn(...)
Definition logging.hh:256
Bitfield< 3, 0 > mask
Definition pcstate.hh:63
Bitfield< 8 > va
Bitfield< 15 > system
Definition misc.hh:1032
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
std::shared_ptr< FaultBase > Fault
Definition types.hh:249
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
constexpr decltype(nullptr) NoFault
Definition types.hh:253
Declarations of a non-full system Page Table.

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