133 #include <sys/signal.h>
139 #include "arch/arm/gdb-xml/gdb_xml_aarch64_core.hh"
140 #include "arch/arm/gdb-xml/gdb_xml_aarch64_fpu.hh"
141 #include "arch/arm/gdb-xml/gdb_xml_aarch64_target.hh"
142 #include "arch/arm/gdb-xml/gdb_xml_arm_core.hh"
143 #include "arch/arm/gdb-xml/gdb_xml_arm_target.hh"
144 #include "arch/arm/gdb-xml/gdb_xml_arm_vfpv3.hh"
158 #include "debug/GDBAcc.hh"
159 #include "debug/GDBMisc.hh"
169 using namespace ArmISA;
190 auto req = std::make_shared<Request>(
addr, 64, 0x40, -1, 0, 0);
205 :
BaseRemoteGDB(_system, _port), regCache32(this), regCache64(this)
218 DPRINTF(GDBAcc,
"acc: %#x mapping is invalid\n",
va);
223 DPRINTF(GDBAcc,
"acc: %#x mapping is valid\n",
va);
235 DPRINTF(GDBAcc,
"getRegs in remotegdb \n");
237 for (
int i = 0;
i < 31; ++
i)
260 DPRINTF(GDBAcc,
"setRegs in remotegdb \n");
262 for (
int i = 0;
i < 31; ++
i)
290 DPRINTF(GDBAcc,
"getRegs in remotegdb \n");
311 for (
int i = 0;
i < 32;
i++)
320 DPRINTF(GDBAcc,
"setRegs in remotegdb \n");
338 pc_state.
set(
r.gpr[15]);
350 #define GDB_XML(x, s) \
351 { x, std::string(reinterpret_cast<const char *>(Blobs::s), \
353 static const std::map<std::string, std::string> annexMap32{
354 GDB_XML(
"target.xml", gdb_xml_arm_target),
355 GDB_XML(
"arm-core.xml", gdb_xml_arm_core),
356 GDB_XML(
"arm-vfpv3.xml", gdb_xml_arm_vfpv3),
358 static const std::map<std::string, std::string> annexMap64{
359 GDB_XML(
"target.xml", gdb_xml_aarch64_target),
360 GDB_XML(
"aarch64-core.xml", gdb_xml_aarch64_core),
361 GDB_XML(
"aarch64-fpu.xml", gdb_xml_aarch64_fpu),
365 auto it = annexMap.find(annex);
366 if (it == annexMap.end())
384 switch (ArmBpKind(kind)) {
385 case ArmBpKind::THUMB:
386 case ArmBpKind::THUMB_2:
Declaration and inline definition of ChunkGenerator object.
void setRegs(ThreadContext *) const
Set the ThreadContext's registers from the values in the raw buffer.
void getRegs(ThreadContext *)
Fill the raw buffer from the registers in the ThreadContext.
void setRegs(ThreadContext *) const
Set the ThreadContext's registers from the values in the raw buffer.
void getRegs(ThreadContext *)
Fill the raw buffer from the registers in the ThreadContext.
struct gem5::ArmISA::RemoteGDB::AArch64GdbRegCache::GEM5_PACKED r
bool checkBpKind(size_t kind) override
RemoteGDB(System *_system, int _port)
bool acc(Addr addr, size_t len) override
BaseGdbRegCache * gdbRegs() override
bool getXferFeaturesRead(const std::string &annex, std::string &output) override
Get an XML target description.
AArch64GdbRegCache regCache64
AArch32GdbRegCache regCache32
Concrete subclasses of this abstract class represent how the register values are transmitted on the w...
virtual Fault translateFunctional(const RequestPtr &req, ThreadContext *tc, Mode mode)
ThreadContext * context()
This class takes an arbitrary memory region (address/length pair) and generates a series of appropria...
const Entry * lookup(Addr vaddr)
Lookup function.
void set(Addr val)
Force this PC to reflect a particular value, resetting all its other fields around it.
Addr instAddr() const
Returns the memory address of the instruction this PC points to.
EmulationPageTable * pTable
ThreadContext is the external interface to all thread state for anything outside of the CPU.
virtual void * getWritableReg(const RegId ®)=0
virtual void setMiscReg(RegIndex misc_reg, RegVal val)=0
virtual RegVal getReg(const RegId ®) const
virtual void setMiscRegNoEffect(RegIndex misc_reg, RegVal val)=0
virtual const PCStateBase & pcState() const =0
virtual void setReg(const RegId ®, RegVal val)
virtual RegVal readMiscRegNoEffect(RegIndex misc_reg) const =0
virtual Process * getProcessPtr()=0
virtual BaseMMU * getMMUPtr()=0
Vector Register Abstraction This generic class is the model in a particularization of MVC,...
VecElem * as()
View interposers.
bool done() const
Are we done? That is, did the last call to next() advance past the end of the region?
static RegId x(unsigned index)
const int NumVecV8ArchRegs
constexpr unsigned NumVecElemPerNeonVecReg
bool inAArch64(ThreadContext *tc)
constexpr RegClass vecRegClass
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
static void output(const char *filename)
constexpr decltype(nullptr) NoFault
static bool tryTranslate(ThreadContext *tc, Addr addr)
Declarations of a non-full system Page Table.
VecElem v[NumVecV8ArchRegs *NumVecElemPerNeonVecReg]