gem5  v21.1.0.2
base_gen.cc
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37 
39 
40 #include <algorithm>
41 
42 #include "base/logging.hh"
44 
45 namespace gem5
46 {
47 
48 BaseGen::BaseGen(SimObject &obj, RequestorID requestor_id, Tick _duration)
49  : _name(obj.name()), requestorId(requestor_id),
50  duration(_duration)
51 {
52 }
53 
55 BaseGen::getPacket(Addr addr, unsigned size, const MemCmd& cmd,
56  Request::FlagsType flags)
57 {
58  // Create new request
59  RequestPtr req = std::make_shared<Request>(addr, size, flags,
60  requestorId);
61  // Dummy PC to have PC-based prefetchers latch on; get entropy into higher
62  // bits
63  req->setPC(((Addr)requestorId) << 2);
64 
65  // Embed it in a packet
66  PacketPtr pkt = new Packet(req, cmd);
67 
68  uint8_t* pkt_data = new uint8_t[req->getSize()];
69  pkt->dataDynamic(pkt_data);
70 
71  if (cmd.isWrite()) {
72  std::fill_n(pkt_data, req->getSize(), (uint8_t)requestorId);
73  }
74 
75  return pkt;
76 }
77 
79  RequestorID requestor_id, Tick _duration,
80  Addr start_addr, Addr end_addr,
81  Addr _blocksize, Addr cacheline_size,
82  Tick min_period, Tick max_period,
83  uint8_t read_percent, Addr data_limit)
84  : BaseGen(obj, requestor_id, _duration),
85  startAddr(start_addr), endAddr(end_addr),
86  blocksize(_blocksize), cacheLineSize(cacheline_size),
87  minPeriod(min_period), maxPeriod(max_period),
88  readPercent(read_percent), dataLimit(data_limit)
89 {
91  fatal("TrafficGen %s block size (%d) is larger than "
92  "cache line size (%d)\n", name(),
94 
95  if (read_percent > 100)
96  fatal("%s cannot have more than 100% reads", name());
97 
98  if (min_period > max_period)
99  fatal("%s cannot have min_period > max_period", name());
100 }
101 
102 } // namespace gem5
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:189
gem5::StochasticGen::blocksize
const Addr blocksize
Blocksize and address increment.
Definition: base_gen.hh:157
gem5::BaseGen::name
std::string name() const
Get the name, useful for DPRINTFs.
Definition: base_gen.hh:107
gem5::MemCmd::isWrite
bool isWrite() const
Definition: packet.hh:218
gem5::StochasticGen::StochasticGen
StochasticGen(SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit)
Definition: base_gen.cc:78
gem5::Request::FlagsType
uint64_t FlagsType
Definition: request.hh:100
gem5::BaseGen::getPacket
PacketPtr getPacket(Addr addr, unsigned size, const MemCmd &cmd, Request::FlagsType flags=0)
Generate a new request and associated packet.
Definition: base_gen.cc:55
gem5::MemCmd
Definition: packet.hh:75
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::probing::Packet
ProbePointArg< PacketInfo > Packet
Packet probe point.
Definition: mem.hh:109
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::RequestPtr
std::shared_ptr< Request > RequestPtr
Definition: request.hh:92
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
base.hh
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
name
const std::string & name()
Definition: trace.cc:49
gem5::BaseGen
Base class for all generators, with the shared functionality and virtual functions for entering,...
Definition: base_gen.hh:64
gem5::Packet::dataDynamic
void dataDynamic(T *p)
Set the data pointer to a value that should have delete [] called on it.
Definition: packet.hh:1172
logging.hh
gem5::StochasticGen::cacheLineSize
const Addr cacheLineSize
Cache line size in the simulated system.
Definition: base_gen.hh:160
gem5::BaseGen::requestorId
const RequestorID requestorId
The RequestorID used for generating requests.
Definition: base_gen.hh:73
gem5::RequestorID
uint16_t RequestorID
Definition: request.hh:95
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
base_gen.hh
gem5::BaseGen::BaseGen
BaseGen(SimObject &obj, RequestorID requestor_id, Tick _duration)
Create a base generator.
Definition: base_gen.cc:48
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84

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