gem5::ArmISA::ArmFaultVals< T > Class Template Reference

#include <faults.hh>

Inheritance diagram for gem5::ArmISA::ArmFaultVals< T >:

Public Member Functions
	ArmFaultVals (ExtMachInst mach_inst=0, uint32_t _iss=0)
FaultName	name () const override
FaultOffset	offset (ThreadContext *tc) override
FaultOffset	offset64 (ThreadContext *tc) override
OperatingMode	nextMode () override
virtual bool	routeToMonitor (ThreadContext *tc) const override
uint8_t	armPcOffset (bool is_hyp) override
uint8_t	thumbPcOffset (bool is_hyp) override
uint8_t	armPcElrOffset () override
uint8_t	thumbPcElrOffset () override
bool	abortDisable (ThreadContext *tc) override
bool	fiqDisable (ThreadContext *tc) override
ExceptionClass	ec (ThreadContext *tc) const override
	Syndrome methods. More...
bool	il (ThreadContext *tc) const override
uint32_t	iss () const override
Public Member Functions inherited from gem5::ArmISA::ArmFault
	ArmFault (ExtMachInst mach_inst=0, uint32_t _iss=0)
MiscRegIndex	getSyndromeReg64 () const
MiscRegIndex	getFaultAddrReg64 () const
void	invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
void	invoke32 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
void	invoke64 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
void	update (ThreadContext *tc)
bool	isResetSPSR ()
bool	vectorCatch (ThreadContext *tc, const StaticInstPtr &inst)
ArmStaticInst *	instrAnnotate (const StaticInstPtr &inst)
virtual void	annotate (AnnotationIDs id, uint64_t val)
virtual bool	routeToHyp (ThreadContext *tc) const
virtual uint32_t	vectorCatchFlag () const
virtual bool	isStage2 () const
virtual FSR	getFsr (ThreadContext *tc) const
virtual void	setSyndrome (ThreadContext *tc, MiscRegIndex syndrome_reg)
virtual bool	getFaultVAddr (Addr &va) const
OperatingMode	getToMode () const
Public Member Functions inherited from gem5::FaultBase
virtual	~FaultBase ()

Protected Member Functions
ArmFault::FaultVals	vals ("Reset", 0x000, 0x000, 0x000, 0x000, 0x000, MODE_SVC, 0, 0, 0, 0, false, true, true, ExceptionClass::UNKNOWN)
ArmFault::FaultVals	vals ("Undefined Instruction", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_UNDEFINED, 4, 2, 0, 0, true, false, false, ExceptionClass::UNKNOWN)
ArmFault::FaultVals	vals ("Supervisor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 4, 2, 4, 2, true, false, false, ExceptionClass::SVC_TO_HYP)
ArmFault::FaultVals	vals ("Secure Monitor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_MON, 4, 4, 4, 4, false, true, true, ExceptionClass::SMC_TO_HYP)
ArmFault::FaultVals	vals ("Hypervisor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_HYP, 4, 4, 4, 4, true, false, false, ExceptionClass::HVC)
ArmFault::FaultVals	vals ("Prefetch Abort", 0x00C, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 4, 4, 0, 0, true, true, false, ExceptionClass::PREFETCH_ABORT_TO_HYP)
ArmFault::FaultVals	vals ("Data Abort", 0x010, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 8, 8, 0, 0, true, true, false, ExceptionClass::DATA_ABORT_TO_HYP)
ArmFault::FaultVals	vals ("Virtual Data Abort", 0x010, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 8, 8, 0, 0, true, true, false, ExceptionClass::INVALID)
ArmFault::FaultVals	vals ("Hypervisor Trap", 0x014, 0x000, 0x200, 0x400, 0x600, MODE_HYP, 0, 0, 0, 0, false, false, false, ExceptionClass::UNKNOWN)
ArmFault::FaultVals	vals ("Secure Monitor Trap", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_MON, 4, 2, 0, 0, false, false, false, ExceptionClass::UNKNOWN)
ArmFault::FaultVals	vals ("IRQ", 0x018, 0x080, 0x280, 0x480, 0x680, MODE_IRQ, 4, 4, 0, 0, false, true, false, ExceptionClass::UNKNOWN)
ArmFault::FaultVals	vals ("Virtual IRQ", 0x018, 0x080, 0x280, 0x480, 0x680, MODE_IRQ, 4, 4, 0, 0, false, true, false, ExceptionClass::INVALID)
ArmFault::FaultVals	vals ("FIQ", 0x01C, 0x100, 0x300, 0x500, 0x700, MODE_FIQ, 4, 4, 0, 0, false, true, true, ExceptionClass::UNKNOWN)
ArmFault::FaultVals	vals ("Virtual FIQ", 0x01C, 0x100, 0x300, 0x500, 0x700, MODE_FIQ, 4, 4, 0, 0, false, true, true, ExceptionClass::INVALID)
ArmFault::FaultVals	vals ("Illegal Inst Set State Fault", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_UNDEFINED, 4, 2, 0, 0, true, false, false, ExceptionClass::ILLEGAL_INST)
ArmFault::FaultVals	vals ("Supervisor Trap", 0x014, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, false, false, false, ExceptionClass::UNKNOWN)
ArmFault::FaultVals	vals ("PC Alignment Fault", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::PC_ALIGNMENT)
ArmFault::FaultVals	vals ("SP Alignment Fault", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::STACK_PTR_ALIGNMENT)
ArmFault::FaultVals	vals ("SError", 0x000, 0x180, 0x380, 0x580, 0x780, MODE_SVC, 0, 0, 0, 0, false, true, true, ExceptionClass::SERROR)
ArmFault::FaultVals	vals ("Software Breakpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::SOFTWARE_BREAKPOINT)
ArmFault::FaultVals	vals ("Hardware Breakpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::HW_BREAKPOINT)
ArmFault::FaultVals	vals ("Watchpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::WATCHPOINT)
ArmFault::FaultVals	vals ("SoftwareStep", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::SOFTWARE_STEP)
ArmFault::FaultVals	vals ("ArmSev Flush", 0x000, 0x000, 0x000, 0x000, 0x000, MODE_SVC, 0, 0, 0, 0, false, true, true, ExceptionClass::UNKNOWN)
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
ArmFault::FaultVals	vals
Protected Member Functions inherited from gem5::ArmISA::ArmFault
virtual Addr	getVector (ThreadContext *tc)
Addr	getVector64 (ThreadContext *tc)

Static Protected Attributes
static FaultVals	vals

Additional Inherited Members
Public Types inherited from gem5::ArmISA::ArmFault
enum	FaultSource {   AlignmentFault = 0 , InstructionCacheMaintenance , SynchExtAbtOnTranslTableWalkLL , SynchPtyErrOnTranslTableWalkLL = SynchExtAbtOnTranslTableWalkLL + 4 ,   TranslationLL = SynchPtyErrOnTranslTableWalkLL + 4 , AccessFlagLL = TranslationLL + 4 , DomainLL = AccessFlagLL + 4 , PermissionLL = DomainLL + 4 ,   DebugEvent = PermissionLL + 4 , SynchronousExternalAbort , TLBConflictAbort , SynchPtyErrOnMemoryAccess ,   AsynchronousExternalAbort , AsynchPtyErrOnMemoryAccess , AddressSizeLL , PrefetchTLBMiss = AddressSizeLL + 4 ,   PrefetchUncacheable , NumFaultSources , FaultSourceInvalid = 0xff }
	Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use. More...
enum	AnnotationIDs {   S1PTW , OVA , SAS , SSE ,   SRT , CM , OFA , SF ,   AR }
enum	TranMethod { LpaeTran , VmsaTran , UnknownTran }
enum	DebugType {   NODEBUG = 0 , BRKPOINT , VECTORCATCH , WPOINT_CM ,   WPOINT_NOCM }
Static Public Attributes inherited from gem5::ArmISA::ArmFault
static uint8_t	shortDescFaultSources [NumFaultSources]
	Encodings of the fault sources when the short-desc. More...
static uint8_t	longDescFaultSources [NumFaultSources]
	Encodings of the fault sources when the long-desc. More...
static uint8_t	aarch64FaultSources [NumFaultSources]
	Encodings of the fault sources in AArch64 state. More...
Protected Attributes inherited from gem5::ArmISA::ArmFault
ExtMachInst	machInst
uint32_t	issRaw
bool	bStep
bool	from64
bool	to64
ExceptionLevel	fromEL
ExceptionLevel	toEL
OperatingMode	fromMode
OperatingMode	toMode
bool	faultUpdated
bool	hypRouted
bool	span

Detailed Description

template<typename T>
class gem5::ArmISA::ArmFaultVals< T >

Definition at line 263 of file faults.hh.

Constructor & Destructor Documentation

ArmFaultVals()

template<typename T >

gem5::ArmISA::ArmFaultVals< T >::ArmFaultVals ( ExtMachInst  mach_inst = 0, uint32_t  _iss = 0  )

inline

Definition at line 266 of file faults.hh.

Member Function Documentation

abortDisable()

template<typename T >

bool gem5::ArmISA::ArmFaultVals< T >::abortDisable ( ThreadContext *  tc )

inlineoverridevirtual

Implements gem5::ArmISA::ArmFault.

Reimplemented in gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< VirtualDataAbort >, gem5::ArmISA::AbortFault< PrefetchAbort >, and gem5::ArmISA::AbortFault< DataAbort >.

Definition at line 300 of file faults.hh.

References gem5::ArmISA::ArmFault::FaultVals::abortDisable, and gem5::ArmISA::ArmFaultVals< T >::vals.

armPcElrOffset()

template<typename T >

uint8_t gem5::ArmISA::ArmFaultVals< T >::armPcElrOffset ( )

inlineoverridevirtual

Implements gem5::ArmISA::ArmFault.

Definition at line 298 of file faults.hh.

References gem5::ArmISA::ArmFault::FaultVals::armPcElrOffset, and gem5::ArmISA::ArmFaultVals< T >::vals.

armPcOffset()

template<typename T >

uint8_t gem5::ArmISA::ArmFaultVals< T >::armPcOffset ( bool  is_hyp )

inlineoverridevirtual

Implements gem5::ArmISA::ArmFault.

Definition at line 285 of file faults.hh.

References gem5::ArmISA::ArmFault::FaultVals::armPcElrOffset, gem5::ArmISA::ArmFault::FaultVals::armPcOffset, and gem5::ArmISA::ArmFaultVals< T >::vals.

ec()

template<typename T >

ExceptionClass gem5::ArmISA::ArmFaultVals< T >::ec ( ThreadContext *  tc ) const

inlineoverridevirtual

Syndrome methods.

Implements gem5::ArmISA::ArmFault.

Reimplemented in gem5::ArmISA::DataAbort, and gem5::ArmISA::PrefetchAbort.

Definition at line 304 of file faults.hh.

References gem5::ArmISA::ArmFault::FaultVals::ec, and gem5::ArmISA::ArmFaultVals< T >::vals.

Referenced by gem5::ArmISA::PrefetchAbort::ec(), gem5::ArmISA::DataAbort::ec(), and gem5::ArmISA::ArmFaultVals< T >::il().

fiqDisable()

template<typename T >

bool gem5::ArmISA::ArmFaultVals< T >::fiqDisable ( ThreadContext *  tc )

inlineoverridevirtual

Implements gem5::ArmISA::ArmFault.

Definition at line 301 of file faults.hh.

References gem5::ArmISA::ArmFault::FaultVals::fiqDisable, and gem5::ArmISA::ArmFaultVals< T >::vals.

il()

template<typename T >

bool gem5::ArmISA::ArmFaultVals< T >::il ( ThreadContext *  tc ) const

inlineoverridevirtual

Implements gem5::ArmISA::ArmFault.

Reimplemented in gem5::ArmISA::DataAbort, and gem5::ArmISA::PrefetchAbort.

Definition at line 306 of file faults.hh.

References gem5::ArmISA::ArmFaultVals< T >::ec(), gem5::ArmISA::ArmFault::machInst, and gem5::ArmISA::UNKNOWN.

Referenced by gem5::ArmISA::DataAbort::il().

iss()

template<typename T >

uint32_t gem5::ArmISA::ArmFaultVals< T >::iss ( ) const

inlineoverridevirtual

Implements gem5::ArmISA::ArmFault.

Reimplemented in gem5::ArmISA::DataAbort, and gem5::ArmISA::PrefetchAbort.

Definition at line 312 of file faults.hh.

References gem5::ArmISA::ArmFault::issRaw.

name()

template<typename T >

FaultName gem5::ArmISA::ArmFaultVals< T >::name ( ) const

inlineoverridevirtual

Implements gem5::FaultBase.

Definition at line 271 of file faults.hh.

References gem5::ArmISA::ArmFault::FaultVals::name, and gem5::ArmISA::ArmFaultVals< T >::vals.

nextMode()

template<typename T >

OperatingMode gem5::ArmISA::ArmFaultVals< T >::nextMode ( )

inlineoverridevirtual

Implements gem5::ArmISA::ArmFault.

Definition at line 276 of file faults.hh.

References gem5::ArmISA::ArmFault::FaultVals::nextMode, and gem5::ArmISA::ArmFaultVals< T >::vals.

offset()

template<class T >

FaultOffset gem5::ArmISA::ArmFaultVals< T >::offset ( ThreadContext *  tc )

overridevirtual

Implements gem5::ArmISA::ArmFault.

Definition at line 958 of file faults.cc.

References gem5::ArmISA::MISCREG_CPSR, gem5::ArmISA::MISCREG_SPSR_HYP, gem5::ArmISA::MODE_HYP, and gem5::ThreadContext::readMiscReg().

offset64()

template<class T >

FaultOffset gem5::ArmISA::ArmFaultVals< T >::offset64 ( ThreadContext *  tc )

overridevirtual

Implements gem5::ArmISA::ArmFault.

Definition at line 978 of file faults.cc.

References gem5::ArmISA::EL0, gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL2Enabled(), gem5::ArmISA::EL3, gem5::ArmISA::ELIs32(), gem5::ArmISA::ELIsInHost(), and gem5::ArmISA::opModeIsT().

routeToMonitor()

template<typename T >

virtual bool gem5::ArmISA::ArmFaultVals< T >::routeToMonitor ( ThreadContext *  tc ) const

inlineoverridevirtual

Implements gem5::ArmISA::ArmFault.

Reimplemented in gem5::ArmISA::SystemError, gem5::ArmISA::FastInterrupt, gem5::ArmISA::Interrupt, gem5::ArmISA::DataAbort, gem5::ArmISA::PrefetchAbort, and gem5::ArmISA::HypervisorCall.

Definition at line 279 of file faults.hh.

thumbPcElrOffset()

template<typename T >

uint8_t gem5::ArmISA::ArmFaultVals< T >::thumbPcElrOffset ( )

inlineoverridevirtual

Implements gem5::ArmISA::ArmFault.

Definition at line 299 of file faults.hh.

References gem5::ArmISA::ArmFault::FaultVals::thumbPcElrOffset, and gem5::ArmISA::ArmFaultVals< T >::vals.

thumbPcOffset()

template<typename T >

uint8_t gem5::ArmISA::ArmFaultVals< T >::thumbPcOffset ( bool  is_hyp )

inlineoverridevirtual

Implements gem5::ArmISA::ArmFault.

Definition at line 292 of file faults.hh.

References gem5::ArmISA::ArmFault::FaultVals::thumbPcElrOffset, gem5::ArmISA::ArmFault::FaultVals::thumbPcOffset, and gem5::ArmISA::ArmFaultVals< T >::vals.

vals() [1/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< ArmSev >::vals ( "ArmSev Flush"  , 0x000  , 0x000  , 0x000  , 0x000  , 0x000  , MODE_SVC  , 0  , 0  , 0  , 0  , false  , true  , true  , ExceptionClass::UNKNOWN    )

protected

vals() [2/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< DataAbort >::vals ( "Data Abort"  , 0x010  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_ABORT  , 8  , 8  , 0  , 0  , true  , true  , false  , ExceptionClass::DATA_ABORT_TO_HYP    )

protected

vals() [3/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< FastInterrupt >::vals ( "FIQ"  , 0x01C  , 0x100  , 0x300  , 0x500  , 0x700  , MODE_FIQ  , 4  , 4  , 0  , 0  , false  , true  , true  , ExceptionClass::UNKNOWN    )

protected

vals() [4/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >::vals ( "Hardware Breakpoint"  , 0x000  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_SVC  , 0  , 0  , 0  , 0  , true  , false  , false  , ExceptionClass::HW_BREAKPOINT    )

protected

vals() [5/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< HypervisorCall >::vals ( "Hypervisor Call"  , 0x008  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_HYP  , 4  , 4  , 4  , 4  , true  , false  , false  , ExceptionClass::HVC    )

protected

vals() [6/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< HypervisorTrap >::vals ( "Hypervisor Trap"  , 0x014  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_HYP  , 0  , 0  , 0  , 0  , false  , false  , false  , ExceptionClass::UNKNOWN    )

protected

vals() [7/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >::vals ( "Illegal Inst Set State Fault"  , 0x004  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_UNDEFINED  , 4  , 2  , 0  , 0  , true  , false  , false  , ExceptionClass::ILLEGAL_INST    )

protected

vals() [8/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< Interrupt >::vals ( "IRQ"  , 0x018  , 0x080  , 0x280  , 0x480  , 0x680  , MODE_IRQ  , 4  , 4  , 0  , 0  , false  , true  , false  , ExceptionClass::UNKNOWN    )

protected

vals() [9/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< PCAlignmentFault >::vals ( "PC Alignment Fault"  , 0x000  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_SVC  , 0  , 0  , 0  , 0  , true  , false  , false  , ExceptionClass::PC_ALIGNMENT    )

protected

vals() [10/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< PrefetchAbort >::vals ( "Prefetch Abort"  , 0x00C  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_ABORT  , 4  , 4  , 0  , 0  , true  , true  , false  , ExceptionClass::PREFETCH_ABORT_TO_HYP    )

protected

vals() [11/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< Reset >::vals ( "Reset"  , 0x000  , 0x000  , 0x000  , 0x000  , 0x000  , MODE_SVC  , 0  , 0  , 0  , 0  , false  , true  , true  , ExceptionClass::UNKNOWN    )

protected

vals() [12/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SecureMonitorCall >::vals ( "Secure Monitor Call"  , 0x008  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_MON  , 4  , 4  , 4  , 4  , false  , true  , true  , ExceptionClass::SMC_TO_HYP    )

protected

vals() [13/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >::vals ( "Secure Monitor Trap"  , 0x004  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_MON  , 4  , 2  , 0  , 0  , false  , false  , false  , ExceptionClass::UNKNOWN    )

protected

vals() [14/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SystemError >::vals ( "SError"  , 0x000  , 0x180  , 0x380  , 0x580  , 0x780  , MODE_SVC  , 0  , 0  , 0  , 0  , false  , true  , true  , ExceptionClass::SERROR    )

protected

vals() [15/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >::vals ( "Software Breakpoint"  , 0x000  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_SVC  , 0  , 0  , 0  , 0  , true  , false  , false  , ExceptionClass::SOFTWARE_BREAKPOINT    )

protected

vals() [16/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SoftwareStepFault >::vals ( "SoftwareStep"  , 0x000  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_SVC  , 0  , 0  , 0  , 0  , true  , false  , false  , ExceptionClass::SOFTWARE_STEP    )

protected

vals() [17/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SPAlignmentFault >::vals ( "SP Alignment Fault"  , 0x000  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_SVC  , 0  , 0  , 0  , 0  , true  , false  , false  , ExceptionClass::STACK_PTR_ALIGNMENT    )

protected

vals() [18/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SupervisorCall >::vals ( "Supervisor Call"  , 0x008  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_SVC  , 4  , 2  , 4  , 2  , true  , false  , false  , ExceptionClass::SVC_TO_HYP    )

protected

vals() [19/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SupervisorTrap >::vals ( "Supervisor Trap"  , 0x014  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_SVC  , 0  , 0  , 0  , 0  , false  , false  , false  , ExceptionClass::UNKNOWN    )

protected

vals() [20/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< UndefinedInstruction >::vals ( "Undefined Instruction"  , 0x004  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_UNDEFINED  , 4  , 2  , 0  , 0  , true  , false  , false  , ExceptionClass::UNKNOWN    )

protected

vals() [21/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< VirtualDataAbort >::vals ( "Virtual Data Abort"  , 0x010  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_ABORT  , 8  , 8  , 0  , 0  , true  , true  , false  , ExceptionClass::INVALID    )

protected

vals() [22/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >::vals ( "Virtual FIQ"  , 0x01C  , 0x100  , 0x300  , 0x500  , 0x700  , MODE_FIQ  , 4  , 4  , 0  , 0  , false  , true  , true  , ExceptionClass::INVALID    )

protected

vals() [23/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< VirtualInterrupt >::vals ( "Virtual IRQ"  , 0x018  , 0x080  , 0x280  , 0x480  , 0x680  , MODE_IRQ  , 4  , 4  , 0  , 0  , false  , true  , false  , ExceptionClass::INVALID    )

protected

vals() [24/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< Watchpoint >::vals ( "Watchpoint"  , 0x000  , 0x000  , 0x200  , 0x400  , 0x600  , MODE_SVC  , 0  , 0  , 0  , 0  , true  , false  , false  , ExceptionClass::WATCHPOINT    )

protected

vals() [25/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< Reset >::vals

protected

Definition at line 754 of file faults.hh.

vals() [26/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< UndefinedInstruction >::vals

protected

Definition at line 755 of file faults.hh.

vals() [27/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SupervisorCall >::vals

protected

Definition at line 756 of file faults.hh.

vals() [28/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SecureMonitorCall >::vals

protected

Definition at line 757 of file faults.hh.

vals() [29/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< HypervisorCall >::vals

protected

Definition at line 758 of file faults.hh.

vals() [30/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< PrefetchAbort >::vals

protected

Definition at line 759 of file faults.hh.

vals() [31/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< DataAbort >::vals

protected

Definition at line 760 of file faults.hh.

vals() [32/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< VirtualDataAbort >::vals

protected

Definition at line 761 of file faults.hh.

vals() [33/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< HypervisorTrap >::vals

protected

Definition at line 762 of file faults.hh.

vals() [34/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< Interrupt >::vals

protected

Definition at line 763 of file faults.hh.

vals() [35/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< VirtualInterrupt >::vals

protected

Definition at line 764 of file faults.hh.

vals() [36/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< FastInterrupt >::vals

protected

Definition at line 765 of file faults.hh.

vals() [37/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >::vals

protected

Definition at line 766 of file faults.hh.

vals() [38/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >::vals

protected

Definition at line 767 of file faults.hh.

vals() [39/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SupervisorTrap >::vals

protected

Definition at line 768 of file faults.hh.

vals() [40/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >::vals

protected

Definition at line 769 of file faults.hh.

vals() [41/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< PCAlignmentFault >::vals

protected

Definition at line 770 of file faults.hh.

vals() [42/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SPAlignmentFault >::vals

protected

Definition at line 771 of file faults.hh.

vals() [43/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SystemError >::vals

protected

Definition at line 772 of file faults.hh.

vals() [44/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >::vals

protected

Definition at line 773 of file faults.hh.

vals() [45/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >::vals

protected

Definition at line 774 of file faults.hh.

vals() [46/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< Watchpoint >::vals

protected

Definition at line 775 of file faults.hh.

vals() [47/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< SoftwareStepFault >::vals

protected

Definition at line 776 of file faults.hh.

vals() [48/48]

ArmFault::FaultVals gem5::ArmISA::ArmFaultVals< ArmSev >::vals

protected

Definition at line 777 of file faults.hh.

Member Data Documentation

vals

template<typename T >

FaultVals gem5::ArmISA::ArmFaultVals< T >::vals

staticprotected

Definition at line 266 of file faults.hh.

Referenced by gem5::ArmISA::ArmFaultVals< T >::abortDisable(), gem5::ArmISA::ArmFaultVals< T >::armPcElrOffset(), gem5::ArmISA::ArmFaultVals< T >::armPcOffset(), gem5::ArmISA::ArmFaultVals< T >::ec(), gem5::ArmISA::ArmFaultVals< T >::fiqDisable(), gem5::ArmISA::ArmFaultVals< T >::name(), gem5::ArmISA::ArmFaultVals< T >::nextMode(), gem5::ArmISA::ArmFaultVals< T >::thumbPcElrOffset(), and gem5::ArmISA::ArmFaultVals< T >::thumbPcOffset().

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The documentation for this class was generated from the following files:

• arch/arm/faults.hh
• arch/arm/faults.cc