#include <faults.hh>

Inheritance diagram for gem5::ArmISA::DataAbort:

Public Member Functions
	DataAbort (Addr _addr, TlbEntry::DomainType _domain, bool _write, uint8_t _source, bool _stage2=false, ArmFault::TranMethod _tranMethod=ArmFault::UnknownTran, ArmFault::DebugType _debug_type=ArmFault::NODEBUG)

bool	routeToMonitor (ThreadContext *tc) const override

bool	routeToHyp (ThreadContext *tc) const override

void	annotate (AnnotationIDs id, uint64_t val) override

uint32_t	vectorCatchFlag () const override

ExceptionClass	ec (ThreadContext *tc) const override
	Syndrome methods.

bool	il (ThreadContext *tc) const override

uint32_t	iss () const override

Public Member Functions inherited from gem5::ArmISA::AbortFault< DataAbort >
	AbortFault (Addr _faultAddr, bool _write, TlbEntry::DomainType _domain, uint8_t _source, bool _stage2, ArmFault::TranMethod _tranMethod=ArmFault::UnknownTran, ArmFault::DebugType _debug=ArmFault::NODEBUG)

bool	getFaultVAddr (Addr &va) const override

void	invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override

FSR	getFsr (ThreadContext *tc) const override

uint8_t	getFaultStatusCode (ThreadContext *tc) const

bool	abortDisable (ThreadContext *tc) override

bool	isStage2 () const override

void	setSyndrome (ThreadContext *tc, MiscRegIndex syndrome_reg) override

bool	isMMUFault () const

Public Member Functions inherited from gem5::ArmISA::ArmFaultVals< DataAbort >
	ArmFaultVals (ExtMachInst mach_inst=0, uint32_t _iss=0)

FaultName	name () const override

FaultOffset	offset (ThreadContext *tc) override

FaultOffset	offset64 (ThreadContext *tc) override

OperatingMode	nextMode () override

uint8_t	armPcOffset (bool is_hyp) override

uint8_t	thumbPcOffset (bool is_hyp) override

uint8_t	armPcElrOffset () override

uint8_t	thumbPcElrOffset () override

bool	abortDisable (ThreadContext *tc) override

bool	fiqDisable (ThreadContext *tc) override

Public Member Functions inherited from gem5::ArmISA::ArmFault
	ArmFault (ExtMachInst mach_inst=0, uint32_t _iss=0)

MiscRegIndex	getSyndromeReg64 () const

void	invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override

void	invoke32 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)

void	invoke64 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)

void	update (ThreadContext *tc)

bool	isResetSPSR ()

bool	vectorCatch (ThreadContext *tc, const StaticInstPtr &inst)

ArmStaticInst *	instrAnnotate (const StaticInstPtr &inst)

OperatingMode	getToMode () const

Public Member Functions inherited from gem5::FaultBase
virtual	~FaultBase ()

Public Attributes
bool	isv

uint8_t	sas

uint8_t	sse

uint8_t	srt

uint8_t	cm

bool	sf

bool	ar

Static Public Attributes
static const MiscRegIndex	FsrIndex = MISCREG_DFSR

static const MiscRegIndex	FarIndex = MISCREG_DFAR

static const MiscRegIndex	HFarIndex = MISCREG_HDFAR

Static Public Attributes inherited from gem5::ArmISA::ArmFault
static uint8_t	shortDescFaultSources [NumFaultSources]
	Encodings of the fault sources when the short-desc.

static uint8_t	longDescFaultSources [NumFaultSources]
	Encodings of the fault sources when the long-desc.

static uint8_t	aarch64FaultSources [NumFaultSources]
	Encodings of the fault sources in AArch64 state.

Additional Inherited Members
Public Types inherited from gem5::ArmISA::ArmFault
enum	FaultSource { AlignmentFault = 0 , InstructionCacheMaintenance , SynchExtAbtOnTranslTableWalkLL , SynchPtyErrOnTranslTableWalkLL = SynchExtAbtOnTranslTableWalkLL + 4 , TranslationLL = SynchPtyErrOnTranslTableWalkLL + 4 , AccessFlagLL = TranslationLL + 4 , DomainLL = AccessFlagLL + 4 , PermissionLL = DomainLL + 4 , DebugEvent = PermissionLL + 4 , SynchronousExternalAbort , TLBConflictAbort , SynchPtyErrOnMemoryAccess , AsynchronousExternalAbort , AsynchPtyErrOnMemoryAccess , AddressSizeLL , PrefetchTLBMiss = AddressSizeLL + 4 , PrefetchUncacheable , NumFaultSources , FaultSourceInvalid = 0xff }
	Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use. More...

enum	AnnotationIDs { S1PTW , OVA , SAS , SSE , SRT , CM , OFA , SF , AR }

enum	TranMethod { LpaeTran , VmsaTran , UnknownTran }

enum	DebugType { NODEBUG = 0 , BRKPOINT , VECTORCATCH , WPOINT_CM , WPOINT_NOCM }

Protected Member Functions inherited from gem5::ArmISA::ArmFaultVals< DataAbort >
ArmFault::FaultVals	vals ("Reset", 0x000, 0x000, 0x000, 0x000, 0x000, MODE_SVC, 0, 0, 0, 0, false, true, true, ExceptionClass::UNKNOWN)

ArmFault::FaultVals	vals ("Undefined Instruction", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_UNDEFINED, 4, 2, 0, 0, true, false, false, ExceptionClass::UNKNOWN)

ArmFault::FaultVals	vals ("Supervisor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 4, 2, 4, 2, true, false, false, ExceptionClass::SVC_TO_HYP)

ArmFault::FaultVals	vals ("Secure Monitor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_MON, 4, 4, 4, 4, false, true, true, ExceptionClass::SMC_TO_HYP)

ArmFault::FaultVals	vals ("Hypervisor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_HYP, 4, 4, 4, 4, true, false, false, ExceptionClass::HVC)

ArmFault::FaultVals	vals ("Prefetch Abort", 0x00C, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 4, 4, 0, 0, true, true, false, ExceptionClass::PREFETCH_ABORT_TO_HYP)

ArmFault::FaultVals	vals ("Data Abort", 0x010, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 8, 8, 0, 0, true, true, false, ExceptionClass::DATA_ABORT_TO_HYP)

ArmFault::FaultVals	vals ("Virtual Data Abort", 0x010, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 8, 8, 0, 0, true, true, false, ExceptionClass::INVALID)

ArmFault::FaultVals	vals ("Hypervisor Trap", 0x014, 0x000, 0x200, 0x400, 0x600, MODE_HYP, 0, 0, 0, 0, false, false, false, ExceptionClass::UNKNOWN)

ArmFault::FaultVals	vals ("Secure Monitor Trap", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_MON, 4, 2, 0, 0, false, false, false, ExceptionClass::UNKNOWN)

ArmFault::FaultVals	vals ("IRQ", 0x018, 0x080, 0x280, 0x480, 0x680, MODE_IRQ, 4, 4, 0, 0, false, true, false, ExceptionClass::UNKNOWN)

ArmFault::FaultVals	vals ("Virtual IRQ", 0x018, 0x080, 0x280, 0x480, 0x680, MODE_IRQ, 4, 4, 0, 0, false, true, false, ExceptionClass::INVALID)

ArmFault::FaultVals	vals ("FIQ", 0x01C, 0x100, 0x300, 0x500, 0x700, MODE_FIQ, 4, 4, 0, 0, false, true, true, ExceptionClass::UNKNOWN)

ArmFault::FaultVals	vals ("Virtual FIQ", 0x01C, 0x100, 0x300, 0x500, 0x700, MODE_FIQ, 4, 4, 0, 0, false, true, true, ExceptionClass::INVALID)

ArmFault::FaultVals	vals ("Illegal Inst Set State Fault", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_UNDEFINED, 4, 2, 0, 0, true, false, false, ExceptionClass::ILLEGAL_INST)

ArmFault::FaultVals	vals ("Supervisor Trap", 0x014, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, false, false, false, ExceptionClass::UNKNOWN)

ArmFault::FaultVals	vals ("PC Alignment Fault", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::PC_ALIGNMENT)

ArmFault::FaultVals	vals ("SP Alignment Fault", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::STACK_PTR_ALIGNMENT)

ArmFault::FaultVals	vals ("SError", 0x000, 0x180, 0x380, 0x580, 0x780, MODE_SVC, 0, 0, 0, 0, false, true, true, ExceptionClass::SERROR)

ArmFault::FaultVals	vals ("Software Breakpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::SOFTWARE_BREAKPOINT)

ArmFault::FaultVals	vals ("Hardware Breakpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::HW_BREAKPOINT)

ArmFault::FaultVals	vals ("Watchpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::WATCHPOINT)

ArmFault::FaultVals	vals ("SoftwareStep", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::SOFTWARE_STEP)

ArmFault::FaultVals	vals ("ArmSev Flush", 0x000, 0x000, 0x000, 0x000, 0x000, MODE_SVC, 0, 0, 0, 0, false, true, true, ExceptionClass::UNKNOWN)

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

ArmFault::FaultVals	vals

Protected Member Functions inherited from gem5::ArmISA::ArmFault
virtual Addr	getVector (ThreadContext *tc)

Addr	getVector64 (ThreadContext *tc)

Protected Attributes inherited from gem5::ArmISA::AbortFault< DataAbort >
Addr	faultAddr
	The virtual address the fault occured at.

Addr	OVAddr
	Original virtual address.

bool	write

TlbEntry::DomainType	domain

uint8_t	source

uint8_t	srcEncoded

bool	stage2

bool	s1ptw

ArmFault::TranMethod	tranMethod

ArmFault::DebugType	debugType

Protected Attributes inherited from gem5::ArmISA::ArmFault
ExtMachInst	machInst

uint32_t	issRaw

bool	bStep

bool	from64

bool	to64

ExceptionLevel	fromEL

ExceptionLevel	toEL

OperatingMode	fromMode

OperatingMode	toMode

bool	faultUpdated

bool	hypRouted

bool	span

Static Protected Attributes inherited from gem5::ArmISA::ArmFaultVals< DataAbort >
static FaultVals	vals

Detailed Description

Definition at line 540 of file faults.hh.

Constructor & Destructor Documentation

◆ DataAbort()

gem5::ArmISA::DataAbort::DataAbort	(	Addr	_addr,
		TlbEntry::DomainType	_domain,
		bool	_write,
		uint8_t	_source,
		bool	_stage2 = false,
		ArmFault::TranMethod	_tranMethod = ArmFault::UnknownTran,
		ArmFault::DebugType	_debug_type = ArmFault::NODEBUG )

inline

Definition at line 556 of file faults.hh.

Member Function Documentation

◆ annotate()

void gem5::ArmISA::DataAbort::annotate	(	AnnotationIDs	id,
		uint64_t	val )

overridevirtual

Reimplemented from gem5::ArmISA::AbortFault< DataAbort >.

Definition at line 1385 of file faults.cc.

References gem5::ArmISA::AbortFault< T >::annotate(), gem5::ArmISA::ArmFault::AR, ar, gem5::ArmISA::ArmFault::CM, cm, gem5::ArmISA::AbortFault< DataAbort >::faultAddr, isv, gem5::ArmISA::ArmFault::OFA, gem5::ArmISA::ArmFault::SAS, sas, gem5::ArmISA::ArmFault::SF, sf, gem5::ArmISA::ArmFault::SRT, srt, gem5::ArmISA::ArmFault::SSE, sse, and gem5::X86ISA::val.

◆ ec()

ExceptionClass gem5::ArmISA::DataAbort::ec ( ThreadContext * tc ) const

overridevirtual

Syndrome methods.

Reimplemented from gem5::ArmISA::ArmFaultVals< DataAbort >.

Definition at line 1291 of file faults.cc.

References gem5::ArmISA::ArmFault::AsynchronousExternalAbort, gem5::ArmISA::DATA_ABORT_CURR_EL, gem5::ArmISA::DATA_ABORT_LOWER_EL, gem5::ArmISA::ArmFaultVals< T >::ec(), gem5::ArmISA::ec, gem5::ArmISA::ArmFault::fromEL, gem5::ArmISA::MISCREG_SPSR_HYP, gem5::ArmISA::MODE_HYP, panic, gem5::ThreadContext::readMiscReg(), gem5::ArmISA::AbortFault< DataAbort >::source, gem5::ArmISA::ArmFault::to64, and gem5::ArmISA::ArmFault::toEL.

◆ il()

bool gem5::ArmISA::DataAbort::il ( ThreadContext * tc ) const

overridevirtual

Reimplemented from gem5::ArmISA::ArmFaultVals< DataAbort >.

Definition at line 1320 of file faults.cc.

References gem5::ArmISA::ArmFault::il(), and isv.

◆ iss()

uint32_t gem5::ArmISA::DataAbort::iss ( ) const

overridevirtual

Reimplemented from gem5::ArmISA::ArmFaultVals< DataAbort >.

Definition at line 1357 of file faults.cc.

References ar, cm, gem5::ArmISA::EL2, iss(), isv, gem5::ArmISA::AbortFault< DataAbort >::s1ptw, sas, sf, gem5::ArmISA::AbortFault< DataAbort >::srcEncoded, srt, sse, gem5::ArmISA::AbortFault< DataAbort >::stage2, gem5::ArmISA::ArmFault::to64, gem5::ArmISA::ArmFault::toEL, and gem5::ArmISA::AbortFault< DataAbort >::write.

Referenced by iss().

◆ routeToHyp()

bool gem5::ArmISA::DataAbort::routeToHyp ( ThreadContext * tc ) const

overridevirtual

Reimplemented from gem5::ArmISA::ArmFault.

Definition at line 1333 of file faults.cc.

References gem5::ArmISA::amo, gem5::ArmISA::ArmFault::AsynchronousExternalAbort, gem5::ArmISA::ArmFault::DebugEvent, gem5::ArmISA::EL0, gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL2Enabled(), gem5::ArmISA::ArmFault::fromEL, gem5::ArmISA::HaveExt(), gem5::ArmISA::MISCREG_HCR_EL2, gem5::ArmISA::MISCREG_HDCR, gem5::ThreadContext::readMiscRegNoEffect(), gem5::ArmISA::AbortFault< DataAbort >::source, gem5::ArmISA::AbortFault< DataAbort >::stage2, and gem5::ArmISA::ArmFault::SynchronousExternalAbort.

◆ routeToMonitor()

bool gem5::ArmISA::DataAbort::routeToMonitor ( ThreadContext * tc ) const

overridevirtual

Reimplemented from gem5::ArmISA::ArmFaultVals< DataAbort >.

Definition at line 1326 of file faults.cc.

References gem5::ArmISA::AbortFault< DataAbort >::isMMUFault(), gem5::ArmISA::MISCREG_SCR_EL3, and gem5::ThreadContext::readMiscRegNoEffect().

◆ vectorCatchFlag()

uint32_t gem5::ArmISA::DataAbort::vectorCatchFlag ( ) const

inlineoverridevirtual

Reimplemented from gem5::ArmISA::ArmFault.

Definition at line 569 of file faults.hh.

Member Data Documentation

◆ ar

bool gem5::ArmISA::DataAbort::ar

Definition at line 554 of file faults.hh.

Referenced by annotate(), and iss().

◆ cm

uint8_t gem5::ArmISA::DataAbort::cm

Definition at line 550 of file faults.hh.

Referenced by annotate(), and iss().

◆ FarIndex

const MiscRegIndex gem5::ArmISA::DataAbort::FarIndex = MISCREG_DFAR

static

Definition at line 544 of file faults.hh.

◆ FsrIndex

const MiscRegIndex gem5::ArmISA::DataAbort::FsrIndex = MISCREG_DFSR

static

Definition at line 543 of file faults.hh.

◆ HFarIndex

const MiscRegIndex gem5::ArmISA::DataAbort::HFarIndex = MISCREG_HDFAR

static

Definition at line 545 of file faults.hh.

◆ isv

bool gem5::ArmISA::DataAbort::isv

Definition at line 546 of file faults.hh.

Referenced by annotate(), il(), and iss().

◆ sas

uint8_t gem5::ArmISA::DataAbort::sas

Definition at line 547 of file faults.hh.

Referenced by annotate(), and iss().

◆ sf

bool gem5::ArmISA::DataAbort::sf

Definition at line 553 of file faults.hh.

Referenced by annotate(), and iss().

◆ srt

uint8_t gem5::ArmISA::DataAbort::srt

Definition at line 549 of file faults.hh.

Referenced by annotate(), and iss().

◆ sse

uint8_t gem5::ArmISA::DataAbort::sse

Definition at line 548 of file faults.hh.

Referenced by annotate(), and iss().

The documentation for this class was generated from the following files:

arch/arm/faults.hh
arch/arm/faults.cc

Public Member Functions

Public Attributes

Static Public Attributes

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

◆ DataAbort()

Member Function Documentation

◆ annotate()

◆ ec()

◆ il()

◆ iss()

◆ routeToHyp()

◆ routeToMonitor()

◆ vectorCatchFlag()

Member Data Documentation

◆ ar

◆ cm

◆ FarIndex

◆ FsrIndex

◆ HFarIndex

◆ isv

◆ sas

◆ sf

◆ srt

◆ sse