gem5::ArmISA::ArmFault Class Reference

#include <faults.hh>

Inheritance diagram for gem5::ArmISA::ArmFault:

Classes
struct	FaultVals

Public Types
enum	FaultSource {   AlignmentFault = 0 , InstructionCacheMaintenance , SynchExtAbtOnTranslTableWalkLL , SynchPtyErrOnTranslTableWalkLL = SynchExtAbtOnTranslTableWalkLL + 4 ,   TranslationLL = SynchPtyErrOnTranslTableWalkLL + 4 , AccessFlagLL = TranslationLL + 4 , DomainLL = AccessFlagLL + 4 , PermissionLL = DomainLL + 4 ,   DebugEvent = PermissionLL + 4 , SynchronousExternalAbort , TLBConflictAbort , SynchPtyErrOnMemoryAccess ,   AsynchronousExternalAbort , AsynchPtyErrOnMemoryAccess , AddressSizeLL , PrefetchTLBMiss = AddressSizeLL + 4 ,   PrefetchUncacheable , NumFaultSources , FaultSourceInvalid = 0xff }
	Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use. More...
enum	AnnotationIDs {   S1PTW , OVA , SAS , SSE ,   SRT , CM , OFA , SF ,   AR }
enum	TranMethod { LpaeTran , VmsaTran , UnknownTran }
enum	DebugType {   NODEBUG = 0 , BRKPOINT , VECTORCATCH , WPOINT_CM ,   WPOINT_NOCM }

Public Member Functions
	ArmFault (ExtMachInst mach_inst=0, uint32_t _iss=0)
MiscRegIndex	getSyndromeReg64 () const
MiscRegIndex	getFaultAddrReg64 () const
void	invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
void	invoke32 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
void	invoke64 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
void	update (ThreadContext *tc)
bool	isResetSPSR ()
bool	vectorCatch (ThreadContext *tc, const StaticInstPtr &inst)
ArmStaticInst *	instrAnnotate (const StaticInstPtr &inst)
virtual void	annotate (AnnotationIDs id, uint64_t val)
virtual FaultOffset	offset (ThreadContext *tc)=0
virtual FaultOffset	offset64 (ThreadContext *tc)=0
virtual OperatingMode	nextMode ()=0
virtual bool	routeToMonitor (ThreadContext *tc) const =0
virtual bool	routeToHyp (ThreadContext *tc) const
virtual uint8_t	armPcOffset (bool is_hyp)=0
virtual uint8_t	thumbPcOffset (bool is_hyp)=0
virtual uint8_t	armPcElrOffset ()=0
virtual uint8_t	thumbPcElrOffset ()=0
virtual bool	abortDisable (ThreadContext *tc)=0
virtual bool	fiqDisable (ThreadContext *tc)=0
virtual ExceptionClass	ec (ThreadContext *tc) const =0
virtual bool	il (ThreadContext *tc) const =0
virtual uint32_t	iss () const =0
virtual uint32_t	vectorCatchFlag () const
virtual bool	isStage2 () const
virtual FSR	getFsr (ThreadContext *tc) const
virtual void	setSyndrome (ThreadContext *tc, MiscRegIndex syndrome_reg)
virtual bool	getFaultVAddr (Addr &va) const
OperatingMode	getToMode () const
Public Member Functions inherited from gem5::FaultBase
virtual FaultName	name () const =0
virtual	~FaultBase ()

Static Public Attributes
static uint8_t	shortDescFaultSources [NumFaultSources]
	Encodings of the fault sources when the short-desc. More...
static uint8_t	longDescFaultSources [NumFaultSources]
	Encodings of the fault sources when the long-desc. More...
static uint8_t	aarch64FaultSources [NumFaultSources]
	Encodings of the fault sources in AArch64 state. More...

Protected Member Functions
virtual Addr	getVector (ThreadContext *tc)
Addr	getVector64 (ThreadContext *tc)

Protected Attributes
ExtMachInst	machInst
uint32_t	issRaw
bool	bStep
bool	from64
bool	to64
ExceptionLevel	fromEL
ExceptionLevel	toEL
OperatingMode	fromMode
OperatingMode	toMode
bool	faultUpdated
bool	hypRouted
bool	span

Detailed Description

Definition at line 64 of file faults.hh.

Member Enumeration Documentation

AnnotationIDs

enum gem5::ArmISA::ArmFault::AnnotationIDs

Enumerator
S1PTW
OVA
SAS
SSE
SRT
CM
OFA
SF
AR

Definition at line 132 of file faults.hh.

DebugType

enum gem5::ArmISA::ArmFault::DebugType

Enumerator
NODEBUG
BRKPOINT
VECTORCATCH
WPOINT_CM
WPOINT_NOCM

Definition at line 157 of file faults.hh.

FaultSource

enum gem5::ArmISA::ArmFault::FaultSource

Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use.

Enumerator
AlignmentFault
InstructionCacheMaintenance
SynchExtAbtOnTranslTableWalkLL
SynchPtyErrOnTranslTableWalkLL
TranslationLL
AccessFlagLL
DomainLL
PermissionLL
DebugEvent
SynchronousExternalAbort
TLBConflictAbort
SynchPtyErrOnMemoryAccess
AsynchronousExternalAbort
AsynchPtyErrOnMemoryAccess
AddressSizeLL
PrefetchTLBMiss
PrefetchUncacheable
NumFaultSources
FaultSourceInvalid

Definition at line 95 of file faults.hh.

TranMethod

enum gem5::ArmISA::ArmFault::TranMethod

Enumerator
LpaeTran
VmsaTran
UnknownTran

Definition at line 150 of file faults.hh.

Constructor & Destructor Documentation

ArmFault()

gem5::ArmISA::ArmFault::ArmFault ( ExtMachInst  mach_inst = 0, uint32_t  _iss = 0  )

inline

Definition at line 215 of file faults.hh.

Member Function Documentation

abortDisable()

virtual bool gem5::ArmISA::ArmFault::abortDisable ( ThreadContext *  tc )

pure virtual

Implemented in gem5::ArmISA::FastInterrupt, gem5::ArmISA::Interrupt, gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< VirtualDataAbort >, gem5::ArmISA::AbortFault< PrefetchAbort >, gem5::ArmISA::AbortFault< DataAbort >, gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

annotate()

virtual void gem5::ArmISA::ArmFault::annotate ( AnnotationIDs  id, uint64_t  val  )

inlinevirtual

Reimplemented in gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< VirtualDataAbort >, gem5::ArmISA::AbortFault< PrefetchAbort >, gem5::ArmISA::AbortFault< DataAbort >, gem5::ArmISA::Watchpoint, and gem5::ArmISA::DataAbort.

Definition at line 239 of file faults.hh.

Referenced by gem5::ArmISA::Watchpoint::annotate(), gem5::ArmISA::TableWalker::Stage2Walk::finish(), gem5::ArmISA::MMU::getResultTe(), and gem5::ArmISA::TableWalker::readDataUntimed().

armPcElrOffset()

virtual uint8_t gem5::ArmISA::ArmFault::armPcElrOffset ( )

pure virtual

Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

Referenced by invoke64().

armPcOffset()

virtual uint8_t gem5::ArmISA::ArmFault::armPcOffset ( bool  is_hyp )

pure virtual

Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

ec()

virtual ExceptionClass gem5::ArmISA::ArmFault::ec ( ThreadContext *  tc ) const

pure virtual

Implemented in gem5::ArmISA::SoftwareStepFault, gem5::ArmISA::Watchpoint, gem5::ArmISA::HardwareBreakpoint, gem5::ArmISA::SoftwareBreakpoint, gem5::ArmISA::DataAbort, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::HypervisorTrap, gem5::ArmISA::HypervisorCall, gem5::ArmISA::SecureMonitorTrap, gem5::ArmISA::SupervisorTrap, gem5::ArmISA::SecureMonitorCall, gem5::ArmISA::SupervisorCall, gem5::ArmISA::UndefinedInstruction, gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

Referenced by setSyndrome().

fiqDisable()

virtual bool gem5::ArmISA::ArmFault::fiqDisable ( ThreadContext *  tc )

pure virtual

Implemented in gem5::ArmISA::FastInterrupt, gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

getFaultAddrReg64()

MiscRegIndex gem5::ArmISA::ArmFault::getFaultAddrReg64

(

)

const

Definition at line 382 of file faults.cc.

References gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmISA::MISCREG_FAR_EL1, gem5::ArmISA::MISCREG_FAR_EL2, gem5::ArmISA::MISCREG_FAR_EL3, panic, and toEL.

Referenced by gem5::ArmISA::PCAlignmentFault::invoke(), and gem5::ArmISA::Watchpoint::invoke().

getFaultVAddr()

virtual bool gem5::ArmISA::ArmFault::getFaultVAddr ( Addr &  va ) const

inlinevirtual

Reimplemented in gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< VirtualDataAbort >, gem5::ArmISA::AbortFault< PrefetchAbort >, and gem5::ArmISA::AbortFault< DataAbort >.

Definition at line 258 of file faults.hh.

Referenced by gem5::ArmISA::getFaultVAddr().

getFsr()

virtual FSR gem5::ArmISA::ArmFault::getFsr ( ThreadContext *  tc ) const

inlinevirtual

Reimplemented in gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< VirtualDataAbort >, gem5::ArmISA::AbortFault< PrefetchAbort >, and gem5::ArmISA::AbortFault< DataAbort >.

Definition at line 256 of file faults.hh.

Referenced by gem5::ArmISA::ISA::addressTranslation(), and gem5::ArmISA::ISA::addressTranslation64().

getSyndromeReg64()

MiscRegIndex gem5::ArmISA::ArmFault::getSyndromeReg64

(

)

const

Definition at line 366 of file faults.cc.

References gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmISA::MISCREG_ESR_EL1, gem5::ArmISA::MISCREG_ESR_EL2, gem5::ArmISA::MISCREG_ESR_EL3, panic, and toEL.

Referenced by invoke64().

getToMode()

OperatingMode gem5::ArmISA::ArmFault::getToMode ( ) const

inline

Definition at line 259 of file faults.hh.

References toMode.

Referenced by gem5::ArmISA::VectorCatch::exceptionTrapping().

getVector()

Addr gem5::ArmISA::ArmFault::getVector ( ThreadContext *  tc )

protectedvirtual

Reimplemented in gem5::ArmISA::Reset.

Definition at line 311 of file faults.cc.

References gem5::X86ISA::base, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmSystem::haveEL(), gem5::ArmISA::HighVecs, gem5::ArmISA::MISCREG_CPSR, gem5::ArmISA::MISCREG_HVBAR, gem5::ArmISA::MISCREG_MVBAR, gem5::ArmISA::MISCREG_SCTLR, gem5::ArmISA::MISCREG_VBAR, gem5::ArmISA::MODE_HYP, gem5::ArmISA::MODE_MON, offset(), gem5::ThreadContext::readMiscReg(), and gem5::ThreadContext::readMiscRegNoEffect().

getVector64()

Addr gem5::ArmISA::ArmFault::getVector64 ( ThreadContext *  tc )

protected

Definition at line 343 of file faults.cc.

References gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmSystem::haveEL(), gem5::ArmISA::MISCREG_VBAR_EL1, gem5::ArmISA::MISCREG_VBAR_EL2, gem5::ArmISA::MISCREG_VBAR_EL3, offset64(), panic, gem5::ThreadContext::readMiscReg(), and toEL.

Referenced by invoke64().

il()

virtual bool gem5::ArmISA::ArmFault::il ( ThreadContext *  tc ) const

pure virtual

Implemented in gem5::ArmISA::IllegalInstSetStateFault, gem5::ArmISA::SoftwareStepFault, gem5::ArmISA::Watchpoint, gem5::ArmISA::HardwareBreakpoint, gem5::ArmISA::SystemError, gem5::ArmISA::SPAlignmentFault, gem5::ArmISA::PCAlignmentFault, gem5::ArmISA::DataAbort, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

Referenced by setSyndrome().

instrAnnotate()

ArmStaticInst * gem5::ArmISA::ArmFault::instrAnnotate

(

const StaticInstPtr &

inst

)

Definition at line 747 of file faults.cc.

References gem5::ArmISA::ArmStaticInst::annotateFault(), and gem5::RefCountingPtr< T >::get().

Referenced by invoke64().

invoke()

void gem5::ArmISA::ArmFault::invoke ( ThreadContext *  tc, const StaticInstPtr &  inst = nullStaticInstPtr  )

overridevirtual

Reimplemented from gem5::FaultBase.

Reimplemented in gem5::ArmISA::ArmSev, gem5::ArmISA::Watchpoint, gem5::ArmISA::HardwareBreakpoint, gem5::ArmISA::SystemError, gem5::ArmISA::PCAlignmentFault, gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< VirtualDataAbort >, gem5::ArmISA::AbortFault< PrefetchAbort >, gem5::ArmISA::AbortFault< DataAbort >, gem5::ArmISA::SecureMonitorCall, gem5::ArmISA::SupervisorCall, gem5::ArmISA::UndefinedInstruction, gem5::ArmISA::Reset, and gem5::ArmISA::VirtualDataAbort.

Definition at line 477 of file faults.cc.

References from64, invoke32(), invoke64(), gem5::ArmISA::syncVecElemsToRegs(), gem5::ArmISA::syncVecRegsToElems(), to64, and update().

Referenced by gem5::ArmISA::Reset::invoke(), gem5::ArmISA::UndefinedInstruction::invoke(), gem5::ArmISA::SupervisorCall::invoke(), gem5::ArmISA::SecureMonitorCall::invoke(), gem5::ArmISA::AbortFault< T >::invoke(), gem5::ArmISA::PCAlignmentFault::invoke(), gem5::ArmISA::SystemError::invoke(), gem5::ArmISA::HardwareBreakpoint::invoke(), and gem5::ArmISA::Watchpoint::invoke().

invoke32()

void gem5::ArmISA::ArmFault::invoke32	(	ThreadContext *	tc,
		const StaticInstPtr &	inst = nullStaticInstPtr
	)

Definition at line 504 of file faults.cc.

Referenced by invoke().

invoke64()

void gem5::ArmISA::ArmFault::invoke64	(	ThreadContext *	tc,
		const StaticInstPtr &	inst = nullStaticInstPtr
	)

Definition at line 637 of file faults.cc.

References armPcElrOffset(), gem5::PCStateBase::as(), gem5::ArmISA::cc_reg::C, gem5::csprintf(), DPRINTF, gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmISA::ArmStaticInst::encoding(), from64, gem5::ArmISA::cc_reg::Ge, gem5::ThreadContext::getReg(), getSyndromeReg64(), getVector64(), gem5::ArmSystem::haveEL(), gem5::PCStateBase::instAddr(), instrAnnotate(), isResetSPSR(), gem5::ArmISA::itstate, gem5::ArmISA::MISCREG_CPSR, gem5::ArmISA::MISCREG_ELR_EL1, gem5::ArmISA::MISCREG_ELR_EL2, gem5::ArmISA::MISCREG_ELR_EL3, gem5::ArmISA::MISCREG_SPSR_EL1, gem5::ArmISA::MISCREG_SPSR_EL2, gem5::ArmISA::MISCREG_SPSR_EL3, gem5::ArmISA::mode, gem5::ArmISA::MODE_FIQ, gem5::ArmISA::MODE_IRQ, gem5::FaultBase::name(), nextMode(), gem5::ArmISA::cc_reg::Nz, panic, gem5::MipsISA::pc, gem5::ThreadContext::pcState(), gem5::ArmISA::purifyTaggedAddr(), gem5::ThreadContext::readMiscReg(), gem5::ThreadContext::setMiscReg(), setSyndrome(), span, thumbPcElrOffset(), toEL, and gem5::ArmISA::cc_reg::V.

Referenced by invoke().

isResetSPSR()

bool gem5::ArmISA::ArmFault::isResetSPSR ( )

inline

Definition at line 234 of file faults.hh.

References bStep.

Referenced by invoke64().

iss()

virtual uint32_t gem5::ArmISA::ArmFault::iss ( ) const

pure virtual

Implemented in gem5::ArmISA::SoftwareStepFault, gem5::ArmISA::Watchpoint, gem5::ArmISA::DataAbort, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::SupervisorTrap, gem5::ArmISA::SecureMonitorCall, gem5::ArmISA::SupervisorCall, gem5::ArmISA::UndefinedInstruction, gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

Referenced by gem5::ArmISA::ISA::addressTranslation(), gem5::ArmISA::ISA::addressTranslation64(), and setSyndrome().

isStage2()

virtual bool gem5::ArmISA::ArmFault::isStage2 ( ) const

inlinevirtual

Reimplemented in gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< VirtualDataAbort >, gem5::ArmISA::AbortFault< PrefetchAbort >, and gem5::ArmISA::AbortFault< DataAbort >.

Definition at line 255 of file faults.hh.

Referenced by gem5::ArmISA::ISA::addressTranslation(), and gem5::ArmISA::ISA::addressTranslation64().

nextMode()

virtual OperatingMode gem5::ArmISA::ArmFault::nextMode ( )

pure virtual

Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

Referenced by invoke64(), and update().

offset()

virtual FaultOffset gem5::ArmISA::ArmFault::offset ( ThreadContext *  tc )

pure virtual

Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

Referenced by getVector().

offset64()

virtual FaultOffset gem5::ArmISA::ArmFault::offset64 ( ThreadContext *  tc )

pure virtual

Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

Referenced by getVector64().

routeToHyp()

virtual bool gem5::ArmISA::ArmFault::routeToHyp ( ThreadContext *  tc ) const

inlinevirtual

Reimplemented in gem5::ArmISA::IllegalInstSetStateFault, gem5::ArmISA::SoftwareStepFault, gem5::ArmISA::Watchpoint, gem5::ArmISA::HardwareBreakpoint, gem5::ArmISA::SoftwareBreakpoint, gem5::ArmISA::SystemError, gem5::ArmISA::SPAlignmentFault, gem5::ArmISA::PCAlignmentFault, gem5::ArmISA::FastInterrupt, gem5::ArmISA::Interrupt, gem5::ArmISA::DataAbort, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::HypervisorCall, gem5::ArmISA::SupervisorTrap, gem5::ArmISA::SupervisorCall, and gem5::ArmISA::UndefinedInstruction.

Definition at line 244 of file faults.hh.

Referenced by update().

routeToMonitor()

virtual bool gem5::ArmISA::ArmFault::routeToMonitor ( ThreadContext *  tc ) const

pure virtual

Implemented in gem5::ArmISA::SystemError, gem5::ArmISA::FastInterrupt, gem5::ArmISA::Interrupt, gem5::ArmISA::DataAbort, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::HypervisorCall, gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

Referenced by update().

setSyndrome()

void gem5::ArmISA::ArmFault::setSyndrome ( ThreadContext *  tc, MiscRegIndex  syndrome_reg  )

virtual

Reimplemented in gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< VirtualDataAbort >, gem5::ArmISA::AbortFault< PrefetchAbort >, and gem5::ArmISA::AbortFault< DataAbort >.

Definition at line 398 of file faults.cc.

References gem5::bits(), gem5::ArmISA::COND_AL, gem5::ArmISA::COND_UC, ec(), from64, gem5::ArmSystem::highestELIs64(), il(), iss(), machInst, and gem5::ThreadContext::setMiscReg().

Referenced by invoke64(), and gem5::ArmISA::AbortFault< T >::setSyndrome().

thumbPcElrOffset()

virtual uint8_t gem5::ArmISA::ArmFault::thumbPcElrOffset ( )

pure virtual

Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

Referenced by invoke64().

thumbPcOffset()

virtual uint8_t gem5::ArmISA::ArmFault::thumbPcOffset ( bool  is_hyp )

pure virtual

Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

update()

void gem5::ArmISA::ArmFault::update

(

ThreadContext *

tc

)

Definition at line 428 of file faults.cc.

References gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmISA::ELIs64(), faultUpdated, from64, fromEL, fromMode, gem5::ArmSystem::haveEL(), gem5::ArmISA::HaveExt(), hypRouted, gem5::ArmISA::MISCREG_CPSR, gem5::ArmISA::MISCREG_HCR_EL2, gem5::ArmISA::MISCREG_SCTLR_EL1, gem5::ArmISA::MISCREG_SCTLR_EL2, gem5::ArmISA::MODE_HYP, gem5::ArmISA::MODE_MON, nextMode(), gem5::ArmISA::opModeToEL(), gem5::ThreadContext::readMiscReg(), gem5::ThreadContext::readMiscRegNoEffect(), routeToHyp(), routeToMonitor(), span, to64, toEL, and toMode.

Referenced by gem5::ArmISA::ISA::addressTranslation(), gem5::ArmISA::ISA::addressTranslation64(), and invoke().

vectorCatch()

bool gem5::ArmISA::ArmFault::vectorCatch	(	ThreadContext *	tc,
		const StaticInstPtr &	inst
	)

Definition at line 733 of file faults.cc.

References gem5::ArmISA::ISA::getSelfDebug(), gem5::ArmISA::VectorCatch::isVCMatch(), gem5::NoFault, and gem5::ArmISA::sd.

vectorCatchFlag()

virtual uint32_t gem5::ArmISA::ArmFault::vectorCatchFlag ( ) const

inlinevirtual

Reimplemented in gem5::ArmISA::FastInterrupt, gem5::ArmISA::Interrupt, gem5::ArmISA::DataAbort, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::HypervisorCall, gem5::ArmISA::SecureMonitorCall, gem5::ArmISA::SupervisorCall, and gem5::ArmISA::UndefinedInstruction.

Definition at line 254 of file faults.hh.

Referenced by gem5::ArmISA::VectorCatch::exceptionTrapping().

Member Data Documentation

aarch64FaultSources

uint8_t gem5::ArmISA::ArmFault::aarch64FaultSources

static

Encodings of the fault sources in AArch64 state.

Definition at line 130 of file faults.hh.

Referenced by gem5::ArmISA::AbortFault< T >::getFaultStatusCode().

bStep

bool gem5::ArmISA::ArmFault::bStep

protected

Definition at line 71 of file faults.hh.

Referenced by gem5::ArmISA::HypervisorCall::HypervisorCall(), isResetSPSR(), gem5::ArmISA::SecureMonitorCall::SecureMonitorCall(), gem5::ArmISA::SoftwareStepFault::SoftwareStepFault(), and gem5::ArmISA::SupervisorCall::SupervisorCall().

faultUpdated

bool gem5::ArmISA::ArmFault::faultUpdated

protected

Definition at line 82 of file faults.hh.

Referenced by update().

from64

bool gem5::ArmISA::ArmFault::from64

protected

Definition at line 72 of file faults.hh.

Referenced by gem5::ArmISA::SupervisorCall::ec(), gem5::ArmISA::SecureMonitorCall::ec(), gem5::ArmISA::SecureMonitorTrap::ec(), gem5::ArmISA::HypervisorCall::ec(), gem5::ArmISA::SoftwareBreakpoint::ec(), invoke(), gem5::ArmISA::PCAlignmentFault::invoke(), invoke64(), gem5::ArmISA::SecureMonitorCall::iss(), gem5::ArmISA::HypervisorCall::routeToHyp(), gem5::ArmISA::SPAlignmentFault::routeToHyp(), gem5::ArmISA::SystemError::routeToHyp(), gem5::ArmISA::HypervisorCall::routeToMonitor(), gem5::ArmISA::SystemError::routeToMonitor(), setSyndrome(), and update().

fromEL

ExceptionLevel gem5::ArmISA::ArmFault::fromEL

protected

Definition at line 74 of file faults.hh.

Referenced by gem5::ArmISA::PrefetchAbort::ec(), gem5::ArmISA::DataAbort::ec(), gem5::ArmISA::HardwareBreakpoint::ec(), gem5::ArmISA::Watchpoint::ec(), gem5::ArmISA::SoftwareStepFault::ec(), gem5::ArmISA::UndefinedInstruction::routeToHyp(), gem5::ArmISA::SupervisorCall::routeToHyp(), gem5::ArmISA::HypervisorCall::routeToHyp(), gem5::ArmISA::PrefetchAbort::routeToHyp(), gem5::ArmISA::DataAbort::routeToHyp(), gem5::ArmISA::Interrupt::routeToHyp(), gem5::ArmISA::FastInterrupt::routeToHyp(), gem5::ArmISA::PCAlignmentFault::routeToHyp(), gem5::ArmISA::SystemError::routeToHyp(), gem5::ArmISA::SoftwareBreakpoint::routeToHyp(), gem5::ArmISA::HardwareBreakpoint::routeToHyp(), gem5::ArmISA::Watchpoint::routeToHyp(), gem5::ArmISA::SoftwareStepFault::routeToHyp(), gem5::ArmISA::IllegalInstSetStateFault::routeToHyp(), gem5::ArmISA::HypervisorCall::routeToMonitor(), gem5::ArmISA::SystemError::routeToMonitor(), and update().

fromMode

OperatingMode gem5::ArmISA::ArmFault::fromMode

protected

Definition at line 76 of file faults.hh.

Referenced by update().

hypRouted

bool gem5::ArmISA::ArmFault::hypRouted

protected

Definition at line 84 of file faults.hh.

Referenced by gem5::ArmISA::UndefinedInstruction::ec(), gem5::ArmISA::SupervisorTrap::ec(), gem5::ArmISA::UndefinedInstruction::iss(), gem5::ArmISA::SupervisorTrap::iss(), and update().

issRaw

uint32_t gem5::ArmISA::ArmFault::issRaw

protected

Definition at line 68 of file faults.hh.

Referenced by gem5::ArmISA::ArmFaultVals< T >::iss(), gem5::ArmISA::UndefinedInstruction::iss(), gem5::ArmISA::SupervisorCall::iss(), and gem5::ArmISA::SupervisorTrap::iss().

longDescFaultSources

uint8_t gem5::ArmISA::ArmFault::longDescFaultSources

static

Encodings of the fault sources when the long-desc.

translation table format is in use (ARM ARM Issue C B3.13.3)

Definition at line 128 of file faults.hh.

Referenced by gem5::ArmISA::AbortFault< T >::getFaultStatusCode().

machInst

ExtMachInst gem5::ArmISA::ArmFault::machInst

protected

Definition at line 67 of file faults.hh.

Referenced by gem5::ArmISA::ArmFaultVals< T >::il(), gem5::ArmISA::SupervisorCall::invoke(), gem5::ArmISA::UndefinedInstruction::iss(), gem5::ArmISA::SecureMonitorCall::iss(), and setSyndrome().

shortDescFaultSources

uint8_t gem5::ArmISA::ArmFault::shortDescFaultSources

static

Encodings of the fault sources when the short-desc.

translation table format is in use (ARM ARM Issue C B3.13.3)

Definition at line 125 of file faults.hh.

Referenced by gem5::ArmISA::AbortFault< T >::getFaultStatusCode().

span

bool gem5::ArmISA::ArmFault::span

protected

Definition at line 85 of file faults.hh.

Referenced by invoke64(), and update().

to64

bool gem5::ArmISA::ArmFault::to64

protected

Definition at line 73 of file faults.hh.

Referenced by gem5::ArmISA::PrefetchAbort::ec(), gem5::ArmISA::DataAbort::ec(), invoke(), gem5::ArmISA::DataAbort::iss(), and update().

toEL

ExceptionLevel gem5::ArmISA::ArmFault::toEL

protected

Definition at line 75 of file faults.hh.

Referenced by gem5::ArmISA::PrefetchAbort::ec(), gem5::ArmISA::DataAbort::ec(), gem5::ArmISA::HardwareBreakpoint::ec(), gem5::ArmISA::Watchpoint::ec(), gem5::ArmISA::SoftwareStepFault::ec(), getFaultAddrReg64(), getSyndromeReg64(), getVector64(), gem5::ArmISA::HardwareBreakpoint::invoke(), invoke64(), gem5::ArmISA::DataAbort::iss(), and update().

toMode

OperatingMode gem5::ArmISA::ArmFault::toMode

protected

Definition at line 77 of file faults.hh.

Referenced by getToMode(), and update().

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The documentation for this class was generated from the following files:

• arch/arm/faults.hh
• arch/arm/faults.cc