gem5  v21.1.0.2
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gem5::ArmISA::ArmFault Class Referenceabstract

#include <faults.hh>

Inheritance diagram for gem5::ArmISA::ArmFault:
gem5::FaultBase gem5::ArmISA::ArmFaultVals< ArmSev > gem5::ArmISA::ArmFaultVals< DataAbort > gem5::ArmISA::ArmFaultVals< FastInterrupt > gem5::ArmISA::ArmFaultVals< HardwareBreakpoint > gem5::ArmISA::ArmFaultVals< HypervisorCall > gem5::ArmISA::ArmFaultVals< HypervisorTrap > gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault > gem5::ArmISA::ArmFaultVals< Interrupt > gem5::ArmISA::ArmFaultVals< PCAlignmentFault > gem5::ArmISA::ArmFaultVals< PrefetchAbort > gem5::ArmISA::ArmFaultVals< Reset > gem5::ArmISA::ArmFaultVals< SecureMonitorCall > gem5::ArmISA::ArmFaultVals< SecureMonitorTrap > gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint > gem5::ArmISA::ArmFaultVals< SoftwareStepFault > gem5::ArmISA::ArmFaultVals< SPAlignmentFault > gem5::ArmISA::ArmFaultVals< SupervisorCall > gem5::ArmISA::ArmFaultVals< SupervisorTrap > gem5::ArmISA::ArmFaultVals< SystemError > gem5::ArmISA::ArmFaultVals< UndefinedInstruction > gem5::ArmISA::ArmFaultVals< VirtualDataAbort > gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt > gem5::ArmISA::ArmFaultVals< VirtualInterrupt > gem5::ArmISA::ArmFaultVals< Watchpoint > gem5::ArmISA::ArmFaultVals< T >

Classes

struct  FaultVals
 

Public Types

enum  FaultSource {
  AlignmentFault = 0, InstructionCacheMaintenance, SynchExtAbtOnTranslTableWalkLL, SynchPtyErrOnTranslTableWalkLL = SynchExtAbtOnTranslTableWalkLL + 4,
  TranslationLL = SynchPtyErrOnTranslTableWalkLL + 4, AccessFlagLL = TranslationLL + 4, DomainLL = AccessFlagLL + 4, PermissionLL = DomainLL + 4,
  DebugEvent = PermissionLL + 4, SynchronousExternalAbort, TLBConflictAbort, SynchPtyErrOnMemoryAccess,
  AsynchronousExternalAbort, AsynchPtyErrOnMemoryAccess, AddressSizeLL, PrefetchTLBMiss = AddressSizeLL + 4,
  PrefetchUncacheable, NumFaultSources, FaultSourceInvalid = 0xff
}
 Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use. More...
 
enum  AnnotationIDs {
  S1PTW, OVA, SAS, SSE,
  SRT, CM, OFA, SF,
  AR
}
 
enum  TranMethod { LpaeTran, VmsaTran, UnknownTran }
 
enum  DebugType {
  NODEBUG = 0, BRKPOINT, VECTORCATCH, WPOINT_CM,
  WPOINT_NOCM
}
 

Public Member Functions

 ArmFault (ExtMachInst _machInst=0, uint32_t _iss=0)
 
MiscRegIndex getSyndromeReg64 () const
 
MiscRegIndex getFaultAddrReg64 () const
 
void invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
 
void invoke64 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
 
void update (ThreadContext *tc)
 
bool isResetSPSR ()
 
bool vectorCatch (ThreadContext *tc, const StaticInstPtr &inst)
 
ArmStaticInstinstrAnnotate (const StaticInstPtr &inst)
 
virtual void annotate (AnnotationIDs id, uint64_t val)
 
virtual FaultStatcountStat ()=0
 
virtual FaultOffset offset (ThreadContext *tc)=0
 
virtual FaultOffset offset64 (ThreadContext *tc)=0
 
virtual OperatingMode nextMode ()=0
 
virtual bool routeToMonitor (ThreadContext *tc) const =0
 
virtual bool routeToHyp (ThreadContext *tc) const
 
virtual uint8_t armPcOffset (bool isHyp)=0
 
virtual uint8_t thumbPcOffset (bool isHyp)=0
 
virtual uint8_t armPcElrOffset ()=0
 
virtual uint8_t thumbPcElrOffset ()=0
 
virtual bool abortDisable (ThreadContext *tc)=0
 
virtual bool fiqDisable (ThreadContext *tc)=0
 
virtual ExceptionClass ec (ThreadContext *tc) const =0
 
virtual uint32_t vectorCatchFlag () const
 
virtual uint32_t iss () const =0
 
virtual bool isStage2 () const
 
virtual FSR getFsr (ThreadContext *tc) const
 
virtual void setSyndrome (ThreadContext *tc, MiscRegIndex syndrome_reg)
 
virtual bool getFaultVAddr (Addr &va) const
 
OperatingMode getToMode () const
 
- Public Member Functions inherited from gem5::FaultBase
virtual FaultName name () const =0
 
virtual ~FaultBase ()
 

Static Public Attributes

static uint8_t shortDescFaultSources [NumFaultSources]
 Encodings of the fault sources when the short-desc. More...
 
static uint8_t longDescFaultSources [NumFaultSources]
 Encodings of the fault sources when the long-desc. More...
 
static uint8_t aarch64FaultSources [NumFaultSources]
 Encodings of the fault sources in AArch64 state. More...
 

Protected Member Functions

virtual Addr getVector (ThreadContext *tc)
 
Addr getVector64 (ThreadContext *tc)
 

Protected Attributes

ExtMachInst machInst
 
uint32_t issRaw
 
bool bStep
 
bool from64
 
bool to64
 
ExceptionLevel fromEL
 
ExceptionLevel toEL
 
OperatingMode fromMode
 
OperatingMode toMode
 
bool faultUpdated
 
bool hypRouted
 
bool span
 

Detailed Description

Definition at line 64 of file faults.hh.

Member Enumeration Documentation

◆ AnnotationIDs

Enumerator
S1PTW 
OVA 
SAS 
SSE 
SRT 
CM 
OFA 
SF 
AR 

Definition at line 132 of file faults.hh.

◆ DebugType

Enumerator
NODEBUG 
BRKPOINT 
VECTORCATCH 
WPOINT_CM 
WPOINT_NOCM 

Definition at line 157 of file faults.hh.

◆ FaultSource

Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use.

Enumerator
AlignmentFault 
InstructionCacheMaintenance 
SynchExtAbtOnTranslTableWalkLL 
SynchPtyErrOnTranslTableWalkLL 
TranslationLL 
AccessFlagLL 
DomainLL 
PermissionLL 
DebugEvent 
SynchronousExternalAbort 
TLBConflictAbort 
SynchPtyErrOnMemoryAccess 
AsynchronousExternalAbort 
AsynchPtyErrOnMemoryAccess 
AddressSizeLL 
PrefetchTLBMiss 
PrefetchUncacheable 
NumFaultSources 
FaultSourceInvalid 

Definition at line 95 of file faults.hh.

◆ TranMethod

Enumerator
LpaeTran 
VmsaTran 
UnknownTran 

Definition at line 150 of file faults.hh.

Constructor & Destructor Documentation

◆ ArmFault()

gem5::ArmISA::ArmFault::ArmFault ( ExtMachInst  _machInst = 0,
uint32_t  _iss = 0 
)
inline

Definition at line 215 of file faults.hh.

Member Function Documentation

◆ abortDisable()

virtual bool gem5::ArmISA::ArmFault::abortDisable ( ThreadContext tc)
pure virtual

◆ annotate()

virtual void gem5::ArmISA::ArmFault::annotate ( AnnotationIDs  id,
uint64_t  val 
)
inlinevirtual

◆ armPcElrOffset()

virtual uint8_t gem5::ArmISA::ArmFault::armPcElrOffset ( )
pure virtual

◆ armPcOffset()

virtual uint8_t gem5::ArmISA::ArmFault::armPcOffset ( bool  isHyp)
pure virtual

◆ countStat()

virtual FaultStat& gem5::ArmISA::ArmFault::countStat ( )
pure virtual

◆ ec()

virtual ExceptionClass gem5::ArmISA::ArmFault::ec ( ThreadContext tc) const
pure virtual

Implemented in gem5::ArmISA::SoftwareStepFault, gem5::ArmISA::Watchpoint, gem5::ArmISA::HardwareBreakpoint, gem5::ArmISA::SoftwareBreakpoint, gem5::ArmISA::DataAbort, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::HypervisorTrap, gem5::ArmISA::HypervisorCall, gem5::ArmISA::SecureMonitorTrap, gem5::ArmISA::SupervisorTrap, gem5::ArmISA::SecureMonitorCall, gem5::ArmISA::SupervisorCall, gem5::ArmISA::UndefinedInstruction, gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< PrefetchAbort >, gem5::ArmISA::ArmFaultVals< VirtualDataAbort >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< DataAbort >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.

Referenced by invoke(), and setSyndrome().

◆ fiqDisable()

virtual bool gem5::ArmISA::ArmFault::fiqDisable ( ThreadContext tc)
pure virtual

◆ getFaultAddrReg64()

MiscRegIndex gem5::ArmISA::ArmFault::getFaultAddrReg64 ( ) const

◆ getFaultVAddr()

virtual bool gem5::ArmISA::ArmFault::getFaultVAddr ( Addr va) const
inlinevirtual

◆ getFsr()

virtual FSR gem5::ArmISA::ArmFault::getFsr ( ThreadContext tc) const
inlinevirtual

◆ getSyndromeReg64()

MiscRegIndex gem5::ArmISA::ArmFault::getSyndromeReg64 ( ) const

◆ getToMode()

OperatingMode gem5::ArmISA::ArmFault::getToMode ( ) const
inline

Definition at line 257 of file faults.hh.

References toMode.

Referenced by gem5::ArmISA::VectorCatch::exceptionTrapping().

◆ getVector()

Addr gem5::ArmISA::ArmFault::getVector ( ThreadContext tc)
protectedvirtual

◆ getVector64()

Addr gem5::ArmISA::ArmFault::getVector64 ( ThreadContext tc)
protected

◆ instrAnnotate()

ArmStaticInst * gem5::ArmISA::ArmFault::instrAnnotate ( const StaticInstPtr inst)

Definition at line 744 of file faults.cc.

References gem5::ArmISA::ArmStaticInst::annotateFault(), and gem5::RefCountingPtr< T >::get().

Referenced by invoke(), and invoke64().

◆ invoke()

void gem5::ArmISA::ArmFault::invoke ( ThreadContext tc,
const StaticInstPtr inst = nullStaticInstPtr 
)
overridevirtual

Reimplemented from gem5::FaultBase.

Reimplemented in gem5::ArmISA::ArmSev, gem5::ArmISA::Watchpoint, gem5::ArmISA::HardwareBreakpoint, gem5::ArmISA::SystemError, gem5::ArmISA::PCAlignmentFault, gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< PrefetchAbort >, gem5::ArmISA::AbortFault< VirtualDataAbort >, gem5::ArmISA::AbortFault< DataAbort >, gem5::ArmISA::SecureMonitorCall, gem5::ArmISA::SupervisorCall, gem5::ArmISA::UndefinedInstruction, gem5::ArmISA::Reset, and gem5::ArmISA::VirtualDataAbort.

Definition at line 489 of file faults.cc.

References abortDisable(), armPcOffset(), gem5::ArmISA::CCREG_C, gem5::ArmISA::CCREG_GE, gem5::ArmISA::CCREG_NZ, gem5::ArmISA::CCREG_V, countStat(), gem5::csprintf(), DPRINTF, ec(), gem5::ArmISA::EC_UNKNOWN, fiqDisable(), gem5::FullSystem, getVector(), gem5::ArmSystem::haveSecurity(), gem5::ArmSystem::haveVirtualization(), instrAnnotate(), gem5::PowerISA::INTREG_LR, gem5::FaultBase::invoke(), invoke64(), gem5::ArmISA::MISCREG_CPSR, gem5::ArmISA::MISCREG_ELR_HYP, gem5::ArmISA::MISCREG_HSCTLR, gem5::ArmISA::MISCREG_HSR, gem5::ArmISA::MISCREG_LOCKFLAG, gem5::ArmISA::MISCREG_SCR, gem5::ArmISA::MISCREG_SCTLR, gem5::ArmISA::MISCREG_SEV_MAILBOX, gem5::ArmISA::MISCREG_SPSR_ABT, gem5::ArmISA::MISCREG_SPSR_FIQ, gem5::ArmISA::MISCREG_SPSR_HYP, gem5::ArmISA::MISCREG_SPSR_IRQ, gem5::ArmISA::MISCREG_SPSR_MON, gem5::ArmISA::MISCREG_SPSR_SVC, gem5::ArmISA::MISCREG_SPSR_UND, gem5::ArmISA::MODE_ABORT, gem5::ArmISA::MODE_FIQ, gem5::ArmISA::MODE_HYP, gem5::ArmISA::MODE_IRQ, gem5::ArmISA::MODE_MON, gem5::ArmISA::MODE_SVC, gem5::ArmISA::MODE_UNDEFINED, gem5::FaultBase::name(), panic, gem5::MipsISA::pc, gem5::ThreadContext::pcState(), gem5::ThreadContext::readCCReg(), gem5::ThreadContext::readIntReg(), gem5::ThreadContext::readMiscReg(), gem5::ThreadContext::readMiscRegNoEffect(), gem5::ThreadContext::setIntReg(), gem5::ThreadContext::setMiscReg(), gem5::ThreadContext::setMiscRegNoEffect(), setSyndrome(), span, thumbPcOffset(), to64, toMode, update(), and vectorCatch().

Referenced by gem5::ArmISA::Reset::invoke(), gem5::ArmISA::UndefinedInstruction::invoke(), gem5::ArmISA::SupervisorCall::invoke(), gem5::ArmISA::SecureMonitorCall::invoke(), gem5::ArmISA::AbortFault< DataAbort >::invoke(), gem5::ArmISA::PCAlignmentFault::invoke(), gem5::ArmISA::SystemError::invoke(), gem5::ArmISA::HardwareBreakpoint::invoke(), and gem5::ArmISA::Watchpoint::invoke().

◆ invoke64()

void gem5::ArmISA::ArmFault::invoke64 ( ThreadContext tc,
const StaticInstPtr inst = nullStaticInstPtr 
)

◆ isResetSPSR()

bool gem5::ArmISA::ArmFault::isResetSPSR ( )
inline

Definition at line 232 of file faults.hh.

References bStep.

Referenced by invoke64().

◆ iss()

virtual uint32_t gem5::ArmISA::ArmFault::iss ( ) const
pure virtual

◆ isStage2()

virtual bool gem5::ArmISA::ArmFault::isStage2 ( ) const
inlinevirtual

◆ nextMode()

virtual OperatingMode gem5::ArmISA::ArmFault::nextMode ( )
pure virtual

◆ offset()

virtual FaultOffset gem5::ArmISA::ArmFault::offset ( ThreadContext tc)
pure virtual

◆ offset64()

virtual FaultOffset gem5::ArmISA::ArmFault::offset64 ( ThreadContext tc)
pure virtual

◆ routeToHyp()

virtual bool gem5::ArmISA::ArmFault::routeToHyp ( ThreadContext tc) const
inlinevirtual

◆ routeToMonitor()

virtual bool gem5::ArmISA::ArmFault::routeToMonitor ( ThreadContext tc) const
pure virtual

◆ setSyndrome()

void gem5::ArmISA::ArmFault::setSyndrome ( ThreadContext tc,
MiscRegIndex  syndrome_reg 
)
virtual

◆ thumbPcElrOffset()

virtual uint8_t gem5::ArmISA::ArmFault::thumbPcElrOffset ( )
pure virtual

◆ thumbPcOffset()

virtual uint8_t gem5::ArmISA::ArmFault::thumbPcOffset ( bool  isHyp)
pure virtual

◆ update()

void gem5::ArmISA::ArmFault::update ( ThreadContext tc)

◆ vectorCatch()

bool gem5::ArmISA::ArmFault::vectorCatch ( ThreadContext tc,
const StaticInstPtr inst 
)

◆ vectorCatchFlag()

virtual uint32_t gem5::ArmISA::ArmFault::vectorCatchFlag ( ) const
inlinevirtual

Member Data Documentation

◆ aarch64FaultSources

uint8_t gem5::ArmISA::ArmFault::aarch64FaultSources
static

Encodings of the fault sources in AArch64 state.

Definition at line 130 of file faults.hh.

Referenced by gem5::ArmISA::AbortFault< DataAbort >::getFaultStatusCode().

◆ bStep

bool gem5::ArmISA::ArmFault::bStep
protected

◆ faultUpdated

bool gem5::ArmISA::ArmFault::faultUpdated
protected

Definition at line 82 of file faults.hh.

Referenced by update().

◆ from64

bool gem5::ArmISA::ArmFault::from64
protected

◆ fromEL

ExceptionLevel gem5::ArmISA::ArmFault::fromEL
protected

◆ fromMode

OperatingMode gem5::ArmISA::ArmFault::fromMode
protected

Definition at line 76 of file faults.hh.

Referenced by update().

◆ hypRouted

bool gem5::ArmISA::ArmFault::hypRouted
protected

◆ issRaw

uint32_t gem5::ArmISA::ArmFault::issRaw
protected

◆ longDescFaultSources

uint8_t gem5::ArmISA::ArmFault::longDescFaultSources
static

Encodings of the fault sources when the long-desc.

translation table format is in use (ARM ARM Issue C B3.13.3)

Definition at line 128 of file faults.hh.

Referenced by gem5::ArmISA::AbortFault< DataAbort >::getFaultStatusCode().

◆ machInst

ExtMachInst gem5::ArmISA::ArmFault::machInst
protected

◆ shortDescFaultSources

uint8_t gem5::ArmISA::ArmFault::shortDescFaultSources
static

Encodings of the fault sources when the short-desc.

translation table format is in use (ARM ARM Issue C B3.13.3)

Definition at line 125 of file faults.hh.

Referenced by gem5::ArmISA::AbortFault< DataAbort >::getFaultStatusCode().

◆ span

bool gem5::ArmISA::ArmFault::span
protected

Definition at line 85 of file faults.hh.

Referenced by invoke(), invoke64(), and update().

◆ to64

bool gem5::ArmISA::ArmFault::to64
protected

◆ toEL

ExceptionLevel gem5::ArmISA::ArmFault::toEL
protected

◆ toMode

OperatingMode gem5::ArmISA::ArmFault::toMode
protected

Definition at line 77 of file faults.hh.

Referenced by getToMode(), invoke(), and update().


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:28:26 for gem5 by doxygen 1.8.17