gem5  v22.1.0.0
Public Member Functions | Protected Attributes | List of all members
gem5::ArmISA::AbortFault< T > Class Template Reference

#include <faults.hh>

Inheritance diagram for gem5::ArmISA::AbortFault< T >:
gem5::ArmISA::ArmFaultVals< T > gem5::ArmISA::ArmFault gem5::FaultBase

Public Member Functions

 AbortFault (Addr _faultAddr, bool _write, TlbEntry::DomainType _domain, uint8_t _source, bool _stage2, ArmFault::TranMethod _tranMethod=ArmFault::UnknownTran, ArmFault::DebugType _debug=ArmFault::NODEBUG)
 
bool getFaultVAddr (Addr &va) const override
 
void invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
 
FSR getFsr (ThreadContext *tc) const override
 
uint8_t getFaultStatusCode (ThreadContext *tc) const
 
bool abortDisable (ThreadContext *tc) override
 
bool isStage2 () const override
 
void annotate (ArmFault::AnnotationIDs id, uint64_t val) override
 
void setSyndrome (ThreadContext *tc, MiscRegIndex syndrome_reg) override
 
bool isMMUFault () const
 
- Public Member Functions inherited from gem5::ArmISA::ArmFaultVals< T >
 ArmFaultVals (ExtMachInst mach_inst=0, uint32_t _iss=0)
 
FaultName name () const override
 
FaultOffset offset (ThreadContext *tc) override
 
FaultOffset offset64 (ThreadContext *tc) override
 
OperatingMode nextMode () override
 
virtual bool routeToMonitor (ThreadContext *tc) const override
 
uint8_t armPcOffset (bool is_hyp) override
 
uint8_t thumbPcOffset (bool is_hyp) override
 
uint8_t armPcElrOffset () override
 
uint8_t thumbPcElrOffset () override
 
bool fiqDisable (ThreadContext *tc) override
 
ExceptionClass ec (ThreadContext *tc) const override
 Syndrome methods. More...
 
bool il (ThreadContext *tc) const override
 
uint32_t iss () const override
 
- Public Member Functions inherited from gem5::ArmISA::ArmFault
 ArmFault (ExtMachInst mach_inst=0, uint32_t _iss=0)
 
MiscRegIndex getSyndromeReg64 () const
 
MiscRegIndex getFaultAddrReg64 () const
 
void invoke32 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
 
void invoke64 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
 
void update (ThreadContext *tc)
 
bool isResetSPSR ()
 
bool vectorCatch (ThreadContext *tc, const StaticInstPtr &inst)
 
ArmStaticInst * instrAnnotate (const StaticInstPtr &inst)
 
virtual bool routeToHyp (ThreadContext *tc) const
 
virtual uint32_t vectorCatchFlag () const
 
OperatingMode getToMode () const
 
- Public Member Functions inherited from gem5::FaultBase
virtual ~FaultBase ()
 

Protected Attributes

Addr faultAddr
 The virtual address the fault occured at. More...
 
Addr OVAddr
 Original virtual address. More...
 
bool write
 
TlbEntry::DomainType domain
 
uint8_t source
 
uint8_t srcEncoded
 
bool stage2
 
bool s1ptw
 
ArmFault::TranMethod tranMethod
 
ArmFault::DebugType debugType
 
- Protected Attributes inherited from gem5::ArmISA::ArmFault
ExtMachInst machInst
 
uint32_t issRaw
 
bool bStep
 
bool from64
 
bool to64
 
ExceptionLevel fromEL
 
ExceptionLevel toEL
 
OperatingMode fromMode
 
OperatingMode toMode
 
bool faultUpdated
 
bool hypRouted
 
bool span
 

Additional Inherited Members

- Public Types inherited from gem5::ArmISA::ArmFault
enum  FaultSource {
  AlignmentFault = 0 , InstructionCacheMaintenance , SynchExtAbtOnTranslTableWalkLL , SynchPtyErrOnTranslTableWalkLL = SynchExtAbtOnTranslTableWalkLL + 4 ,
  TranslationLL = SynchPtyErrOnTranslTableWalkLL + 4 , AccessFlagLL = TranslationLL + 4 , DomainLL = AccessFlagLL + 4 , PermissionLL = DomainLL + 4 ,
  DebugEvent = PermissionLL + 4 , SynchronousExternalAbort , TLBConflictAbort , SynchPtyErrOnMemoryAccess ,
  AsynchronousExternalAbort , AsynchPtyErrOnMemoryAccess , AddressSizeLL , PrefetchTLBMiss = AddressSizeLL + 4 ,
  PrefetchUncacheable , NumFaultSources , FaultSourceInvalid = 0xff
}
 Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use. More...
 
enum  AnnotationIDs {
  S1PTW , OVA , SAS , SSE ,
  SRT , CM , OFA , SF ,
  AR
}
 
enum  TranMethod { LpaeTran , VmsaTran , UnknownTran }
 
enum  DebugType {
  NODEBUG = 0 , BRKPOINT , VECTORCATCH , WPOINT_CM ,
  WPOINT_NOCM
}
 
- Static Public Attributes inherited from gem5::ArmISA::ArmFault
static uint8_t shortDescFaultSources [NumFaultSources]
 Encodings of the fault sources when the short-desc. More...
 
static uint8_t longDescFaultSources [NumFaultSources]
 Encodings of the fault sources when the long-desc. More...
 
static uint8_t aarch64FaultSources [NumFaultSources]
 Encodings of the fault sources in AArch64 state. More...
 
- Protected Member Functions inherited from gem5::ArmISA::ArmFaultVals< T >
ArmFault::FaultVals vals ("Reset", 0x000, 0x000, 0x000, 0x000, 0x000, MODE_SVC, 0, 0, 0, 0, false, true, true, ExceptionClass::UNKNOWN)
 
ArmFault::FaultVals vals ("Undefined Instruction", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_UNDEFINED, 4, 2, 0, 0, true, false, false, ExceptionClass::UNKNOWN)
 
ArmFault::FaultVals vals ("Supervisor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 4, 2, 4, 2, true, false, false, ExceptionClass::SVC_TO_HYP)
 
ArmFault::FaultVals vals ("Secure Monitor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_MON, 4, 4, 4, 4, false, true, true, ExceptionClass::SMC_TO_HYP)
 
ArmFault::FaultVals vals ("Hypervisor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_HYP, 4, 4, 4, 4, true, false, false, ExceptionClass::HVC)
 
ArmFault::FaultVals vals ("Prefetch Abort", 0x00C, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 4, 4, 0, 0, true, true, false, ExceptionClass::PREFETCH_ABORT_TO_HYP)
 
ArmFault::FaultVals vals ("Data Abort", 0x010, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 8, 8, 0, 0, true, true, false, ExceptionClass::DATA_ABORT_TO_HYP)
 
ArmFault::FaultVals vals ("Virtual Data Abort", 0x010, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 8, 8, 0, 0, true, true, false, ExceptionClass::INVALID)
 
ArmFault::FaultVals vals ("Hypervisor Trap", 0x014, 0x000, 0x200, 0x400, 0x600, MODE_HYP, 0, 0, 0, 0, false, false, false, ExceptionClass::UNKNOWN)
 
ArmFault::FaultVals vals ("Secure Monitor Trap", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_MON, 4, 2, 0, 0, false, false, false, ExceptionClass::UNKNOWN)
 
ArmFault::FaultVals vals ("IRQ", 0x018, 0x080, 0x280, 0x480, 0x680, MODE_IRQ, 4, 4, 0, 0, false, true, false, ExceptionClass::UNKNOWN)
 
ArmFault::FaultVals vals ("Virtual IRQ", 0x018, 0x080, 0x280, 0x480, 0x680, MODE_IRQ, 4, 4, 0, 0, false, true, false, ExceptionClass::INVALID)
 
ArmFault::FaultVals vals ("FIQ", 0x01C, 0x100, 0x300, 0x500, 0x700, MODE_FIQ, 4, 4, 0, 0, false, true, true, ExceptionClass::UNKNOWN)
 
ArmFault::FaultVals vals ("Virtual FIQ", 0x01C, 0x100, 0x300, 0x500, 0x700, MODE_FIQ, 4, 4, 0, 0, false, true, true, ExceptionClass::INVALID)
 
ArmFault::FaultVals vals ("Illegal Inst Set State Fault", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_UNDEFINED, 4, 2, 0, 0, true, false, false, ExceptionClass::ILLEGAL_INST)
 
ArmFault::FaultVals vals ("Supervisor Trap", 0x014, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, false, false, false, ExceptionClass::UNKNOWN)
 
ArmFault::FaultVals vals ("PC Alignment Fault", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::PC_ALIGNMENT)
 
ArmFault::FaultVals vals ("SP Alignment Fault", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::STACK_PTR_ALIGNMENT)
 
ArmFault::FaultVals vals ("SError", 0x000, 0x180, 0x380, 0x580, 0x780, MODE_SVC, 0, 0, 0, 0, false, true, true, ExceptionClass::SERROR)
 
ArmFault::FaultVals vals ("Software Breakpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::SOFTWARE_BREAKPOINT)
 
ArmFault::FaultVals vals ("Hardware Breakpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::HW_BREAKPOINT)
 
ArmFault::FaultVals vals ("Watchpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::WATCHPOINT)
 
ArmFault::FaultVals vals ("SoftwareStep", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, ExceptionClass::SOFTWARE_STEP)
 
ArmFault::FaultVals vals ("ArmSev Flush", 0x000, 0x000, 0x000, 0x000, 0x000, MODE_SVC, 0, 0, 0, 0, false, true, true, ExceptionClass::UNKNOWN)
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
- Protected Member Functions inherited from gem5::ArmISA::ArmFault
virtual Addr getVector (ThreadContext *tc)
 
Addr getVector64 (ThreadContext *tc)
 
- Static Protected Attributes inherited from gem5::ArmISA::ArmFaultVals< T >
static FaultVals vals
 

Detailed Description

template<class T>
class gem5::ArmISA::AbortFault< T >

Definition at line 468 of file faults.hh.

Constructor & Destructor Documentation

◆ AbortFault()

template<class T >
gem5::ArmISA::AbortFault< T >::AbortFault ( Addr  _faultAddr,
bool  _write,
TlbEntry::DomainType  _domain,
uint8_t  _source,
bool  _stage2,
ArmFault::TranMethod  _tranMethod = ArmFault::UnknownTran,
ArmFault::DebugType  _debug = ArmFault::NODEBUG 
)
inline

Definition at line 494 of file faults.hh.

Member Function Documentation

◆ abortDisable()

template<class T >
bool gem5::ArmISA::AbortFault< T >::abortDisable ( ThreadContext *  tc)
overridevirtual

Reimplemented from gem5::ArmISA::ArmFaultVals< T >.

Definition at line 1212 of file faults.cc.

References gem5::ArmISA::EL3, gem5::ArmSystem::haveEL(), gem5::ArmISA::MISCREG_SCR_EL3, and gem5::ThreadContext::readMiscRegNoEffect().

◆ annotate()

template<class T >
void gem5::ArmISA::AbortFault< T >::annotate ( ArmFault::AnnotationIDs  id,
uint64_t  val 
)
overridevirtual

Reimplemented from gem5::ArmISA::ArmFault.

Definition at line 1223 of file faults.cc.

References gem5::ArmISA::ArmFault::OVA, gem5::ArmISA::ArmFault::S1PTW, gem5::ArmISA::s1ptw, and gem5::X86ISA::val.

Referenced by gem5::ArmISA::DataAbort::annotate().

◆ getFaultStatusCode()

template<class T >
uint8_t gem5::ArmISA::AbortFault< T >::getFaultStatusCode ( ThreadContext *  tc) const

Definition at line 1161 of file faults.cc.

References gem5::ArmISA::ArmFault::aarch64FaultSources, gem5::ArmISA::ArmFault::longDescFaultSources, gem5::ArmISA::ArmFault::LpaeTran, panic_if, gem5::ArmISA::ArmFault::shortDescFaultSources, and gem5::ArmISA::ArmFault::UnknownTran.

◆ getFaultVAddr()

template<class T >
bool gem5::ArmISA::AbortFault< T >::getFaultVAddr ( Addr &  va) const
overridevirtual

Reimplemented from gem5::ArmISA::ArmFault.

Definition at line 1259 of file faults.cc.

References gem5::ArmISA::va.

◆ getFsr()

template<class T >
FSR gem5::ArmISA::AbortFault< T >::getFsr ( ThreadContext *  tc) const
overridevirtual

Reimplemented from gem5::ArmISA::ArmFault.

Definition at line 1187 of file faults.cc.

References gem5::bits(), gem5::ArmISA::domain, gem5::ArmISA::ArmFault::LpaeTran, and gem5::ArmISA::ArmFault::UnknownTran.

◆ invoke()

template<class T >
void gem5::ArmISA::AbortFault< T >::invoke ( ThreadContext *  tc,
const StaticInstPtr &  inst = nullStaticInstPtr 
)
overridevirtual

Reimplemented from gem5::ArmISA::ArmFault.

Definition at line 1068 of file faults.cc.

References gem5::ArmISA::ArmFault::AsynchronousExternalAbort, gem5::bits(), gem5::ArmISA::ArmFault::BRKPOINT, gem5::BaseCPU::clearInterrupt(), DPRINTF, gem5::ThreadContext::getCpuPtr(), gem5::ArmISA::INT_ABT, gem5::ArmISA::ArmFault::invoke(), gem5::ArmISA::longDescFormatInUse(), gem5::ArmISA::ArmFault::LpaeTran, gem5::ArmISA::MISCREG_CPSR, gem5::ArmISA::MISCREG_DBGDSCRext, gem5::ArmISA::MISCREG_HPFAR, gem5::ArmISA::MISCREG_HPFAR_EL2, gem5::ArmISA::MISCREG_TTBCR_NS, gem5::ArmISA::MISCREG_TTBCR_S, gem5::ArmISA::MODE_HYP, gem5::ArmISA::ArmFault::NODEBUG, gem5::ThreadContext::readMiscReg(), gem5::ThreadContext::setMiscReg(), gem5::ThreadContext::threadId(), gem5::ArmISA::ArmFault::UnknownTran, gem5::ArmISA::ArmFault::VECTORCATCH, gem5::ArmISA::ArmFault::VmsaTran, and gem5::ArmISA::ArmFault::WPOINT_CM.

Referenced by gem5::ArmISA::VirtualDataAbort::invoke().

◆ isMMUFault()

template<class T >
bool gem5::ArmISA::AbortFault< T >::isMMUFault

Definition at line 1242 of file faults.cc.

References gem5::ArmISA::ArmFault::AccessFlagLL, gem5::ArmISA::ArmFault::AlignmentFault, gem5::ArmISA::ArmFault::DomainLL, gem5::ArmISA::ArmFault::PermissionLL, and gem5::ArmISA::ArmFault::TranslationLL.

◆ isStage2()

template<class T >
bool gem5::ArmISA::AbortFault< T >::isStage2 ( ) const
inlineoverridevirtual

Reimplemented from gem5::ArmISA::ArmFault.

Definition at line 512 of file faults.hh.

References gem5::ArmISA::AbortFault< T >::stage2.

◆ setSyndrome()

template<class T >
void gem5::ArmISA::AbortFault< T >::setSyndrome ( ThreadContext *  tc,
MiscRegIndex  syndrome_reg 
)
overridevirtual

Reimplemented from gem5::ArmISA::ArmFault.

Definition at line 1150 of file faults.cc.

References gem5::ArmISA::ArmFault::FaultSourceInvalid, panic, and gem5::ArmISA::ArmFault::setSyndrome().

Member Data Documentation

◆ debugType

template<class T >
ArmFault::DebugType gem5::ArmISA::AbortFault< T >::debugType
protected

Definition at line 491 of file faults.hh.

◆ domain

template<class T >
TlbEntry::DomainType gem5::ArmISA::AbortFault< T >::domain
protected

Definition at line 485 of file faults.hh.

◆ faultAddr

template<class T >
Addr gem5::ArmISA::AbortFault< T >::faultAddr
protected

The virtual address the fault occured at.

If 2 stages of translation are being used then this is the intermediate physical address that is the starting point for the second stage of translation.

Definition at line 477 of file faults.hh.

◆ OVAddr

template<class T >
Addr gem5::ArmISA::AbortFault< T >::OVAddr
protected

Original virtual address.

If the fault was generated on the second stage of translation then this variable stores the virtual address used in the original stage 1 translation.

Definition at line 483 of file faults.hh.

◆ s1ptw

template<class T >
bool gem5::ArmISA::AbortFault< T >::s1ptw
protected

Definition at line 489 of file faults.hh.

◆ source

template<class T >
uint8_t gem5::ArmISA::AbortFault< T >::source
protected

Definition at line 486 of file faults.hh.

◆ srcEncoded

template<class T >
uint8_t gem5::ArmISA::AbortFault< T >::srcEncoded
protected

Definition at line 487 of file faults.hh.

◆ stage2

template<class T >
bool gem5::ArmISA::AbortFault< T >::stage2
protected

Definition at line 488 of file faults.hh.

Referenced by gem5::ArmISA::AbortFault< T >::isStage2().

◆ tranMethod

template<class T >
ArmFault::TranMethod gem5::ArmISA::AbortFault< T >::tranMethod
protected

Definition at line 490 of file faults.hh.

◆ write

template<class T >
bool gem5::ArmISA::AbortFault< T >::write
protected

Definition at line 484 of file faults.hh.

The documentation for this class was generated from the following files:
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