gem5  v22.0.0.2
Classes | Public Member Functions | Protected Types | Protected Member Functions | Protected Attributes | List of all members
gem5::Intel8254Timer Class Reference

Programmable Interval Timer (Intel 8254) More...

#include <intel_8254_timer.hh>

Inheritance diagram for gem5::Intel8254Timer:
gem5::EventManager gem5::X86ISA::I8254::X86Intel8254Timer

Classes

class  Counter
 Counter element for PIT. More...
 

Public Member Functions

virtual ~Intel8254Timer ()
 
 Intel8254Timer (EventManager *em, const std::string &name)
 
void writeControl (const CtrlReg data)
 Write control word. More...
 
uint8_t readCounter (unsigned int num)
 
void writeCounter (unsigned int num, const uint8_t data)
 
bool outputHigh (unsigned int num)
 
void serialize (const std::string &base, CheckpointOut &cp) const
 Serialize this object to the given output stream. More...
 
void unserialize (const std::string &base, CheckpointIn &cp)
 Reconstruct the state of this object from a checkpoint. More...
 
void startup ()
 Start ticking. More...
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue. More...
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 

Protected Types

enum  ReadWriteVal { LatchCommand, LsbOnly, MsbOnly, TwoPhase }
 
enum  ModeVal {
  InitTc, OneShot, RateGen, SquareWave,
  SoftwareStrobe, HardwareStrobe
}
 

Protected Member Functions

 BitUnion8 (CtrlReg) Bitfield< 7
 
 EndBitUnion (CtrlReg) BitUnion8(ReadBackCommandVal) Bitfield< 4 > status
 
 SubBitUnion (select, 3, 1) Bitfield< 3 > cnt2
 
 EndSubBitUnion (select) EndBitUnion(ReadBackCommandVal) enum SelectVal
 
const std::string & name () const
 
virtual void counterInterrupt (unsigned int num)
 

Protected Attributes

 sel
 
Bitfield< 5, 4 > rw
 
Bitfield< 3, 1 > mode
 
Bitfield< 0 > bcd
 
Bitfield< 5 > count
 
Bitfield< 2 > cnt1
 
Bitfield< 1 > cnt0
 
std::string _name
 
std::array< Counter, 3 > counters
 PIT has three seperate counters. More...
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Detailed Description

Programmable Interval Timer (Intel 8254)

Definition at line 47 of file intel_8254_timer.hh.

Member Enumeration Documentation

◆ ModeVal

Enumerator
InitTc 
OneShot 
RateGen 
SquareWave 
SoftwareStrobe 
HardwareStrobe 

Definition at line 83 of file intel_8254_timer.hh.

◆ ReadWriteVal

Enumerator
LatchCommand 
LsbOnly 
MsbOnly 
TwoPhase 

Definition at line 75 of file intel_8254_timer.hh.

Constructor & Destructor Documentation

◆ ~Intel8254Timer()

virtual gem5::Intel8254Timer::~Intel8254Timer ( )
inlinevirtual

Definition at line 227 of file intel_8254_timer.hh.

◆ Intel8254Timer()

gem5::Intel8254Timer::Intel8254Timer ( EventManager em,
const std::string &  name 
)

Definition at line 39 of file intel_8254_timer.cc.

References name().

Member Function Documentation

◆ BitUnion8()

gem5::Intel8254Timer::BitUnion8 ( CtrlReg  )
protected

◆ counterInterrupt()

virtual void gem5::Intel8254Timer::counterInterrupt ( unsigned int  num)
inlineprotectedvirtual

Reimplemented in gem5::X86ISA::I8254::X86Intel8254Timer.

Definition at line 219 of file intel_8254_timer.hh.

References DPRINTF.

◆ EndBitUnion()

gem5::Intel8254Timer::EndBitUnion ( CtrlReg  )
protected

◆ EndSubBitUnion()

gem5::Intel8254Timer::EndSubBitUnion ( select  )
inlineprotected

Definition at line 64 of file intel_8254_timer.hh.

◆ name()

const std::string& gem5::Intel8254Timer::name ( ) const
inlineprotected

Definition at line 213 of file intel_8254_timer.hh.

References _name.

Referenced by Intel8254Timer().

◆ outputHigh()

bool gem5::Intel8254Timer::outputHigh ( unsigned int  num)
inline

Definition at line 250 of file intel_8254_timer.hh.

References counters.

Referenced by gem5::X86ISA::I8254::outputHigh().

◆ readCounter()

uint8_t gem5::Intel8254Timer::readCounter ( unsigned int  num)
inline

Definition at line 236 of file intel_8254_timer.hh.

References counters.

Referenced by gem5::X86ISA::I8254::readCounter().

◆ serialize()

void gem5::Intel8254Timer::serialize ( const std::string &  base,
CheckpointOut cp 
) const

Serialize this object to the given output stream.

Parameters
baseThe base name of the counter object.
osThe stream to serialize to.

Definition at line 77 of file intel_8254_timer.cc.

References gem5::X86ISA::base, and counters.

Referenced by gem5::MaltaIO::serialize().

◆ startup()

void gem5::Intel8254Timer::startup ( )

Start ticking.

Definition at line 95 of file intel_8254_timer.cc.

References counters.

Referenced by gem5::MaltaIO::startup().

◆ SubBitUnion()

gem5::Intel8254Timer::SubBitUnion ( select  ,
,
 
)
protected

◆ unserialize()

void gem5::Intel8254Timer::unserialize ( const std::string &  base,
CheckpointIn cp 
)

Reconstruct the state of this object from a checkpoint.

Parameters
baseThe base name of the counter object.
cpThe checkpoint use.
sectionThe section name of this object

Definition at line 86 of file intel_8254_timer.cc.

References gem5::X86ISA::base, and counters.

Referenced by gem5::MaltaIO::unserialize().

◆ writeControl()

void gem5::Intel8254Timer::writeControl ( const CtrlReg  data)

Write control word.

Definition at line 48 of file intel_8254_timer.cc.

References gem5::bits(), counters, data, LatchCommand, panic_if, and sel.

Referenced by gem5::X86ISA::I8254::writeControl().

◆ writeCounter()

void gem5::Intel8254Timer::writeCounter ( unsigned int  num,
const uint8_t  data 
)
inline

Definition at line 243 of file intel_8254_timer.hh.

References counters, and data.

Referenced by gem5::X86ISA::I8254::writeCounter().

Member Data Documentation

◆ _name

std::string gem5::Intel8254Timer::_name
protected

Definition at line 212 of file intel_8254_timer.hh.

Referenced by name().

◆ bcd

Bitfield<0> gem5::Intel8254Timer::bcd
protected

Definition at line 54 of file intel_8254_timer.hh.

◆ cnt0

Bitfield<1> gem5::Intel8254Timer::cnt0
protected

Definition at line 63 of file intel_8254_timer.hh.

◆ cnt1

Bitfield<2> gem5::Intel8254Timer::cnt1
protected

Definition at line 62 of file intel_8254_timer.hh.

◆ count

Bitfield<5> gem5::Intel8254Timer::count
protected

Definition at line 59 of file intel_8254_timer.hh.

Referenced by gem5::Intel8254Timer::Counter::read().

◆ counters

std::array<Counter, 3> gem5::Intel8254Timer::counters
protected

PIT has three seperate counters.

Definition at line 216 of file intel_8254_timer.hh.

Referenced by outputHigh(), readCounter(), serialize(), startup(), unserialize(), writeControl(), and writeCounter().

◆ mode

Bitfield<3, 1> gem5::Intel8254Timer::mode
protected

◆ rw

Bitfield<5, 4> gem5::Intel8254Timer::rw
protected

Definition at line 52 of file intel_8254_timer.hh.

◆ sel

gem5::Intel8254Timer::sel
protected

Definition at line 51 of file intel_8254_timer.hh.

Referenced by writeControl().


The documentation for this class was generated from the following files:

Generated on Thu Jul 28 2022 13:33:05 for gem5 by doxygen 1.8.17