gem5  v21.1.0.2
i8254.hh
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28 
29 #ifndef __DEV_X86_I8254_HH__
30 #define __DEV_X86_I8254_HH__
31 
32 #include "dev/intel_8254_timer.hh"
33 #include "dev/intpin.hh"
34 #include "dev/io_device.hh"
35 #include "params/I8254.hh"
36 
37 namespace gem5
38 {
39 
40 namespace X86ISA
41 {
42 
43 class I8254 : public BasicPioDevice
44 {
45  protected:
48  {
49  protected:
51 
52  void
53  counterInterrupt(unsigned int num)
54  {
56  }
57 
58  public:
59  X86Intel8254Timer(const std::string &name, I8254 * _parent) :
60  Intel8254Timer(_parent, name), parent(_parent)
61  {}
62  };
63 
64 
66 
68 
69  void counterInterrupt(unsigned int num);
70 
71  public:
72  using Params = I8254Params;
73 
74  Port &
75  getPort(const std::string &if_name, PortID idx=InvalidPortID) override
76  {
77  if (if_name == "int_pin")
78  return *intPin.at(idx);
79  else
80  return BasicPioDevice::getPort(if_name, idx);
81  }
82 
83  I8254(const Params &p) : BasicPioDevice(p, 4), latency(p.pio_latency),
84  pit(p.name, this)
85  {
86  for (int i = 0; i < p.port_int_pin_connection_count; i++) {
87  intPin.push_back(new IntSourcePin<I8254>(csprintf(
88  "%s.int_pin[%d]", name(), i), i, this));
89  }
90  }
91 
92  Tick read(PacketPtr pkt) override;
93  Tick write(PacketPtr pkt) override;
94 
95  bool
96  outputHigh(unsigned int num)
97  {
98  return pit.outputHigh(num);
99  }
100 
101  uint8_t
102  readCounter(unsigned int num)
103  {
104  return pit.readCounter(num);
105  }
106 
107  void
108  writeCounter(unsigned int num, const uint8_t data)
109  {
110  pit.writeCounter(num, data);
111  }
112 
113  void
114  writeControl(uint8_t val)
115  {
117  }
118 
119  void serialize(CheckpointOut &cp) const override;
120  void unserialize(CheckpointIn &cp) override;
121 
122  void startup() override;
123 
124 };
125 
126 } // namespace X86ISA
127 } // namespace gem5
128 
129 #endif //__DEV_X86_SOUTH_BRIDGE_I8254_HH__
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:252
gem5::X86ISA::I8254::intPin
std::vector< IntSourcePin< I8254 > * > intPin
Definition: i8254.hh:67
io_device.hh
gem5::X86ISA::I8254::counterInterrupt
void counterInterrupt(unsigned int num)
Definition: i8254.cc:40
gem5::X86ISA::I8254::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: i8254.cc:85
gem5::X86ISA::I8254::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: i8254.cc:91
gem5::X86ISA::I8254::I8254
I8254(const Params &p)
Definition: i8254.hh:83
data
const char data[]
Definition: circlebuf.test.cc:48
gem5::X86ISA::I8254::X86Intel8254Timer::counterInterrupt
void counterInterrupt(unsigned int num)
Definition: i8254.hh:53
gem5::Intel8254Timer
Programmable Interval Timer (Intel 8254)
Definition: intel_8254_timer.hh:46
gem5::X86ISA::I8254::startup
void startup() override
startup() is the final initialization call before simulation.
Definition: i8254.cc:97
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::X86ISA::I8254::X86Intel8254Timer
Definition: i8254.hh:47
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:775
gem5::X86ISA::I8254::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: i8254.cc:69
gem5::X86ISA::I8254::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: i8254.hh:75
gem5::Intel8254Timer::writeCounter
void writeCounter(unsigned int num, const uint8_t data)
Definition: intel_8254_timer.hh:233
gem5::X86ISA::I8254::latency
Tick latency
Definition: i8254.hh:46
std::vector
STL vector class.
Definition: stl.hh:37
gem5::csprintf
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:161
gem5::X86ISA::I8254::X86Intel8254Timer::X86Intel8254Timer
X86Intel8254Timer(const std::string &name, I8254 *_parent)
Definition: i8254.hh:59
gem5::X86ISA::I8254::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: i8254.cc:53
gem5::InvalidPortID
const PortID InvalidPortID
Definition: types.hh:253
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:66
gem5::X86ISA::I8254::readCounter
uint8_t readCounter(unsigned int num)
Definition: i8254.hh:102
gem5::PioDevice::Params
PioDeviceParams Params
Definition: io_device.hh:134
gem5::Named::name
virtual std::string name() const
Definition: named.hh:47
gem5::X86ISA::I8254::X86Intel8254Timer::parent
I8254 * parent
Definition: i8254.hh:50
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::X86ISA::I8254::pit
X86Intel8254Timer pit
Definition: i8254.hh:65
gem5::X86ISA::I8254::writeControl
void writeControl(uint8_t val)
Definition: i8254.hh:114
gem5::Intel8254Timer::readCounter
uint8_t readCounter(unsigned int num)
Definition: intel_8254_timer.hh:226
gem5::Intel8254Timer::outputHigh
bool outputHigh(unsigned int num)
Definition: intel_8254_timer.hh:240
gem5::X86ISA::I8254::outputHigh
bool outputHigh(unsigned int num)
Definition: i8254.hh:96
gem5::Intel8254Timer::name
const std::string & name() const
Definition: intel_8254_timer.hh:200
intel_8254_timer.hh
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
gem5::X86ISA::I8254::writeCounter
void writeCounter(unsigned int num, const uint8_t data)
Definition: i8254.hh:108
gem5::X86ISA::p
Bitfield< 0 > p
Definition: pagetable.hh:151
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::IntSourcePin
Definition: intpin.hh:112
intpin.hh
gem5::X86ISA::I8254
Definition: i8254.hh:43
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::Intel8254Timer::writeControl
void writeControl(const CtrlReg data)
Write control word.
Definition: intel_8254_timer.cc:57
gem5::BasicPioDevice
Definition: io_device.hh:147
gem5::PioDevice::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: io_device.cc:67

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