gem5  v21.1.0.2
Public Member Functions | Protected Attributes | Private Member Functions | List of all members
gem5::VegaISA::Inst_VOP1 Class Reference

#include <op_encodings.hh>

Inheritance diagram for gem5::VegaISA::Inst_VOP1:
gem5::VegaISA::VEGAGPUStaticInst gem5::GPUStaticInst gem5::VegaISA::Inst_VOP1__V_BFREV_B32 gem5::VegaISA::Inst_VOP1__V_CEIL_F16 gem5::VegaISA::Inst_VOP1__V_CEIL_F32 gem5::VegaISA::Inst_VOP1__V_CEIL_F64 gem5::VegaISA::Inst_VOP1__V_CLREXCP gem5::VegaISA::Inst_VOP1__V_COS_F16 gem5::VegaISA::Inst_VOP1__V_COS_F32 gem5::VegaISA::Inst_VOP1__V_CVT_F16_F32 gem5::VegaISA::Inst_VOP1__V_CVT_F16_I16 gem5::VegaISA::Inst_VOP1__V_CVT_F16_U16 gem5::VegaISA::Inst_VOP1__V_CVT_F32_F16 gem5::VegaISA::Inst_VOP1__V_CVT_F32_F64 gem5::VegaISA::Inst_VOP1__V_CVT_F32_I32 gem5::VegaISA::Inst_VOP1__V_CVT_F32_U32 gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE0 gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE1 gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE2 gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE3 gem5::VegaISA::Inst_VOP1__V_CVT_F64_F32 gem5::VegaISA::Inst_VOP1__V_CVT_F64_I32 gem5::VegaISA::Inst_VOP1__V_CVT_F64_U32 gem5::VegaISA::Inst_VOP1__V_CVT_FLR_I32_F32 gem5::VegaISA::Inst_VOP1__V_CVT_I16_F16 gem5::VegaISA::Inst_VOP1__V_CVT_I32_F32 gem5::VegaISA::Inst_VOP1__V_CVT_I32_F64 gem5::VegaISA::Inst_VOP1__V_CVT_OFF_F32_I4 gem5::VegaISA::Inst_VOP1__V_CVT_RPI_I32_F32 gem5::VegaISA::Inst_VOP1__V_CVT_U16_F16 gem5::VegaISA::Inst_VOP1__V_CVT_U32_F32 gem5::VegaISA::Inst_VOP1__V_CVT_U32_F64 gem5::VegaISA::Inst_VOP1__V_EXP_F16 gem5::VegaISA::Inst_VOP1__V_EXP_F32 gem5::VegaISA::Inst_VOP1__V_EXP_LEGACY_F32 gem5::VegaISA::Inst_VOP1__V_FFBH_I32 gem5::VegaISA::Inst_VOP1__V_FFBH_U32 gem5::VegaISA::Inst_VOP1__V_FFBL_B32 gem5::VegaISA::Inst_VOP1__V_FLOOR_F16 gem5::VegaISA::Inst_VOP1__V_FLOOR_F32 gem5::VegaISA::Inst_VOP1__V_FLOOR_F64 gem5::VegaISA::Inst_VOP1__V_FRACT_F16 gem5::VegaISA::Inst_VOP1__V_FRACT_F32 gem5::VegaISA::Inst_VOP1__V_FRACT_F64 gem5::VegaISA::Inst_VOP1__V_FREXP_EXP_I16_F16 gem5::VegaISA::Inst_VOP1__V_FREXP_EXP_I32_F32 gem5::VegaISA::Inst_VOP1__V_FREXP_EXP_I32_F64 gem5::VegaISA::Inst_VOP1__V_FREXP_MANT_F16 gem5::VegaISA::Inst_VOP1__V_FREXP_MANT_F32 gem5::VegaISA::Inst_VOP1__V_FREXP_MANT_F64 gem5::VegaISA::Inst_VOP1__V_LOG_F16 gem5::VegaISA::Inst_VOP1__V_LOG_F32 gem5::VegaISA::Inst_VOP1__V_LOG_LEGACY_F32 gem5::VegaISA::Inst_VOP1__V_MOV_B32 gem5::VegaISA::Inst_VOP1__V_MOV_FED_B32 gem5::VegaISA::Inst_VOP1__V_NOP gem5::VegaISA::Inst_VOP1__V_NOT_B32 gem5::VegaISA::Inst_VOP1__V_RCP_F16 gem5::VegaISA::Inst_VOP1__V_RCP_F32 gem5::VegaISA::Inst_VOP1__V_RCP_F64 gem5::VegaISA::Inst_VOP1__V_RCP_IFLAG_F32 gem5::VegaISA::Inst_VOP1__V_READFIRSTLANE_B32 gem5::VegaISA::Inst_VOP1__V_RNDNE_F16 gem5::VegaISA::Inst_VOP1__V_RNDNE_F32 gem5::VegaISA::Inst_VOP1__V_RNDNE_F64 gem5::VegaISA::Inst_VOP1__V_RSQ_F16 gem5::VegaISA::Inst_VOP1__V_RSQ_F32 gem5::VegaISA::Inst_VOP1__V_RSQ_F64 gem5::VegaISA::Inst_VOP1__V_SIN_F16 gem5::VegaISA::Inst_VOP1__V_SIN_F32 gem5::VegaISA::Inst_VOP1__V_SQRT_F16 gem5::VegaISA::Inst_VOP1__V_SQRT_F32 gem5::VegaISA::Inst_VOP1__V_SQRT_F64 gem5::VegaISA::Inst_VOP1__V_TRUNC_F16 gem5::VegaISA::Inst_VOP1__V_TRUNC_F32 gem5::VegaISA::Inst_VOP1__V_TRUNC_F64

Public Member Functions

 Inst_VOP1 (InFmt_VOP1 *, const std::string &opcode)
 
 ~Inst_VOP1 ()
 
int instSize () const override
 
void generateDisassembly () override
 
void initOperandInfo () override
 
- Public Member Functions inherited from gem5::VegaISA::VEGAGPUStaticInst
 VEGAGPUStaticInst (const std::string &opcode)
 
 ~VEGAGPUStaticInst ()
 
bool isFlatScratchRegister (int opIdx) override
 
int getOperandSize (int opIdx) override
 
int coalescerTokenCount () const override
 Return the number of tokens needed by the coalescer. More...
 
ScalarRegU32 srcLiteral () const override
 
- Public Member Functions inherited from gem5::GPUStaticInst
 GPUStaticInst (const std::string &opcode)
 
virtual ~GPUStaticInst ()
 
void instAddr (int inst_addr)
 
int instAddr () const
 
int nextInstAddr () const
 
void instNum (int num)
 
int instNum ()
 
void ipdInstNum (int num)
 
int ipdInstNum () const
 
void initDynOperandInfo (Wavefront *wf, ComputeUnit *cu)
 
virtual void execute (GPUDynInstPtr gpuDynInst)=0
 
const std::string & disassemble ()
 
virtual int getNumOperands ()=0
 
virtual bool isExecMaskRegister (int opIdx)=0
 
virtual int numDstRegOperands ()=0
 
virtual int numSrcRegOperands ()=0
 
int numSrcVecOperands ()
 
int numDstVecOperands ()
 
int numSrcVecDWords ()
 
int numDstVecDWords ()
 
int numSrcScalarOperands ()
 
int numDstScalarOperands ()
 
int numSrcScalarDWords ()
 
int numDstScalarDWords ()
 
int maxOperandSize ()
 
bool isALU () const
 
bool isBranch () const
 
bool isCondBranch () const
 
bool isNop () const
 
bool isReturn () const
 
bool isEndOfKernel () const
 
bool isKernelLaunch () const
 
bool isSDWAInst () const
 
bool isDPPInst () const
 
bool isUnconditionalJump () const
 
bool isSpecialOp () const
 
bool isWaitcnt () const
 
bool isSleep () const
 
bool isBarrier () const
 
bool isMemSync () const
 
bool isMemRef () const
 
bool isFlat () const
 
bool isLoad () const
 
bool isStore () const
 
bool isAtomic () const
 
bool isAtomicNoRet () const
 
bool isAtomicRet () const
 
bool isScalar () const
 
bool readsSCC () const
 
bool writesSCC () const
 
bool readsVCC () const
 
bool writesVCC () const
 
bool readsEXEC () const
 
bool writesEXEC () const
 
bool readsMode () const
 
bool writesMode () const
 
bool ignoreExec () const
 
bool isAtomicAnd () const
 
bool isAtomicOr () const
 
bool isAtomicXor () const
 
bool isAtomicCAS () const
 
bool isAtomicExch () const
 
bool isAtomicAdd () const
 
bool isAtomicSub () const
 
bool isAtomicInc () const
 
bool isAtomicDec () const
 
bool isAtomicMax () const
 
bool isAtomicMin () const
 
bool isArgLoad () const
 
bool isGlobalMem () const
 
bool isLocalMem () const
 
bool isArgSeg () const
 
bool isGlobalSeg () const
 
bool isGroupSeg () const
 
bool isKernArgSeg () const
 
bool isPrivateSeg () const
 
bool isReadOnlySeg () const
 
bool isSpillSeg () const
 
bool isGloballyCoherent () const
 Coherence domain of a memory instruction. More...
 
bool isSystemCoherent () const
 
bool isF16 () const
 
bool isF32 () const
 
bool isF64 () const
 
bool isFMA () const
 
bool isMAC () const
 
bool isMAD () const
 
virtual void initiateAcc (GPUDynInstPtr gpuDynInst)
 
virtual void completeAcc (GPUDynInstPtr gpuDynInst)
 
virtual uint32_t getTargetPc ()
 
void setFlag (Flags flag)
 
const std::string & opcode () const
 
const std::vector< OperandInfo > & srcOperands () const
 
const std::vector< OperandInfo > & dstOperands () const
 
const std::vector< OperandInfo > & srcVecRegOperands () const
 
const std::vector< OperandInfo > & dstVecRegOperands () const
 
const std::vector< OperandInfo > & srcScalarRegOperands () const
 
const std::vector< OperandInfo > & dstScalarRegOperands () const
 

Protected Attributes

InFmt_VOP1 instData
 
InstFormat extData
 
uint32_t varSize
 
- Protected Attributes inherited from gem5::VegaISA::VEGAGPUStaticInst
ScalarRegU32 _srcLiteral
 if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here More...
 
- Protected Attributes inherited from gem5::GPUStaticInst
const std::string _opcode
 
std::string disassembly
 
int _instNum
 
int _instAddr
 
std::vector< OperandInfosrcOps
 
std::vector< OperandInfodstOps
 

Private Member Functions

bool hasSecondDword (InFmt_VOP1 *)
 

Additional Inherited Members

- Public Types inherited from gem5::GPUStaticInst
enum  OpType { SRC_VEC, SRC_SCALAR, DST_VEC, DST_SCALAR }
 
typedef int(RegisterManager::* MapRegFn) (Wavefront *, int)
 
- Public Attributes inherited from gem5::GPUStaticInst
enums::StorageClassType executed_as
 
- Static Public Attributes inherited from gem5::GPUStaticInst
static uint64_t dynamic_id_count
 
- Protected Member Functions inherited from gem5::VegaISA::VEGAGPUStaticInst
void panicUnimplemented () const
 

Detailed Description

Definition at line 281 of file op_encodings.hh.

Constructor & Destructor Documentation

◆ Inst_VOP1()

gem5::VegaISA::Inst_VOP1::Inst_VOP1 ( InFmt_VOP1 iFmt,
const std::string &  opcode 
)

◆ ~Inst_VOP1()

gem5::VegaISA::Inst_VOP1::~Inst_VOP1 ( )

Definition at line 745 of file op_encodings.cc.

Member Function Documentation

◆ generateDisassembly()

void gem5::VegaISA::Inst_VOP1::generateDisassembly ( )
overridevirtual

◆ hasSecondDword()

bool gem5::VegaISA::Inst_VOP1::hasSecondDword ( InFmt_VOP1 iFmt)
private

◆ initOperandInfo()

void gem5::VegaISA::Inst_VOP1::initOperandInfo ( )
overridevirtual

◆ instSize()

int gem5::VegaISA::Inst_VOP1::instSize ( ) const
overridevirtual

Implements gem5::GPUStaticInst.

Definition at line 773 of file op_encodings.cc.

References varSize.

Member Data Documentation

◆ extData

InstFormat gem5::VegaISA::Inst_VOP1::extData
protected

Definition at line 296 of file op_encodings.hh.

Referenced by gem5::VegaISA::Inst_VOP1__V_MOV_B32::execute(), and Inst_VOP1().

◆ instData

InFmt_VOP1 gem5::VegaISA::Inst_VOP1::instData
protected

Definition at line 294 of file op_encodings.hh.

Referenced by gem5::VegaISA::Inst_VOP1__V_MOV_B32::execute(), gem5::VegaISA::Inst_VOP1__V_READFIRSTLANE_B32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_I32_F64::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F64_I32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_I32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_U32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_U32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_I32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_RPI_I32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_FLR_I32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_F64::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F64_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE0::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE1::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE2::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE3::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_U32_F64::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F64_U32::execute(), gem5::VegaISA::Inst_VOP1__V_TRUNC_F64::execute(), gem5::VegaISA::Inst_VOP1__V_CEIL_F64::execute(), gem5::VegaISA::Inst_VOP1__V_RNDNE_F64::execute(), gem5::VegaISA::Inst_VOP1__V_FLOOR_F64::execute(), gem5::VegaISA::Inst_VOP1__V_FRACT_F32::execute(), gem5::VegaISA::Inst_VOP1__V_TRUNC_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CEIL_F32::execute(), gem5::VegaISA::Inst_VOP1__V_RNDNE_F32::execute(), gem5::VegaISA::Inst_VOP1__V_FLOOR_F32::execute(), gem5::VegaISA::Inst_VOP1__V_EXP_F32::execute(), gem5::VegaISA::Inst_VOP1__V_LOG_F32::execute(), gem5::VegaISA::Inst_VOP1__V_RCP_F32::execute(), gem5::VegaISA::Inst_VOP1__V_RCP_IFLAG_F32::execute(), gem5::VegaISA::Inst_VOP1__V_RSQ_F32::execute(), gem5::VegaISA::Inst_VOP1__V_RCP_F64::execute(), gem5::VegaISA::Inst_VOP1__V_RSQ_F64::execute(), gem5::VegaISA::Inst_VOP1__V_SQRT_F32::execute(), gem5::VegaISA::Inst_VOP1__V_SQRT_F64::execute(), gem5::VegaISA::Inst_VOP1__V_SIN_F32::execute(), gem5::VegaISA::Inst_VOP1__V_COS_F32::execute(), gem5::VegaISA::Inst_VOP1__V_NOT_B32::execute(), gem5::VegaISA::Inst_VOP1__V_BFREV_B32::execute(), gem5::VegaISA::Inst_VOP1__V_FFBH_U32::execute(), gem5::VegaISA::Inst_VOP1__V_FFBL_B32::execute(), gem5::VegaISA::Inst_VOP1__V_FFBH_I32::execute(), gem5::VegaISA::Inst_VOP1__V_FREXP_EXP_I32_F64::execute(), gem5::VegaISA::Inst_VOP1__V_FREXP_MANT_F64::execute(), gem5::VegaISA::Inst_VOP1__V_FRACT_F64::execute(), gem5::VegaISA::Inst_VOP1__V_FREXP_EXP_I32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_FREXP_MANT_F32::execute(), gem5::VegaISA::Inst_VOP1__V_EXP_LEGACY_F32::execute(), gem5::VegaISA::Inst_VOP1__V_LOG_LEGACY_F32::execute(), generateDisassembly(), initOperandInfo(), and Inst_VOP1().

◆ varSize

uint32_t gem5::VegaISA::Inst_VOP1::varSize
protected

Definition at line 297 of file op_encodings.hh.

Referenced by Inst_VOP1(), and instSize().


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:33:36 for gem5 by doxygen 1.8.17