gem5  v21.1.0.2
isa_fake.cc
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28 
33 #include "dev/isa_fake.hh"
34 
35 #include "base/trace.hh"
36 #include "debug/IsaFake.hh"
37 #include "mem/packet.hh"
38 #include "mem/packet_access.hh"
39 #include "sim/system.hh"
40 
41 namespace gem5
42 {
43 
45  : BasicPioDevice(p, p.ret_bad_addr ? 0 : p.pio_size)
46 {
47  retData8 = p.ret_data8;
48  retData16 = p.ret_data16;
49  retData32 = p.ret_data32;
50  retData64 = p.ret_data64;
51 }
52 
53 Tick
55 {
56  pkt->makeAtomicResponse();
57 
58  if (params().warn_access != "")
59  warn("Device %s accessed by read to address %#x size=%d\n",
60  name(), pkt->getAddr(), pkt->getSize());
61  if (params().ret_bad_addr) {
62  DPRINTF(IsaFake, "read to bad address va=%#x size=%d\n",
63  pkt->getAddr(), pkt->getSize());
64  pkt->setBadAddress();
65  } else {
66  assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
67  DPRINTF(IsaFake, "read va=%#x size=%d\n",
68  pkt->getAddr(), pkt->getSize());
69  switch (pkt->getSize()) {
70  case sizeof(uint64_t):
71  pkt->setLE(retData64);
72  break;
73  case sizeof(uint32_t):
74  pkt->setLE(retData32);
75  break;
76  case sizeof(uint16_t):
77  pkt->setLE(retData16);
78  break;
79  case sizeof(uint8_t):
80  pkt->setLE(retData8);
81  break;
82  default:
83  if (params().fake_mem)
84  std::memset(pkt->getPtr<uint8_t>(), 0, pkt->getSize());
85  else
86  panic("invalid access size! Device being accessed by cache?\n");
87  }
88  }
89  return pioDelay;
90 }
91 
92 Tick
94 {
95  pkt->makeAtomicResponse();
96  if (params().warn_access != "") {
97  uint64_t data;
98  switch (pkt->getSize()) {
99  case sizeof(uint64_t):
100  data = pkt->getLE<uint64_t>();
101  break;
102  case sizeof(uint32_t):
103  data = pkt->getLE<uint32_t>();
104  break;
105  case sizeof(uint16_t):
106  data = pkt->getLE<uint16_t>();
107  break;
108  case sizeof(uint8_t):
109  data = pkt->getLE<uint8_t>();
110  break;
111  default:
112  panic("invalid access size: %u\n", pkt->getSize());
113  }
114  warn("Device %s accessed by write to address %#x size=%d data=%#x\n",
115  name(), pkt->getAddr(), pkt->getSize(), data);
116  }
117  if (params().ret_bad_addr) {
118  DPRINTF(IsaFake, "write to bad address va=%#x size=%d \n",
119  pkt->getAddr(), pkt->getSize());
120  pkt->setBadAddress();
121  } else {
122  DPRINTF(IsaFake, "write - va=%#x size=%d \n",
123  pkt->getAddr(), pkt->getSize());
124 
125  if (params().update_data) {
126  switch (pkt->getSize()) {
127  case sizeof(uint64_t):
128  retData64 = pkt->getLE<uint64_t>();
129  break;
130  case sizeof(uint32_t):
131  retData32 = pkt->getLE<uint32_t>();
132  break;
133  case sizeof(uint16_t):
134  retData16 = pkt->getLE<uint16_t>();
135  break;
136  case sizeof(uint8_t):
137  retData8 = pkt->getLE<uint8_t>();
138  break;
139  default:
140  panic("invalid access size!\n");
141  }
142  }
143  }
144  return pioDelay;
145 }
146 
147 } // namespace gem5
gem5::BasicPioDevice::pioAddr
Addr pioAddr
Address that the device listens to.
Definition: io_device.hh:151
warn
#define warn(...)
Definition: logging.hh:245
system.hh
data
const char data[]
Definition: circlebuf.test.cc:48
isa_fake.hh
gem5::IsaFake::retData16
uint16_t retData16
Definition: isa_fake.hh:56
gem5::Packet::setBadAddress
void setBadAddress()
Definition: packet.hh:773
gem5::IsaFake::retData8
uint8_t retData8
Definition: isa_fake.hh:55
gem5::Packet::makeAtomicResponse
void makeAtomicResponse()
Definition: packet.hh:1043
gem5::IsaFake::retData32
uint32_t retData32
Definition: isa_fake.hh:57
packet.hh
gem5::IsaFake::read
virtual Tick read(PacketPtr pkt)
This read always returns -1.
Definition: isa_fake.cc:54
gem5::PioDevice::Params
PioDeviceParams Params
Definition: io_device.hh:134
gem5::IsaFake
IsaFake is a device that returns, BadAddr, 1 or 0 on all reads and rites.
Definition: isa_fake.hh:52
gem5::Named::name
virtual std::string name() const
Definition: named.hh:47
gem5::SimObject::params
const Params & params() const
Definition: sim_object.hh:176
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::BasicPioDevice::pioDelay
Tick pioDelay
Delay that the device experinces on an access.
Definition: io_device.hh:157
gem5::IsaFake::write
virtual Tick write(PacketPtr pkt)
All writes are simply ignored.
Definition: isa_fake.cc:93
packet_access.hh
gem5::IsaFake::retData64
uint64_t retData64
Definition: isa_fake.hh:58
gem5::Packet::getLE
T getLE() const
Get the data in the packet byte swapped from little endian to host endian.
Definition: packet_access.hh:78
gem5::BasicPioDevice::pioSize
Addr pioSize
Size that the device's address range.
Definition: io_device.hh:154
trace.hh
gem5::Packet::setLE
void setLE(T v)
Set the value in the data pointer to v as little endian.
Definition: packet_access.hh:108
gem5::IsaFake::IsaFake
IsaFake(const Params &p)
The constructor for Isa Fake just registers itself with the MMU.
Definition: isa_fake.cc:44
gem5::Packet::getAddr
Addr getAddr() const
Definition: packet.hh:781
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::BasicPioDevice
Definition: io_device.hh:147
gem5::Packet::getSize
unsigned getSize() const
Definition: packet.hh:791
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:177
gem5::Packet::getPtr
T * getPtr()
get a pointer to the data ptr.
Definition: packet.hh:1184

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