gem5 v24.0.0.0
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memory_manager.hh
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1/*
2 * Copyright (c) 2021 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice,
12 * this list of conditions and the following disclaimer in the documentation
13 * and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#ifndef __DEV_AMDGPU_MEMORY_MANAGER_HH__
33#define __DEV_AMDGPU_MEMORY_MANAGER_HH__
34
35#include <deque>
36#include <unordered_map>
37
38#include "base/callback.hh"
39#include "mem/port.hh"
40#include "params/AMDGPUMemoryManager.hh"
41#include "sim/clocked_object.hh"
42
43namespace gem5
44{
45
47{
48 class GPUMemPort : public RequestPort
49 {
50 public:
51 GPUMemPort(const std::string &_name, AMDGPUMemoryManager &_gpuMemMgr)
52 : RequestPort(_name), gpu_mem(_gpuMemMgr)
53 {
54 }
55
56 bool recvTimingResp(PacketPtr pkt) override;
57 void recvReqRetry() override;
58
60 {
61 SenderState(Event *callback, Addr addr, uint64_t requestId)
63 {}
64
67 uint64_t _requestId;
68 };
69
72 };
73
75 const int cacheLineSize;
77
79 {
82
85 };
86
87 uint64_t requestId = 0;
88 std::unordered_map<uint64_t, RequestStatus> requestStatus;
89
90 public:
91 AMDGPUMemoryManager(const AMDGPUMemoryManagerParams &p);
93
104 void writeRequest(Addr addr, uint8_t *data, int size,
105 Request::Flags flag, Event *callback);
106
117 void readRequest(Addr addr, uint8_t *data, int size,
118 Request::Flags flag, Event *callback);
119
127
128 Port &
129 getPort(const std::string &if_name, PortID idx) override
130 {
131 if (if_name == "port") {
132 return _gpuMemPort;
133 } else {
134 return ClockedObject::getPort(if_name, idx);
135 }
136 }
137};
138
139} // namespace gem5
140
141#endif // __DEV_AMDGPU_MEMORY_MANAGER_HH__
const char data[]
bool recvTimingResp(PacketPtr pkt) override
Receive a timing response from the peer.
void recvReqRetry() override
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
GPUMemPort(const std::string &_name, AMDGPUMemoryManager &_gpuMemMgr)
RequestorID getRequestorID() const
Get the requestorID for the memory manager.
std::unordered_map< uint64_t, RequestStatus > requestStatus
AMDGPUMemoryManager(const AMDGPUMemoryManagerParams &p)
Port & getPort(const std::string &if_name, PortID idx) override
Get a port with a given name and index.
const RequestorID _requestorId
void writeRequest(Addr addr, uint8_t *data, int size, Request::Flags flag, Event *callback)
Write size amount of data to device memory at addr using flags and callback.
void readRequest(Addr addr, uint8_t *data, int size, Request::Flags flag, Event *callback)
Read size amount of data from device memory at addr using flags and callback.
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
const std::string _name
Definition named.hh:41
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
Ports are used to interface objects to each other.
Definition port.hh:62
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
Definition port.hh:136
STL deque class.
Definition stl.hh:44
ClockedObject declaration and implementation.
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
Port Object Declaration.
Bitfield< 0 > p
Bitfield< 3 > addr
Definition types.hh:84
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition types.hh:245
uint16_t RequestorID
Definition request.hh:95
SenderState(Event *callback, Addr addr, uint64_t requestId)
A virtual base opaque structure used to hold state associated with the packet (e.g....
Definition packet.hh:469

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