gem5  v21.1.0.2
random_gen.cc
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37 
39 
40 #include <algorithm>
41 
42 #include "base/random.hh"
43 #include "base/trace.hh"
44 #include "debug/TrafficGen.hh"
45 
46 namespace gem5
47 {
48 
49 void
51 {
52  // reset the counter to zero
53  dataManipulated = 0;
54 }
55 
58 {
59  // choose if we generate a read or a write here
60  bool isRead = readPercent != 0 &&
61  (readPercent == 100 || random_mt.random(0, 100) < readPercent);
62 
63  assert((readPercent == 0 && !isRead) || (readPercent == 100 && isRead) ||
64  readPercent != 100);
65 
66  // address of the request
68 
69  // round down to start address of block
70  addr -= addr % blocksize;
71 
72  DPRINTF(TrafficGen, "RandomGen::getNextPacket: %c to addr %x, size %d\n",
73  isRead ? 'r' : 'w', addr, blocksize);
74 
75  // add the amount of data manipulated to the total
77 
78  // create a new request packet
79  return getPacket(addr, blocksize,
81 }
82 
83 Tick
84 RandomGen::nextPacketTick(bool elastic, Tick delay) const
85 {
86  // Check to see if we have reached the data limit. If dataLimit is
87  // zero we do not have a data limit and therefore we will keep
88  // generating requests for the entire residency in this state.
90  {
91  DPRINTF(TrafficGen, "Data limit for RandomGen reached.\n");
92  // No more requests. Return MaxTick.
93  return MaxTick;
94  } else {
95  // return the time when the next request should take place
97 
98  // compensate for the delay experienced to not be elastic, by
99  // default the value we generate is from the time we are
100  // asked, so the elasticity happens automatically
101  if (!elastic) {
102  if (wait < delay)
103  wait = 0;
104  else
105  wait -= delay;
106  }
107 
108  return curTick() + wait;
109  }
110 }
111 
112 } // namespace gem5
gem5::curTick
Tick curTick()
The universal simulation clock.
Definition: cur_tick.hh:46
gem5::StochasticGen::minPeriod
const Tick minPeriod
Request generation period.
Definition: base_gen.hh:163
gem5::StochasticGen::blocksize
const Addr blocksize
Blocksize and address increment.
Definition: base_gen.hh:157
gem5::RandomGen::dataManipulated
Addr dataManipulated
Counter to determine the amount of data manipulated.
Definition: random_gen.hh:106
random.hh
gem5::MaxTick
const Tick MaxTick
Definition: types.hh:60
gem5::BaseGen::getPacket
PacketPtr getPacket(Addr addr, unsigned size, const MemCmd &cmd, Request::FlagsType flags=0)
Generate a new request and associated packet.
Definition: base_gen.cc:55
gem5::RandomGen::getNextPacket
PacketPtr getNextPacket()
Get the next generated packet.
Definition: random_gen.cc:57
gem5::StochasticGen::startAddr
const Addr startAddr
Start of address range.
Definition: base_gen.hh:151
gem5::Random::random
std::enable_if_t< std::is_integral< T >::value, T > random()
Use the SFINAE idiom to choose an implementation based on whether the type is integral or floating po...
Definition: random.hh:90
gem5::StochasticGen::dataLimit
const Addr dataLimit
Maximum amount of data to manipulate.
Definition: base_gen.hh:172
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::StochasticGen::endAddr
const Addr endAddr
End of address range.
Definition: base_gen.hh:154
gem5::MemCmd::ReadReq
@ ReadReq
Definition: packet.hh:86
gem5::StochasticGen::maxPeriod
const Tick maxPeriod
Definition: base_gen.hh:164
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
random_gen.hh
sc_core::wait
void wait()
Definition: sc_module.cc:653
gem5::RandomGen::enter
void enter()
Enter this generator state.
Definition: random_gen.cc:50
gem5::StochasticGen::readPercent
const uint8_t readPercent
Percent of generated transactions that should be reads.
Definition: base_gen.hh:169
gem5::RandomGen::nextPacketTick
Tick nextPacketTick(bool elastic, Tick delay) const
Determine the tick when the next packet is available.
Definition: random_gen.cc:84
gem5::TrafficGen
The traffic generator is a module that generates stimuli for the memory system, based on a collection...
Definition: traffic_gen.hh:70
gem5::MemCmd::WriteReq
@ WriteReq
Definition: packet.hh:89
trace.hh
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::random_mt
Random random_mt
Definition: random.cc:99
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84

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