gem5  v21.1.0.2
smmu_v3_cmdexec.cc
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37 
39 
40 #include "base/bitfield.hh"
41 #include "dev/arm/smmu_v3.hh"
42 
43 namespace gem5
44 {
45 
46 void
48 {
49  SMMUAction a;
50  a.type = ACTION_INITIAL_NOP;
51  a.pkt = NULL;
52  a.ifc = nullptr;
53  a.delay = 0;
54  yield(a);
55 
56  while (true) {
57  busy = true;
58 
59  while (true) {
60  // Masking depending on CMDQ_BASE.LOG2SIZE (log(number of
61  // queue entries)). Example: a value of 0b101 (32 entries)
62  // generates a 0b11111 mask.
63  int size_mask = mask(
65 
66  // In this case the wrap bit is considered (+1)
67  int size_mask_wrap = mask(
69 
70  if ((smmu.regs.cmdq_cons & size_mask_wrap) ==
71  (smmu.regs.cmdq_prod & size_mask_wrap))
72  break; // command queue empty
73 
74  Addr cmd_addr =
76  (smmu.regs.cmdq_cons & size_mask) * sizeof(SMMUCommand);
77 
78  // This deliberately resets the error field in cmdq_cons!
79  smmu.regs.cmdq_cons = (smmu.regs.cmdq_cons + 1) & size_mask_wrap;
80 
81  doRead(yield, cmd_addr, &cmd, sizeof(SMMUCommand));
83  }
84 
85  busy = false;
86  // No more commands to process, signal the SMMU as drained
88 
89  doSleep(yield);
90  }
91 }
92 
93 } // namespace gem5
gem5::ACTION_INITIAL_NOP
@ ACTION_INITIAL_NOP
Definition: smmu_v3_proc.hh:60
gem5::SMMUv3::regs
SMMURegs regs
Definition: smmu_v3.hh:156
gem5::SMMUAction
Definition: smmu_v3_proc.hh:70
gem5::SMMURegs::cmdq_cons
uint32_t cmdq_cons
Definition: smmu_v3_defs.hh:153
gem5::ArmISA::a
Bitfield< 8 > a
Definition: misc_types.hh:65
smmu_v3_cmdexec.hh
gem5::SMMUCommandExecProcess::cmd
SMMUCommand cmd
Definition: smmu_v3_cmdexec.hh:52
gem5::mask
constexpr uint64_t mask(unsigned nbits)
Generate a 64-bit mask of 'nbits' 1s, right justified.
Definition: bitfield.hh:63
gem5::SMMURegs::cmdq_prod
uint32_t cmdq_prod
Definition: smmu_v3_defs.hh:152
gem5::SMMUCommandExecProcess::busy
bool busy
Definition: smmu_v3_cmdexec.hh:54
gem5::Q_BASE_ADDR_MASK
@ Q_BASE_ADDR_MASK
Definition: smmu_v3_defs.hh:102
bitfield.hh
gem5::SMMUv3::processCommand
void processCommand(const SMMUCommand &cmd)
Definition: smmu_v3.cc:389
gem5::SMMUProcess::doSleep
void doSleep(Yield &yield)
Definition: smmu_v3_proc.cc:143
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::Drainable::signalDrainDone
void signalDrainDone() const
Signal that an object is drained.
Definition: drain.hh:305
smmu_v3.hh
gem5::SMMUProcess::doRead
void doRead(Yield &yield, Addr addr, void *ptr, size_t size)
Definition: smmu_v3_proc.cc:75
gem5::SMMUCommand
Definition: smmu_v3_defs.hh:359
gem5::Coroutine::CallerType
CallerType: A reference to an object of this class will be passed to the coroutine task.
Definition: coroutine.hh:85
gem5::SMMURegs::cmdq_base
uint64_t cmdq_base
Definition: smmu_v3_defs.hh:151
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::SMMUProcess::smmu
SMMUv3 & smmu
Definition: smmu_v3_proc.hh:110
gem5::SMMUCommandExecProcess::main
virtual void main(Yield &yield)
Definition: smmu_v3_cmdexec.cc:47
gem5::Q_BASE_SIZE_MASK
@ Q_BASE_SIZE_MASK
Definition: smmu_v3_defs.hh:103

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