gem5  v22.1.0.0
smmu_v3_ports.cc
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37 
38 #include "dev/arm/smmu_v3_ports.hh"
39 
40 #include "base/logging.hh"
41 #include "dev/arm/smmu_v3.hh"
43 
44 namespace gem5
45 {
46 
47 SMMURequestPort::SMMURequestPort(const std::string &_name, SMMUv3 &_smmu) :
48  RequestPort(_name, &_smmu),
49  smmu(_smmu)
50 {}
51 
52 bool
54 {
55  return smmu.recvTimingResp(pkt);
56 }
57 
58 void
60 {
61  return smmu.recvReqRetry();
62 }
63 
64 SMMUTableWalkPort::SMMUTableWalkPort(const std::string &_name,
65  SMMUv3 &_smmu) :
66  RequestPort(_name, &_smmu),
67  smmu(_smmu)
68 {}
69 
70 bool
72 {
73  return smmu.tableWalkRecvTimingResp(pkt);
74 }
75 
76 void
78 {
79  return smmu.tableWalkRecvReqRetry();
80 }
81 
82 SMMUDevicePort::SMMUDevicePort(const std::string &_name,
84  PortID _id)
85 :
86  QueuedResponsePort(_name, &_ifc, respQueue, _id),
87  ifc(_ifc),
88  respQueue(_ifc, *this)
89 {}
90 
91 void
93 {
95  recvAtomic(pkt);
96 }
97 
98 Tick
100 {
101  return ifc.recvAtomic(pkt);
102 }
103 
104 bool
106 {
107  return ifc.recvTimingReq(pkt);
108 }
109 
110 SMMUControlPort::SMMUControlPort(const std::string &_name,
111  SMMUv3 &_smmu, AddrRange _addrRange)
112 :
113  SimpleTimingPort(_name, &_smmu),
114  smmu(_smmu),
115  addrRange(_addrRange)
116 {}
117 
118 Tick
120 {
121  Addr addr = pkt->getAddr();
122  unsigned size = pkt->getSize();
123 
124  if (!addrRange.contains(addr) || !addrRange.contains(addr+size))
125  panic("SMMU: invalid address on control port %x, packet size %d",
126  addr, size);
127 
128  // @todo: We need to pay for this and not just zero it out
129  pkt->headerDelay = pkt->payloadDelay = 0;
130 
131  return pkt->isRead() ? smmu.readControl(pkt) : smmu.writeControl(pkt);
132 }
133 
136 {
138  list.push_back(addrRange);
139  return list;
140 }
141 
142 SMMUATSMemoryPort::SMMUATSMemoryPort(const std::string &_name,
143  SMMUv3DeviceInterface &_ifc) :
144  QueuedRequestPort(_name, &_ifc, reqQueue, snoopRespQueue),
145  ifc(_ifc),
146  reqQueue(_ifc, *this),
147  snoopRespQueue(_ifc, *this)
148 {}
149 
150 bool
152 {
153  return ifc.atsRecvTimingResp(pkt);
154 }
155 
156 SMMUATSDevicePort::SMMUATSDevicePort(const std::string &_name,
157  SMMUv3DeviceInterface &_ifc) :
158  QueuedResponsePort(_name, &_ifc, respQueue),
159  ifc(_ifc),
160  respQueue(_ifc, *this)
161 {}
162 
163 void
165 {
166  panic("Functional access on ATS port!");
167 }
168 
169 Tick
171 {
172  return ifc.atsRecvAtomic(pkt);
173 }
174 
175 bool
177 {
178  return ifc.atsRecvTimingReq(pkt);
179 }
180 
181 } // namespace gem5
The AddrRange class encapsulates an address range, and supports a number of tests to check if two ran...
Definition: addr_range.hh:82
bool trySatisfyFunctional(PacketPtr pkt)
Check the list of buffered packets against the supplied functional request.
Definition: packet_queue.cc:87
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:294
bool isRead() const
Definition: packet.hh:592
Addr getAddr() const
Definition: packet.hh:805
uint32_t payloadDelay
The extra pipelining delay from seeing the packet until the end of payload is transmitted by the comp...
Definition: packet.hh:448
uint32_t headerDelay
The extra delay from seeing the packet until the header is transmitted.
Definition: packet.hh:430
unsigned getSize() const
Definition: packet.hh:815
The QueuedRequestPort combines two queues, a request queue and a snoop response queue,...
Definition: qport.hh:110
A queued port is a port that has an infinite queue for outgoing packets and thus decouples the module...
Definition: qport.hh:62
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
Definition: port.hh:79
SMMUATSDevicePort(const std::string &_name, SMMUv3DeviceInterface &_ifc)
virtual bool recvTimingReq(PacketPtr pkt)
Receive a timing request from the peer.
virtual Tick recvAtomic(PacketPtr pkt)
Receive an atomic request packet from the peer.
SMMUv3DeviceInterface & ifc
virtual void recvFunctional(PacketPtr pkt)
Receive a functional request packet from the peer.
SMMUATSMemoryPort(const std::string &_name, SMMUv3DeviceInterface &_ifc)
virtual bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
SMMUv3DeviceInterface & ifc
virtual Tick recvAtomic(PacketPtr pkt)
Receive an atomic request packet from the peer.
SMMUControlPort(const std::string &_name, SMMUv3 &_smmu, AddrRange _addrRange)
virtual AddrRangeList getAddrRanges() const
Get a list of the non-overlapping address ranges the owner is responsible for.
SMMUDevicePort(const std::string &_name, SMMUv3DeviceInterface &_ifc, PortID _id=InvalidPortID)
virtual void recvFunctional(PacketPtr pkt)
Receive a functional request packet from the peer.
SMMUv3DeviceInterface & ifc
RespPacketQueue respQueue
virtual Tick recvAtomic(PacketPtr pkt)
Receive an atomic request packet from the peer.
virtual bool recvTimingReq(PacketPtr pkt)
Receive a timing request from the peer.
virtual void recvReqRetry()
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
virtual bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
SMMURequestPort(const std::string &_name, SMMUv3 &_smmu)
virtual bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
virtual void recvReqRetry()
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
SMMUTableWalkPort(const std::string &_name, SMMUv3 &_smmu)
Tick atsRecvAtomic(PacketPtr pkt)
bool atsRecvTimingResp(PacketPtr pkt)
Tick recvAtomic(PacketPtr pkt)
bool atsRecvTimingReq(PacketPtr pkt)
bool recvTimingReq(PacketPtr pkt)
Tick readControl(PacketPtr pkt)
Definition: smmu_v3.cc:571
void recvReqRetry()
Definition: smmu_v3.cc:150
bool recvTimingResp(PacketPtr pkt)
Definition: smmu_v3.cc:133
Tick writeControl(PacketPtr pkt)
Definition: smmu_v3.cc:604
void tableWalkRecvReqRetry()
Definition: smmu_v3.cc:196
bool tableWalkRecvTimingResp(PacketPtr pkt)
Definition: smmu_v3.cc:179
The simple timing port uses a queued port to implement recvFunctional and recvTimingReq through recvA...
Definition: tport.hh:63
bool contains(const Addr &a) const
Determine if the range contains an address.
Definition: addr_range.hh:471
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:178
Bitfield< 3 > addr
Definition: types.hh:84
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:245
uint64_t Tick
Tick count type.
Definition: types.hh:58
static scfx_rep_node * list
Definition: scfx_rep.cc:336
This is an implementation of the SMMUv3 architecture.

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