gem5  v22.1.0.0
translation.hh
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41 
42 #ifndef __CPU_TRANSLATION_HH__
43 #define __CPU_TRANSLATION_HH__
44 
45 #include "arch/generic/mmu.hh"
46 #include "arch/generic/tlb.hh"
47 #include "sim/faults.hh"
48 
49 namespace gem5
50 {
51 
63 {
64  protected:
67 
68  public:
69  bool delay;
70  bool isSplit;
74  uint8_t *data;
75  uint64_t *res;
77 
82  WholeTranslationState(const RequestPtr &_req, uint8_t *_data,
83  uint64_t *_res, BaseMMU::Mode _mode)
84  : outstanding(1), delay(false), isSplit(false), mainReq(_req),
85  sreqLow(NULL), sreqHigh(NULL), data(_data), res(_res), mode(_mode)
86  {
87  faults[0] = faults[1] = NoFault;
88  assert(mode == BaseMMU::Read || mode == BaseMMU::Write);
89  }
90 
96  WholeTranslationState(const RequestPtr &_req, const RequestPtr &_sreqLow,
97  const RequestPtr &_sreqHigh, uint8_t *_data,
98  uint64_t *_res, BaseMMU::Mode _mode)
99  : outstanding(2), delay(false), isSplit(true), mainReq(_req),
100  sreqLow(_sreqLow), sreqHigh(_sreqHigh), data(_data), res(_res),
101  mode(_mode)
102  {
103  faults[0] = faults[1] = NoFault;
104  assert(mode == BaseMMU::Read || mode == BaseMMU::Write);
105  }
106 
114  bool
115  finish(const Fault &fault, int index)
116  {
117  assert(outstanding);
118  faults[index] = fault;
119  outstanding--;
120  if (isSplit && outstanding == 0) {
121 
122  // For ease later, we copy some state to the main request.
123  if (faults[0] == NoFault) {
124  mainReq->setPaddr(sreqLow->getPaddr());
125  }
126  mainReq->setFlags(sreqLow->getFlags());
127  mainReq->setFlags(sreqHigh->getFlags());
128  }
129  return outstanding == 0;
130  }
131 
136  Fault
137  getFault() const
138  {
139  if (!isSplit)
140  return faults[0];
141  else if (faults[0] != NoFault)
142  return faults[0];
143  else if (faults[1] != NoFault)
144  return faults[1];
145  else
146  return NoFault;
147  }
148 
150  void
152  {
153  faults[0] = faults[1] = NoFault;
154  }
155 
161  bool
163  {
164  return mainReq->isStrictlyOrdered();
165  }
166 
172  bool
173  isPrefetch() const
174  {
175  return mainReq->isPrefetch();
176  }
177 
179  Addr
180  getPaddr() const
181  {
182  return mainReq->getPaddr();
183  }
184 
190  unsigned
192  {
193  return mainReq->getFlags();
194  }
195 
197  void
199  {
200  mainReq.reset();
201  if (isSplit) {
202  sreqLow.reset();
203  sreqHigh.reset();
204  }
205  }
206 };
207 
208 
218 template <class ExecContextPtr>
220 {
221  protected:
222  ExecContextPtr xc;
224  int index;
225 
226  public:
227  DataTranslation(ExecContextPtr _xc, WholeTranslationState* _state)
228  : xc(_xc), state(_state), index(0)
229  {
230  }
231 
232  DataTranslation(ExecContextPtr _xc, WholeTranslationState* _state,
233  int _index)
234  : xc(_xc), state(_state), index(_index)
235  {
236  }
237 
242  void
244  {
245  state->delay = true;
246  }
247 
252  void
253  finish(const Fault &fault, const RequestPtr &req, ThreadContext *tc,
255  {
256  assert(state);
257  assert(mode == state->mode);
258  if (state->finish(fault, index)) {
259  if (state->getFault() == NoFault) {
260  // Don't access the request if faulted (due to squash)
261  req->setTranslateLatency();
262  }
263  xc->finishTranslation(state);
264  }
265  delete this;
266  }
267 
268  bool
269  squashed() const
270  {
271  return xc->isSquashed();
272  }
273 };
274 
275 } // namespace gem5
276 
277 #endif // __CPU_TRANSLATION_HH__
This class represents part of a data address translation.
Definition: translation.hh:220
bool squashed() const
This function is used by the page table walker to determine if it should translate the a pending requ...
Definition: translation.hh:269
WholeTranslationState * state
Definition: translation.hh:223
DataTranslation(ExecContextPtr _xc, WholeTranslationState *_state)
Definition: translation.hh:227
void markDelayed()
Signal the translation state that the translation has been delayed due to a hw page table walk.
Definition: translation.hh:243
ExecContextPtr xc
Definition: translation.hh:222
DataTranslation(ExecContextPtr _xc, WholeTranslationState *_state, int _index)
Definition: translation.hh:232
void finish(const Fault &fault, const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode)
Finish this part of the translation and indicate that the whole translation is complete if the state ...
Definition: translation.hh:253
ThreadContext is the external interface to all thread state for anything outside of the CPU.
This class captures the state of an address translation.
Definition: translation.hh:63
bool isPrefetch() const
Check if this request is a prefetch.
Definition: translation.hh:173
Addr getPaddr() const
Get the physical address of this request.
Definition: translation.hh:180
void deleteReqs()
Delete all requests that make up this translation.
Definition: translation.hh:198
WholeTranslationState(const RequestPtr &_req, uint8_t *_data, uint64_t *_res, BaseMMU::Mode _mode)
Single translation state.
Definition: translation.hh:82
WholeTranslationState(const RequestPtr &_req, const RequestPtr &_sreqLow, const RequestPtr &_sreqHigh, uint8_t *_data, uint64_t *_res, BaseMMU::Mode _mode)
Split translation state.
Definition: translation.hh:96
void setNoFault()
Remove all faults from the translation.
Definition: translation.hh:151
bool isStrictlyOrdered() const
Check if this request is strictly ordered device access.
Definition: translation.hh:162
Fault getFault() const
Determine whether this translation produced a fault.
Definition: translation.hh:137
bool finish(const Fault &fault, int index)
Finish part of a translation.
Definition: translation.hh:115
unsigned getFlags()
Get the flags associated with this request.
Definition: translation.hh:191
Bitfield< 4, 0 > mode
Definition: misc_types.hh:74
Bitfield< 30, 0 > index
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
std::shared_ptr< FaultBase > Fault
Definition: types.hh:248
std::shared_ptr< Request > RequestPtr
Definition: request.hh:92
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
constexpr decltype(nullptr) NoFault
Definition: types.hh:253

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