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micro.hh
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30 
31 #ifndef __ARCH_SPARC_INSTS_MICRO_HH__
32 #define __ARCH_SPARC_INSTS_MICRO_HH__
33 
35 
36 namespace SparcISA
37 {
38 
40 {
41  protected:
42  const uint32_t numMicroops;
43 
44  // Constructor.
45  SparcMacroInst(const char *mnem, ExtMachInst _machInst,
46  OpClass __opClass, uint32_t _numMicroops) :
47  SparcStaticInst(mnem, _machInst, __opClass),
48  numMicroops(_numMicroops)
49  {
50  assert(numMicroops);
52  flags[IsMacroop] = true;
53  }
54 
56  {
57  delete [] microops;
58  }
59 
60  std::string generateDisassembly(
61  Addr pc, const SymbolTable *symtab) const override;
62 
64 
66  fetchMicroop(MicroPC upc) const override
67  {
68  assert(upc < numMicroops);
69  return microops[upc];
70  }
71 
72  Fault
73  execute(ExecContext *, Trace::InstRecord *) const override
74  {
75  panic("Tried to execute a macroop directly!\n");
76  }
77 
78  Fault
80  {
81  panic("Tried to execute a macroop directly!\n");
82  }
83 
84  Fault
86  {
87  panic("Tried to execute a macroop directly!\n");
88  }
89 };
90 
92 {
93  protected:
94  // Constructor.
95  SparcMicroInst(const char *mnem, ExtMachInst _machInst,
96  OpClass __opClass) :
97  SparcStaticInst(mnem, _machInst, __opClass)
98  {
99  flags[IsMicroop] = true;
100  }
101 
102  void
103  advancePC(SparcISA::PCState &pcState) const override
104  {
105  if (flags[IsLastMicroop])
106  pcState.uEnd();
107  else
108  pcState.uAdvance();
109  }
110 };
111 
113 {
114  protected:
115  // Constructor.
116  SparcDelayedMicroInst(const char *mnem, ExtMachInst _machInst,
117  OpClass __opClass) :
118  SparcMicroInst(mnem, _machInst, __opClass)
119  {
120  flags[IsDelayedCommit] = true;
121  }
122 };
123 
124 }
125 
126 #endif // __ARCH_SPARC_INSTS_MICRO_HH__
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:167
SparcMicroInst(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
Definition: micro.hh:95
Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const override
Definition: micro.hh:85
SparcDelayedMicroInst(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
Definition: micro.hh:116
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: micro.cc:37
void advancePC(SparcISA::PCState &pcState) const override
Definition: micro.hh:103
std::bitset< Num_Flags > flags
Flag values for this instruction.
Definition: static_inst.hh:97
Fault initiateAcc(ExecContext *, Trace::InstRecord *) const override
Definition: micro.hh:79
The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate th...
Definition: exec_context.hh:73
Bitfield< 4 > pc
SparcMacroInst(const char *mnem, ExtMachInst _machInst, OpClass __opClass, uint32_t _numMicroops)
Definition: micro.hh:45
uint16_t MicroPC
Definition: types.hh:144
Base class for all SPARC static instructions.
Definition: static_inst.hh:88
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:255
Definition: asi.cc:34
StaticInstPtr fetchMicroop(MicroPC upc) const override
Return the microop that goes with a particular micropc.
Definition: micro.hh:66
StaticInstPtr * microops
Definition: micro.hh:63
TheISA::ExtMachInst ExtMachInst
Binary extended machine instruction type.
Definition: static_inst.hh:87
Fault execute(ExecContext *, Trace::InstRecord *) const override
Definition: micro.hh:73
std::shared_ptr< FaultBase > Fault
Definition: types.hh:240
const uint32_t numMicroops
Definition: micro.hh:42

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