gem5 v24.0.0.0
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Profiler.cc
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1/*
2 * Copyright (c) 1999-2013 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 This file has been modified by Kevin Moore and Dan Nussbaum of the
31 Scalable Systems Research Group at Sun Microsystems Laboratories
32 (http://research.sun.com/scalable/) to support the Adaptive
33 Transactional Memory Test Platform (ATMTP).
34
35 Please send email to atmtp-interest@sun.com with feedback, questions, or
36 to request future announcements about ATMTP.
37
38 ----------------------------------------------------------------------
39
40 File modification date: 2008-02-23
41
42 ----------------------------------------------------------------------
43*/
44
46
47#include <sys/types.h>
48#include <unistd.h>
49
50#include <algorithm>
51#include <fstream>
52
53#include "base/stl_helpers.hh"
54#include "base/str.hh"
55#include "config/build_gpu.hh"
58#include "mem/ruby/protocol/MachineType.hh"
59#include "mem/ruby/protocol/RubyRequest.hh"
60
74#if BUILD_GPU
76
77#endif
78
80
81namespace gem5
82{
83
84namespace ruby
85{
86
87using stl_helpers::operator<<;
88
89Profiler::Profiler(const RubySystemParams &p, RubySystem *rs)
90 : m_ruby_system(rs), m_hot_lines(p.hot_lines),
91 m_all_instructions(p.all_instructions),
92 m_num_vnets(p.number_of_virtual_networks),
93 rubyProfilerStats(rs, this)
94{
95 m_address_profiler_ptr = new AddressProfiler(p.num_of_sequencers, this);
98
100 m_inst_profiler_ptr = new AddressProfiler(p.num_of_sequencers, this);
103 }
104}
105
109
112 : statistics::Group(parent),
113 perRequestTypeStats(parent),
114 perMachineTypeStats(parent),
115 perRequestTypeMachineTypeStats(parent),
116 ADD_STAT(delayHistogram, "delay histogram for all message"),
117 ADD_STAT(m_outstandReqHistSeqr, ""),
118 ADD_STAT(m_outstandReqHistCoalsr, ""),
119 ADD_STAT(m_latencyHistSeqr, ""),
120 ADD_STAT(m_latencyHistCoalsr, ""),
121 ADD_STAT(m_hitLatencyHistSeqr, ""),
122 ADD_STAT(m_missLatencyHistSeqr, ""),
123 ADD_STAT(m_missLatencyHistCoalsr, "")
124{
126 .init(10)
128
129 for (int i = 0; i < profiler->m_num_vnets; i++) {
130 delayVCHistogram.push_back(new statistics::Histogram(this));
132 ->init(10)
133 .name(csprintf("delayVCHist.vnet_%i", i))
134 .desc(csprintf("delay histogram for vnet_%i", i))
136 }
137
139 .init(10)
141
143 .init(10)
145
147 .init(10)
149
151 .init(10)
153
155 .init(10)
157
159 .init(10)
161
163 .init(10)
165}
166
169 : statistics::Group(parent, "RequestType")
170{
171 for (int i = 0; i < RubyRequestType_NUM; i++) {
172 m_typeLatencyHistSeqr.push_back(new statistics::Histogram(this));
174 ->init(10)
175 .name(csprintf("%s.latency_hist_seqr", RubyRequestType(i)))
176 .desc("")
178
181 ->init(10)
182 .name(csprintf("%s.latency_hist_coalsr", RubyRequestType(i)))
183 .desc("")
185
188 ->init(10)
189 .name(csprintf("%s.hit_latency_hist_seqr", RubyRequestType(i)))
190 .desc("")
192
195 ->init(10)
196 .name(csprintf("%s.miss_latency_hist_seqr", RubyRequestType(i)))
197 .desc("")
199
202 ->init(10)
203 .name(csprintf("%s.miss_latency_hist_coalsr", RubyRequestType(i)))
204 .desc("")
206 }
207}
208
211 : statistics::Group(parent, "MachineType")
212{
213 for (int i = 0; i < MachineType_NUM; i++) {
216 ->init(10)
217 .name(csprintf("%s.hit_mach_latency_hist_seqr", MachineType(i)))
218 .desc("")
220
223 ->init(10)
224 .name(csprintf("%s.miss_mach_latency_hist_seqr", MachineType(i)))
225 .desc("")
227
230 ->init(10)
231 .name(csprintf("%s.miss_mach_latency_hist_coalsr",
232 MachineType(i)))
233 .desc("")
235
237 new statistics::Histogram(this));
239 ->init(10)
240 .name(csprintf(
241 "%s.miss_latency_hist_seqr.issue_to_initial_request",
242 MachineType(i)))
243 .desc("")
245
247 new statistics::Histogram(this));
249 ->init(10)
250 .name(csprintf(
251 "%s.miss_latency_hist_coalsr.issue_to_initial_request",
252 MachineType(i)))
253 .desc("")
255
257 new statistics::Histogram(this));
259 ->init(10)
260 .name(csprintf("%s.miss_latency_hist_seqr.initial_to_forward",
261 MachineType(i)))
262 .desc("")
264
266 .push_back(new statistics::Histogram(this));
268 ->init(10)
269 .name(csprintf("%s.miss_latency_hist_coalsr.initial_to_forward",
270 MachineType(i)))
271 .desc("")
273
275 .push_back(new statistics::Histogram(this));
276
278 ->init(10)
279 .name(csprintf(
280 "%s.miss_latency_hist_seqr.forward_to_first_response",
281 MachineType(i)))
282 .desc("")
284
286 .push_back(new statistics::Histogram(this));
288 ->init(10)
289 .name(csprintf(
290 "%s.miss_latency_hist_coalsr.forward_to_first_response",
291 MachineType(i)))
292 .desc("")
294
296 .push_back(new statistics::Histogram(this));
298 ->init(10)
299 .name(csprintf(
300 "%s.miss_latency_hist_seqr.first_response_to_completion",
301 MachineType(i)))
302 .desc("")
304
306 .push_back(new statistics::Histogram(this));
308 ->init(10)
309 .name(csprintf(
310 "%s.miss_latency_hist_coalsr.first_response_to_completion",
311 MachineType(i)))
312 .desc("")
314
315 m_IncompleteTimesSeqr.push_back(new statistics::Scalar(this));
317 ->name(csprintf("%s.incomplete_times_seqr", MachineType(i)))
318 .desc("")
319 .flags(statistics::nozero);
320 }
321}
322
326 : statistics::Group(parent, "RequestTypeMachineType")
327{
328 for (int i = 0; i < RubyRequestType_NUM; i++) {
335
336 for (int j = 0; j < MachineType_NUM; j++) {
338 .push_back(new statistics::Histogram(this));
340 ->init(10)
341 .name(csprintf("%s.%s.hit_type_mach_latency_hist_seqr",
342 RubyRequestType(i), MachineType(j)))
343 .desc("")
346
348 .push_back(new statistics::Histogram(this));
350 ->init(10)
351 .name(csprintf("%s.%s.miss_type_mach_latency_hist_seqr",
352 RubyRequestType(i), MachineType(j)))
353 .desc("")
356
358 .push_back(new statistics::Histogram(this));
360 ->init(10)
361 .name(csprintf("%s.%s.miss_type_mach_latency_hist_coalsr",
362 RubyRequestType(i), MachineType(j)))
363 .desc("")
366 }
367 }
368}
369
370void
372{
373 if (!m_all_instructions) {
375 }
376
377 if (m_all_instructions) {
379 }
380
381 for (uint32_t i = 0; i < MachineType_NUM; i++) {
382 for (std::map<uint32_t, AbstractController*>::iterator it =
384 it != m_ruby_system->m_abstract_controls[i].end(); ++it) {
385
386 AbstractController *ctr = (*it).second;
388
389 for (uint32_t i = 0; i < m_num_vnets; i++) {
391 delayVCHistogram[i]->add(ctr->getDelayVCHist(i));
392 }
393 }
394 }
395
396 for (uint32_t i = 0; i < MachineType_NUM; i++) {
397 for (std::map<uint32_t, AbstractController*>::iterator it =
399 it != m_ruby_system->m_abstract_controls[i].end(); ++it) {
400
401 AbstractController *ctr = (*it).second;
402 Sequencer *seq = ctr->getCPUSequencer();
403 if (seq != NULL) {
406 }
407#if BUILD_GPU
408 GPUCoalescer *coal = ctr->getGPUCoalescer();
409 if (coal != NULL) {
412 }
413#endif
414 }
415 }
416
417 for (uint32_t i = 0; i < MachineType_NUM; i++) {
418 for (std::map<uint32_t, AbstractController*>::iterator it =
420 it != m_ruby_system->m_abstract_controls[i].end(); ++it) {
421
422 AbstractController *ctr = (*it).second;
423 Sequencer *seq = ctr->getCPUSequencer();
424 if (seq != NULL) {
425 // add all the latencies
432
433 // add the per request type latencies
434 for (uint32_t j = 0; j < RubyRequestType_NUM; ++j) {
438 ->add(seq->getTypeLatencyHist(j));
442 ->add(seq->getHitTypeLatencyHist(j));
446 ->add(seq->getMissTypeLatencyHist(j));
447 }
448
449 // add the per machine type miss latencies
450 for (uint32_t j = 0; j < MachineType_NUM; ++j) {
454 ->add(seq->getHitMachLatencyHist(j));
458 ->add(seq->getMissMachLatencyHist(j));
459
463 ->add(seq->getIssueToInitialDelayHist(MachineType(j)));
464
468 ->add(seq
469 ->getInitialToForwardDelayHist(MachineType(j)));
473 ->add(seq
474 ->getForwardRequestToFirstResponseHist(
475 MachineType(j)));
476
480 ->add(seq
481 ->getFirstResponseToCompletionDelayHist(
482 MachineType(j)));
483
487 seq->getIncompleteTimes(MachineType(j));
488 }
489
490 // add the per (request, machine) type miss latencies
491 for (uint32_t j = 0; j < RubyRequestType_NUM; j++) {
492 for (uint32_t k = 0; k < MachineType_NUM; k++) {
501 }
502 }
503 }
504#if BUILD_GPU
505 GPUCoalescer *coal = ctr->getGPUCoalescer();
506 if (coal != NULL) {
507 // add all the latencies
512
513 // add the per request type latencies
514 for (uint32_t j = 0; j < RubyRequestType_NUM; ++j) {
518 ->add(coal->getTypeLatencyHist(j));
522 ->add(coal->getMissTypeLatencyHist(j));
523 }
524
525 // add the per machine type miss latencies
526 for (uint32_t j = 0; j < MachineType_NUM; ++j) {
530 ->add(coal->getMissMachLatencyHist(j));
531
535 ->add(coal->getIssueToInitialDelayHist(
536 MachineType(j)));
537
542 MachineType(j)));
547 MachineType(j)));
548
553 MachineType(j)));
554 }
555
556 // add the per (request, machine) type miss latencies
557 for (uint32_t j = 0; j < RubyRequestType_NUM; j++) {
558 for (uint32_t k = 0; k < MachineType_NUM; k++) {
562 ->add(coal->getMissTypeMachLatencyHist(j,k));
563 }
564 }
565 }
566#endif
567 }
568 }
569}
570
571void
573{
574 if (msg.getType() != RubyRequestType_IFETCH) {
575 // Note: The following line should be commented out if you
576 // want to use the special profiling that is part of the GS320
577 // protocol
578
579 // NOTE: Unless PROFILE_HOT_LINES is enabled, nothing will be
580 // profiled by the AddressProfiler
582 addTraceSample(msg.getLineAddress(), msg.getProgramCounter(),
583 msg.getType(), msg.getAccessMode(), id, false);
584 }
585}
586
587} // namespace ruby
588} // namespace gem5
statistics::Histogram & getDelayVCHist(uint32_t index)
virtual Sequencer * getCPUSequencer() const =0
virtual GPUCoalescer * getGPUCoalescer() const =0
statistics::Histogram & getDelayHist()
void setHotLines(bool hot_lines)
void setAllInstructions(bool all_instructions)
statistics::Histogram & getFirstResponseToCompletionDelayHist(const MachineType t) const
statistics::Histogram & getInitialToForwardDelayHist(const MachineType t) const
statistics::Histogram & getIssueToInitialDelayHist(uint32_t t) const
statistics::Histogram & getOutstandReqHist()
statistics::Histogram & getForwardRequestToFirstResponseHist(const MachineType t) const
statistics::Histogram & getTypeLatencyHist(uint32_t t)
statistics::Histogram & getMissLatencyHist()
statistics::Histogram & getMissTypeMachLatencyHist(uint32_t r, uint32_t t) const
statistics::Histogram & getMissMachLatencyHist(uint32_t t) const
statistics::Histogram & getMissTypeLatencyHist(uint32_t t)
statistics::Histogram & getLatencyHist()
AddressProfiler * m_inst_profiler_ptr
Definition Profiler.hh:98
ProfilerStats rubyProfilerStats
Definition Profiler.hh:199
const uint32_t m_num_vnets
Definition Profiler.hh:195
AddressProfiler * m_address_profiler_ptr
Definition Profiler.hh:97
RubySystem * m_ruby_system
Definition Profiler.hh:77
const bool m_all_instructions
Definition Profiler.hh:194
void addAddressTraceSample(const RubyRequest &msg, NodeID id)
Definition Profiler.cc:572
Profiler(const RubySystemParams &params, RubySystem *rs)
Definition Profiler.cc:89
const bool m_hot_lines
Definition Profiler.hh:193
Addr getLineAddress() const
const RubyRequestType & getType() const
const RubyAccessMode & getAccessMode() const
Addr getProgramCounter() const
std::vector< std::map< uint32_t, AbstractController * > > m_abstract_controls
statistics::Histogram & getLatencyHist()
Definition Sequencer.hh:169
statistics::Histogram & getMissTypeLatencyHist(uint32_t t)
Definition Sequencer.hh:185
statistics::Histogram & getMissMachLatencyHist(uint32_t t) const
Definition Sequencer.hh:188
statistics::Histogram & getHitTypeMachLatencyHist(uint32_t r, uint32_t t)
Definition Sequencer.hh:180
statistics::Histogram & getTypeLatencyHist(uint32_t t)
Definition Sequencer.hh:170
statistics::Counter getIncompleteTimes(const MachineType t) const
Definition Sequencer.hh:210
statistics::Histogram & getHitMachLatencyHist(uint32_t t)
Definition Sequencer.hh:177
statistics::Histogram & getIssueToInitialDelayHist(uint32_t t) const
Definition Sequencer.hh:195
statistics::Histogram & getMissTypeMachLatencyHist(uint32_t r, uint32_t t) const
Definition Sequencer.hh:192
statistics::Histogram & getOutstandReqHist()
Definition Sequencer.hh:167
statistics::Histogram & getHitLatencyHist()
Definition Sequencer.hh:173
statistics::Histogram & getHitTypeLatencyHist(uint32_t t)
Definition Sequencer.hh:174
statistics::Histogram & getMissLatencyHist()
Definition Sequencer.hh:183
Derived & desc(const std::string &_desc)
Set the description and marks this stat to print at the end of simulation.
Derived & name(const std::string &name)
Set the name and marks this stat to print at the end of simulation.
Derived & flags(Flags _flags)
Set the flags and marks this stat to print at the end of simulation.
void add(DistBase &d)
Add the argument distribution to the this distribution.
Statistics container.
Definition group.hh:93
A simple histogram stat.
Histogram & init(size_type size)
Set the parameters of this histogram.
This is a simple scalar statistic, like a counter.
STL vector class.
Definition stl.hh:37
#define ADD_STAT(n,...)
Convenience macro to add a stat to a statistics group.
Definition group.hh:75
Bitfield< 7 > i
Definition misc_types.hh:67
Bitfield< 9, 8 > rs
Bitfield< 0 > p
Bitfield< 23 > k
unsigned int NodeID
const FlagsType pdf
Print the percent of the total that this entry represents.
Definition info.hh:61
const FlagsType oneline
Print all values on a single line.
Definition info.hh:71
const FlagsType nozero
Don't print if this is zero.
Definition info.hh:67
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
std::string csprintf(const char *format, const Args &...args)
Definition cprintf.hh:161
std::vector< statistics::Histogram * > m_missMachLatencyHistCoalsr
Definition Profiler.hh:133
std::vector< statistics::Histogram * > m_FirstResponseToCompletionDelayHistSeqr
Definition Profiler.hh:142
std::vector< statistics::Histogram * > m_IssueToInitialDelayHistSeqr
Histograms for recording the breakdown of miss latency.
Definition Profiler.hh:136
std::vector< statistics::Histogram * > m_ForwardToFirstResponseDelayHistCoalsr
Definition Profiler.hh:149
std::vector< statistics::Scalar * > m_IncompleteTimesSeqr
Definition Profiler.hh:143
std::vector< statistics::Histogram * > m_FirstResponseToCompletionDelayHistCoalsr
Definition Profiler.hh:151
std::vector< statistics::Histogram * > m_InitialToForwardDelayHistSeqr
Definition Profiler.hh:138
std::vector< statistics::Histogram * > m_ForwardToFirstResponseDelayHistSeqr
Definition Profiler.hh:140
std::vector< statistics::Histogram * > m_InitialToForwardDelayHistCoalsr
Definition Profiler.hh:147
std::vector< statistics::Histogram * > m_IssueToInitialDelayHistCoalsr
Definition Profiler.hh:145
std::vector< statistics::Histogram * > m_hitMachLatencyHistSeqr
Histograms for profiling the latencies for requests that did not required external messages.
Definition Profiler.hh:128
std::vector< statistics::Histogram * > m_missMachLatencyHistSeqr
Histograms for profiling the latencies for requests that required external messages.
Definition Profiler.hh:132
std::vector< std::vector< statistics::Histogram * > > m_missTypeMachLatencyHistSeqr
Histograms for profiling the latencies for requests that required external messages.
Definition Profiler.hh:166
std::vector< std::vector< statistics::Histogram * > > m_missTypeMachLatencyHistCoalsr
Definition Profiler.hh:168
std::vector< std::vector< statistics::Histogram * > > m_hitTypeMachLatencyHistSeqr
Histograms for profiling the latencies for requests that did not required external messages.
Definition Profiler.hh:161
std::vector< statistics::Histogram * > m_missTypeLatencyHistSeqr
Definition Profiler.hh:118
std::vector< statistics::Histogram * > m_hitTypeLatencyHistSeqr
Definition Profiler.hh:114
std::vector< statistics::Histogram * > m_typeLatencyHistSeqr
Definition Profiler.hh:109
std::vector< statistics::Histogram * > m_typeLatencyHistCoalsr
Definition Profiler.hh:110
std::vector< statistics::Histogram * > m_missTypeLatencyHistCoalsr
Definition Profiler.hh:119
gem5::ruby::Profiler::ProfilerStats::PerRequestTypeStats perRequestTypeStats
gem5::ruby::Profiler::ProfilerStats::PerRequestTypeMachineTypeStats perRequestTypeMachineTypeStats
statistics::Histogram m_latencyHistSeqr
Histogram for holding latency profile of all requests.
Definition Profiler.hh:179
statistics::Histogram m_missLatencyHistCoalsr
Definition Profiler.hh:189
statistics::Histogram m_missLatencyHistSeqr
Histogram for holding latency profile of all requests that miss in the controller connected to this s...
Definition Profiler.hh:188
statistics::Histogram m_outstandReqHistCoalsr
Definition Profiler.hh:176
statistics::Histogram m_latencyHistCoalsr
Definition Profiler.hh:180
std::vector< statistics::Histogram * > delayVCHistogram
Definition Profiler.hh:172
gem5::ruby::Profiler::ProfilerStats::PerMachineTypeStats perMachineTypeStats
statistics::Histogram m_outstandReqHistSeqr
Histogram for number of outstanding requests per cycle.
Definition Profiler.hh:175
ProfilerStats(statistics::Group *parent, Profiler *profiler)
Definition Profiler.cc:111
statistics::Histogram m_hitLatencyHistSeqr
Histogram for holding latency profile of all requests that hit in the controller connected to this se...
Definition Profiler.hh:184
statistics::Histogram delayHistogram
Definition Profiler.hh:171

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