Base class for instructions whose disassembly is not purely a function of the machine instruction (i.e., it depends on the PC). More...
#include <branch.hh>
Inheritance diagram for gem5::PowerISA::PCDependentDisassembly:
Protected Member Functions | |
| PCDependentDisassembly (const char *mnem, ExtMachInst _machInst, OpClass __opClass) | |
| Constructor. More... | |
| const std::string & | disassemble (Addr pc, const loader::SymbolTable *symtab) const |
| Return string representation of disassembled instruction. More... | |
 Protected Member Functions inherited from gem5::PowerISA::PowerStaticInst | |
| PowerStaticInst (const char *mnem, ExtMachInst _machInst, OpClass __opClass) | |
| uint32_t | insertCRField (uint32_t cr, uint32_t bf, uint32_t value) const |
| void | printReg (std::ostream &os, RegId reg) const |
| Print a register name for disassembly given the unique dependence tag number (FP or int). More... | |
| std::string | generateDisassembly (Addr pc, const loader::SymbolTable *symtab) const override |
| Internal function to generate disassembly string. More... | |
| void | advancePC (PCStateBase &pc_state) const override |
| void | advancePC (ThreadContext *tc) const override |
| std::unique_ptr< PCStateBase > | buildRetPC (const PCStateBase &cur_pc, const PCStateBase &call_pc) const override |
| size_t | asBytes (void *buf, size_t max_size) override |
| Instruction classes can override this function to return a a representation of themselves as a blob of bytes, generally assumed to be that instructions ExtMachInst. More... | |
| Protected Member Functions inherited from gem5::StaticInst | |
| void | setRegIdxArrays (RegIdArrayPtr src, RegIdArrayPtr dest) |
| Set the pointers which point to the arrays of source and destination register indices. More... | |
| StaticInst (const char *_mnemonic, OpClass op_class) | |
| Constructor. More... | |
| template<typename T > | |
| size_t | simpleAsBytes (void *buf, size_t max_size, const T &t) |
Protected Attributes | |
| Addr | cachedPC |
| Cached program counter from last disassembly. More... | |
| const loader::SymbolTable * | cachedSymtab |
| Cached symbol table pointer from last disassembly. More... | |
| Protected Attributes inherited from gem5::PowerISA::PowerStaticInst | |
| ExtMachInst | machInst |
| Protected Attributes inherited from gem5::StaticInst | |
| std::bitset< Num_Flags > | flags |
| Flag values for this instruction. More... | |
| OpClass | _opClass |
| See opClass(). More... | |
| uint8_t | _numSrcRegs = 0 |
| See numSrcRegs(). More... | |
| uint8_t | _numDestRegs = 0 |
| See numDestRegs(). More... | |
| std::array< uint8_t, MiscRegClass+1 > | _numTypedDestRegs = {} |
| const char * | mnemonic |
| Base mnemonic (e.g., "add"). More... | |
| std::unique_ptr< std::string > | cachedDisassembly |
| String representation of disassembly (lazily evaluated via disassemble()). More... | |
Additional Inherited Members | |
| Public Types inherited from gem5::StaticInst | |
| using | RegIdArrayPtr = RegId(StaticInst::*)[] |
| Public Member Functions inherited from gem5::StaticInst | |
| uint8_t | numSrcRegs () const |
| Number of source registers. More... | |
| uint8_t | numDestRegs () const |
| Number of destination registers. More... | |
| uint8_t | numDestRegs (RegClassType type) const |
| Number of destination registers of a particular type. More... | |
| bool | isNop () const |
| bool | isMemRef () const |
| bool | isLoad () const |
| bool | isStore () const |
| bool | isAtomic () const |
| bool | isStoreConditional () const |
| bool | isInstPrefetch () const |
| bool | isDataPrefetch () const |
| bool | isPrefetch () const |
| bool | isInteger () const |
| bool | isFloating () const |
| bool | isVector () const |
| bool | isControl () const |
| bool | isCall () const |
| bool | isReturn () const |
| bool | isDirectCtrl () const |
| bool | isIndirectCtrl () const |
| bool | isCondCtrl () const |
| bool | isUncondCtrl () const |
| bool | isSerializing () const |
| bool | isSerializeBefore () const |
| bool | isSerializeAfter () const |
| bool | isSquashAfter () const |
| bool | isFullMemBarrier () const |
| bool | isReadBarrier () const |
| bool | isWriteBarrier () const |
| bool | isNonSpeculative () const |
| bool | isQuiesce () const |
| bool | isUnverifiable () const |
| bool | isSyscall () const |
| bool | isMacroop () const |
| bool | isMicroop () const |
| bool | isDelayedCommit () const |
| bool | isLastMicroop () const |
| bool | isFirstMicroop () const |
| bool | isHtmStart () const |
| bool | isHtmStop () const |
| bool | isHtmCancel () const |
| bool | isHtmCmd () const |
| void | setFirstMicroop () |
| void | setLastMicroop () |
| void | setDelayedCommit () |
| void | setFlag (Flags f) |
| OpClass | opClass () const |
| Operation class. Used to select appropriate function unit in issue. More... | |
| const RegId & | destRegIdx (int i) const |
| Return logical index (architectural reg num) of i'th destination reg. More... | |
| void | setDestRegIdx (int i, const RegId &val) |
| const RegId & | srcRegIdx (int i) const |
| Return logical index (architectural reg num) of i'th source reg. More... | |
| void | setSrcRegIdx (int i, const RegId &val) |
| virtual uint64_t | getEMI () const |
| virtual | ~StaticInst () |
| virtual Fault | execute (ExecContext *xc, trace::InstRecord *traceData) const =0 |
| virtual Fault | initiateAcc (ExecContext *xc, trace::InstRecord *traceData) const |
| virtual Fault | completeAcc (Packet *pkt, ExecContext *xc, trace::InstRecord *trace_data) const |
| virtual StaticInstPtr | fetchMicroop (MicroPC upc) const |
| Return the microop that goes with a particular micropc. More... | |
| virtual std::unique_ptr< PCStateBase > | branchTarget (const PCStateBase &pc) const |
| Return the target address for a PC-relative branch. More... | |
| virtual std::unique_ptr< PCStateBase > | branchTarget (ThreadContext *tc) const |
| Return the target address for an indirect branch (jump). More... | |
| void | printFlags (std::ostream &outs, const std::string &separator) const |
| Print a separator separated list of this instruction's set flag names on the given stream. More... | |
| std::string | getName () |
| Return name of machine instruction. More... | |
| Public Member Functions inherited from gem5::RefCounted | |
| RefCounted () | |
| We initialize the reference count to zero and the first object to take ownership of it must increment it to one. More... | |
| virtual | ~RefCounted () |
| We make the destructor virtual because we're likely to have virtual functions on reference counted objects. More... | |
| void | incref () const |
| Increment the reference count. More... | |
| void | decref () const |
| Decrement the reference count and destroy the object if all references are gone. More... | |
| Static Public Attributes inherited from gem5::StaticInst | |
| static StaticInstPtr | nullStaticInstPtr |
| Pointer to a statically allocated "null" instruction object. More... | |
Detailed Description
Base class for instructions whose disassembly is not purely a function of the machine instruction (i.e., it depends on the PC).
This class overrides the disassemble() method to check the PC and symbol table values before re-using a cached disassembly string. This is necessary for branches and jumps, where the disassembly string includes the target address (which may depend on the PC and/or symbol table).
Constructor & Destructor Documentation
◆ PCDependentDisassembly()
|
inlineprotected |
Member Function Documentation
◆ disassemble()
|
protectedvirtual |
Return string representation of disassembled instruction.
The default version of this function will call the internal virtual generateDisassembly() function to get the string, then cache it in cachedDisassembly. If the disassembly should not be cached, this function should be overridden directly.
Reimplemented from gem5::StaticInst.
Definition at line 43 of file branch.cc.
References gem5::StaticInst::cachedDisassembly, cachedPC, cachedSymtab, gem5::PowerISA::PowerStaticInst::generateDisassembly(), and gem5::MipsISA::pc.
Member Data Documentation
◆ cachedPC
|
mutableprotected |
Cached program counter from last disassembly.
Definition at line 54 of file branch.hh.
Referenced by disassemble().
◆ cachedSymtab
|
mutableprotected |
Cached symbol table pointer from last disassembly.
Definition at line 56 of file branch.hh.
Referenced by disassemble().
The documentation for this class was generated from the following files: