gem5  v22.0.0.1
dram_rot_gen.hh
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37 
44 #ifndef __CPU_TRAFFIC_GEN_DRAM_ROT_GEN_HH__
45 #define __CPU_TRAFFIC_GEN_DRAM_ROT_GEN_HH__
46 
47 #include "base/bitfield.hh"
48 #include "base/intmath.hh"
49 #include "dram_gen.hh"
50 #include "enums/AddrMap.hh"
51 #include "mem/packet.hh"
52 
53 namespace gem5
54 {
55 
56 class DramRotGen : public DramGen
57 {
58 
59  public:
60 
88  DramRotGen(SimObject &obj, RequestorID requestor_id, Tick _duration,
89  Addr start_addr, Addr end_addr,
90  Addr _blocksize, Addr cacheline_size,
91  Tick min_period, Tick max_period,
92  uint8_t read_percent, Addr data_limit,
93  unsigned int num_seq_pkts, unsigned int page_size,
94  unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util,
95  enums::AddrMap addr_mapping,
96  unsigned int nbr_of_ranks,
97  unsigned int max_seq_count_per_rank)
98  : DramGen(obj, requestor_id, _duration, start_addr, end_addr,
99  _blocksize, cacheline_size, min_period, max_period,
100  read_percent, data_limit,
101  num_seq_pkts, page_size, nbr_of_banks_DRAM,
102  nbr_of_banks_util, addr_mapping,
103  nbr_of_ranks),
104  maxSeqCountPerRank(max_seq_count_per_rank),
105  nextSeqCount(0)
106  {
107  // Rotating traffic generation can only support a read
108  // percentage of 0, 50, or 100
109  if (readPercent != 50 && readPercent != 100 && readPercent != 0) {
110  fatal("%s: Unsupported read percentage for DramRotGen: %d",
111  _name, readPercent);
112  }
113  }
114 
116 
117  private:
121  const unsigned int maxSeqCountPerRank;
122 
126  unsigned int nextSeqCount;
127 };
128 
129 } // namespace gem5
130 
131 #endif
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:190
dram_gen.hh
gem5::BaseGen::_name
const std::string _name
Name to use for status and debug printing.
Definition: base_gen.hh:70
gem5::DramRotGen::maxSeqCountPerRank
const unsigned int maxSeqCountPerRank
Number of command series issued before the rank is changed.
Definition: dram_rot_gen.hh:121
gem5::DramRotGen
Definition: dram_rot_gen.hh:56
packet.hh
bitfield.hh
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:291
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::DramRotGen::DramRotGen
DramRotGen(SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, enums::AddrMap addr_mapping, unsigned int nbr_of_ranks, unsigned int max_seq_count_per_rank)
Create a DRAM address sequence generator.
Definition: dram_rot_gen.hh:88
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::DramRotGen::getNextPacket
PacketPtr getNextPacket()
Get the next generated packet.
Definition: dram_rot_gen.cc:51
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::StochasticGen::readPercent
const uint8_t readPercent
Percent of generated transactions that should be reads.
Definition: base_gen.hh:169
gem5::RequestorID
uint16_t RequestorID
Definition: request.hh:95
intmath.hh
gem5::DramGen
DRAM specific generator is for issuing request with variable page hit length and bank utilization.
Definition: dram_gen.hh:61
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::DramRotGen::nextSeqCount
unsigned int nextSeqCount
Next packet series count used to set rank and bank, and update isRead Incremented at the start of a n...
Definition: dram_rot_gen.hh:126

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