gem5  v22.0.0.1
gic.hh
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27 
28 #ifndef __ARCH_ARM_FASTMODEL_GIC_GIC_HH__
29 #define __ARCH_ARM_FASTMODEL_GIC_GIC_HH__
30 
31 #pragma GCC diagnostic push
32 #pragma GCC diagnostic ignored "-Woverloaded-virtual"
33 #include <amba_pv.h>
34 #pragma GCC diagnostic pop
35 
36 #include <memory>
37 
40 #include "dev/arm/base_gic.hh"
41 #include "dev/intpin.hh"
42 #include "params/FastModelGIC.hh"
43 #include "params/SCFastModelGIC.hh"
44 #include "scx_evs_GIC.h"
47 
48 namespace gem5
49 {
50 
51 GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
52 namespace fastmodel
53 {
54 
55 // The fast model exports a class called scx_evs_GIC which represents
56 // the subsystem described in LISA+. This class specializes it to export gem5
57 // ports and interface with its peer gem5 GIC. The gem5 GIC inherits from the
58 // gem5 BaseGic class and implements its API, while this class actually does
59 // the work.
60 class SCGIC : public scx_evs_GIC
61 {
62  private:
63  // The unconnected CPU ports/sockets still need to be connected for TLM to
64  // be happy, so this module finds all unbound sockets, creates pair
65  // sockets for them to connect to, binds everything together, and
66  // implements the target interface with a dummy stub that will complain
67  // and crash gem5 if it ever gets called.
69  public svp_gicv3_comms::gicv3_comms_fw_if
70  {
71  protected:
72  typedef sc_core::sc_vector<
73  svp_gicv3_comms::gicv3_comms_initiator_socket<>> Initiators;
74  typedef sc_core::sc_vector<
75  svp_gicv3_comms::gicv3_comms_target_socket<>> Targets;
76 
78 
79  static int countUnbound(const Initiators &inits);
80 
81  public:
83 
84  // Stub out the terminated interface.
85  void sendTowardsCPU(uint8_t len, const uint8_t *data) override;
86  };
87 
88  std::unique_ptr<Terminator> terminator;
89  const SCFastModelGICParams &_params;
90 
91  public:
92  SCGIC(const SCFastModelGICParams &p) : SCGIC(p, p.name.c_str()) {}
93  SCGIC(const SCFastModelGICParams &params, sc_core::sc_module_name _name);
94 
96 
98 
99  void before_end_of_elaboration() override;
100 
101  void
103  {
104  scx_evs_GIC::end_of_elaboration();
105  scx_evs_GIC::start_of_simulation();
106  }
107  void start_of_simulation() override {}
108  PARAMS(SCFastModelGIC);
109 };
110 
111 // This class pairs with the one above to implement the receiving end of gem5's
112 // GIC API. It acts as an interface which passes work to the fast model GIC,
113 // and lets the fast model GIC interact with the rest of the system.
114 class GIC : public BaseGic
115 {
116  private:
118  64, svp_gicv3_comms::gicv3_comms_fw_if,
119  svp_gicv3_comms::gicv3_comms_bw_if, 1,
121 
126 
128 
129  public:
130  GIC(const FastModelGICParams &params);
131 
132  Port &getPort(const std::string &if_name,
133  PortID idx=InvalidPortID) override;
134 
135  void sendInt(uint32_t num) override;
136  void clearInt(uint32_t num) override;
137 
138  void sendPPInt(uint32_t num, uint32_t cpu) override;
139  void clearPPInt(uint32_t num, uint32_t cpu) override;
140 
141  bool supportsVersion(GicVersion version) override;
142 
143  AddrRangeList getAddrRanges() const override { return AddrRangeList(); }
144  Tick read(PacketPtr pkt) override { return 0; }
145  Tick write(PacketPtr pkt) override { return 0; }
146 };
147 
148 } // namespace fastmodel
149 } // namespace gem5
150 
151 #endif // __ARCH_ARM_FASTMODEL_GIC_GIC_HH__
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:245
sc_port_wrapper.hh
gem5::fastmodel::GIC::ambaS
AmbaTarget ambaS
Definition: gic.hh:123
gem5::fastmodel::GIC::wakeRequestPorts
std::vector< std::unique_ptr< IntSourcePin< GIC > > > wakeRequestPorts
Definition: gic.hh:125
gem5::fastmodel::SCGIC::Terminator::Targets
sc_core::sc_vector< svp_gicv3_comms::gicv3_comms_target_socket<> > Targets
Definition: gic.hh:75
sc_core::SC_ONE_OR_MORE_BOUND
@ SC_ONE_OR_MORE_BOUND
Definition: sc_port.hh:69
gem5::fastmodel::SCGIC::SCGIC
SCGIC(const SCFastModelGICParams &p)
Definition: gic.hh:92
gem5::fastmodel::SCGIC::start_of_simulation
void start_of_simulation() override
Definition: gic.hh:107
gem5::fastmodel::SCGIC::Terminator::Initiators
sc_core::sc_vector< svp_gicv3_comms::gicv3_comms_initiator_socket<> > Initiators
Definition: gic.hh:73
data
const char data[]
Definition: circlebuf.test.cc:48
gem5::fastmodel::GIC::sendInt
void sendInt(uint32_t num) override
Post an interrupt from a device that is connected to the GIC.
Definition: gic.cc:351
sc_core::sc_module
Definition: sc_module.hh:101
gem5::AddrRangeList
std::list< AddrRange > AddrRangeList
Convenience typedef for a collection of address ranges.
Definition: addr_range.hh:57
gem5::fastmodel::SCGIC::before_end_of_elaboration
void before_end_of_elaboration() override
Definition: gic.cc:303
gem5::fastmodel::SCGIC::signalInterrupt
SignalInterruptInitiatorSocket signalInterrupt
Definition: gic.hh:95
sc_module_name.hh
base_gic.hh
gem5::fastmodel::GIC::scGIC
SCGIC * scGIC
Definition: gic.hh:127
std::vector
STL vector class.
Definition: stl.hh:37
gem5::fastmodel::GIC::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: gic.cc:329
sc_core::sc_vector
Definition: sc_vector.hh:157
gem5::InvalidPortID
const PortID InvalidPortID
Definition: types.hh:246
gem5::fastmodel::GIC::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: gic.hh:144
gem5::fastmodel::GIC::sendPPInt
void sendPPInt(uint32_t num, uint32_t cpu) override
Interface call for private peripheral interrupts.
Definition: gic.cc:363
gem5::fastmodel::GIC::clearInt
void clearInt(uint32_t num) override
Clear an interrupt from a device that is connected to the GIC.
Definition: gic.cc:357
gem5::fastmodel::GIC::supportsVersion
bool supportsVersion(GicVersion version) override
Check if version supported.
Definition: gic.cc:375
gem5::BaseGic
Definition: base_gic.hh:72
gem5::fastmodel::SCGIC::PARAMS
PARAMS(SCFastModelGIC)
gem5::VegaISA::p
Bitfield< 54 > p
Definition: pagetable.hh:70
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:291
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
len
uint16_t len
Definition: helpers.cc:62
sc_core::sc_module_name
Definition: sc_module_name.hh:41
gem5::BaseGic::params
const Params & params() const
Definition: base_gic.cc:78
gem5::fastmodel::GIC::redistributors
std::vector< std::unique_ptr< TlmGicInitiator > > redistributors
Definition: gic.hh:124
gem5::fastmodel::SCGIC::Terminator::targets
Targets targets
Definition: gic.hh:77
gem5::GEM5_DEPRECATED_NAMESPACE
GEM5_DEPRECATED_NAMESPACE(GuestABI, guest_abi)
gem5::fastmodel::GIC::getAddrRanges
AddrRangeList getAddrRanges() const override
Every PIO device is obliged to provide an implementation that returns the address ranges the device r...
Definition: gic.hh:143
name
const std::string & name()
Definition: trace.cc:49
gem5::fastmodel::GIC::GIC
GIC(const FastModelGICParams &params)
Definition: gic.cc:309
amba_ports.hh
gem5::BaseGic::GicVersion
GicVersion
Definition: base_gic.hh:76
gem5::fastmodel::SCGIC::end_of_elaboration
void end_of_elaboration() override
Definition: gic.hh:102
gem5::fastmodel::GIC
Definition: gic.hh:114
gem5::fastmodel::GIC::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: gic.hh:145
gem5::fastmodel::SCGIC::Terminator::countUnbound
static int countUnbound(const Initiators &inits)
Definition: gic.cc:42
gem5::fastmodel::SCGIC
Definition: gic.hh:60
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
sc_gem5::TlmInitiatorBaseWrapper
Definition: tlm_port_wrapper.hh:40
gem5::fastmodel::SCGIC::Terminator::Terminator
Terminator(sc_core::sc_module_name _name, Initiators &inits)
Definition: gic.cc:51
gem5::fastmodel::GIC::TlmGicInitiator
sc_gem5::TlmInitiatorBaseWrapper< 64, svp_gicv3_comms::gicv3_comms_fw_if, svp_gicv3_comms::gicv3_comms_bw_if, 1, sc_core::SC_ONE_OR_MORE_BOUND > TlmGicInitiator
Definition: gic.hh:120
intpin.hh
gem5::SignalInterruptInitiatorSocket
Definition: signal_interrupt.hh:60
gem5::fastmodel::SCGIC::Terminator
Definition: gic.hh:68
signal_receiver.hh
std::list< AddrRange >
gem5::fastmodel::SCGIC::wakeRequests
std::vector< std::unique_ptr< SignalReceiver > > wakeRequests
Definition: gic.hh:97
sc_gem5::TlmTargetBaseWrapper
Definition: tlm_port_wrapper.hh:44
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::fastmodel::GIC::ambaM
AmbaInitiator ambaM
Definition: gic.hh:122
gem5::fastmodel::SCGIC::Terminator::sendTowardsCPU
void sendTowardsCPU(uint8_t len, const uint8_t *data) override
Definition: gic.cc:69
gem5::fastmodel::SCGIC::terminator
std::unique_ptr< Terminator > terminator
Definition: gic.hh:88
gem5::fastmodel::GIC::clearPPInt
void clearPPInt(uint32_t num, uint32_t cpu) override
Definition: gic.cc:369
gem5::fastmodel::SCGIC::_params
const SCFastModelGICParams & _params
Definition: gic.hh:89

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