gem5  v21.2.0.0
gic.hh
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27 
28 #ifndef __ARCH_ARM_FASTMODEL_GIC_GIC_HH__
29 #define __ARCH_ARM_FASTMODEL_GIC_GIC_HH__
30 
31 #pragma GCC diagnostic push
32 #pragma GCC diagnostic ignored "-Woverloaded-virtual"
33 #include <amba_pv.h>
34 #pragma GCC diagnostic pop
35 
36 #include <memory>
37 
39 #include "dev/arm/base_gic.hh"
40 #include "params/FastModelGIC.hh"
41 #include "params/SCFastModelGIC.hh"
42 #include "scx_evs_GIC.h"
45 
46 namespace gem5
47 {
48 
49 GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
50 namespace fastmodel
51 {
52 
53 // The fast model exports a class called scx_evs_GIC which represents
54 // the subsystem described in LISA+. This class specializes it to export gem5
55 // ports and interface with its peer gem5 GIC. The gem5 GIC inherits from the
56 // gem5 BaseGic class and implements its API, while this class actually does
57 // the work.
58 class SCGIC : public scx_evs_GIC
59 {
60  private:
61  // The unconnected CPU ports/sockets still need to be connected for TLM to
62  // be happy, so this module finds all unbound sockets, creates pair
63  // sockets for them to connect to, binds everything together, and
64  // implements the target interface with a dummy stub that will complain
65  // and crash gem5 if it ever gets called.
67  public svp_gicv3_comms::gicv3_comms_fw_if
68  {
69  protected:
70  typedef sc_core::sc_vector<
71  svp_gicv3_comms::gicv3_comms_initiator_socket<>> Initiators;
72  typedef sc_core::sc_vector<
73  svp_gicv3_comms::gicv3_comms_target_socket<>> Targets;
74 
76 
77  static int countUnbound(const Initiators &inits);
78 
79  public:
81 
82  // Stub out the terminated interface.
83  void sendTowardsCPU(uint8_t len, const uint8_t *data) override;
84  };
85 
86  std::unique_ptr<Terminator> terminator;
87  const SCFastModelGICParams &_params;
88 
89  public:
90  SCGIC(const SCFastModelGICParams &p) : SCGIC(p, p.name.c_str()) {}
91  SCGIC(const SCFastModelGICParams &params, sc_core::sc_module_name _name);
92 
94 
95  void before_end_of_elaboration() override;
96 
97  void
98  end_of_elaboration() override
99  {
100  scx_evs_GIC::end_of_elaboration();
101  scx_evs_GIC::start_of_simulation();
102  }
103  void start_of_simulation() override {}
104  PARAMS(SCFastModelGIC);
105 };
106 
107 // This class pairs with the one above to implement the receiving end of gem5's
108 // GIC API. It acts as an interface which passes work to the fast model GIC,
109 // and lets the fast model GIC interact with the rest of the system.
110 class GIC : public BaseGic
111 {
112  private:
114  64, svp_gicv3_comms::gicv3_comms_fw_if,
115  svp_gicv3_comms::gicv3_comms_bw_if, 1,
117 
121 
123 
124  public:
125  GIC(const FastModelGICParams &params);
126 
127  Port &getPort(const std::string &if_name,
128  PortID idx=InvalidPortID) override;
129 
130  void sendInt(uint32_t num) override;
131  void clearInt(uint32_t num) override;
132 
133  void sendPPInt(uint32_t num, uint32_t cpu) override;
134  void clearPPInt(uint32_t num, uint32_t cpu) override;
135 
136  bool supportsVersion(GicVersion version) override;
137 
138  AddrRangeList getAddrRanges() const override { return AddrRangeList(); }
139  Tick read(PacketPtr pkt) override { return 0; }
140  Tick write(PacketPtr pkt) override { return 0; }
141 };
142 
143 } // namespace fastmodel
144 } // namespace gem5
145 
146 #endif // __ARCH_ARM_FASTMODEL_GIC_GIC_HH__
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:252
sc_port_wrapper.hh
gem5::fastmodel::GIC::ambaS
AmbaTarget ambaS
Definition: gic.hh:119
gem5::fastmodel::SCGIC::Terminator::Targets
sc_core::sc_vector< svp_gicv3_comms::gicv3_comms_target_socket<> > Targets
Definition: gic.hh:73
sc_core::SC_ONE_OR_MORE_BOUND
@ SC_ONE_OR_MORE_BOUND
Definition: sc_port.hh:69
gem5::fastmodel::SCGIC::SCGIC
SCGIC(const SCFastModelGICParams &p)
Definition: gic.hh:90
gem5::ArmISA::len
Bitfield< 18, 16 > len
Definition: misc_types.hh:445
gem5::fastmodel::SCGIC::start_of_simulation
void start_of_simulation() override
Definition: gic.hh:103
gem5::fastmodel::SCGIC::Terminator::Initiators
sc_core::sc_vector< svp_gicv3_comms::gicv3_comms_initiator_socket<> > Initiators
Definition: gic.hh:71
data
const char data[]
Definition: circlebuf.test.cc:48
gem5::fastmodel::GIC::sendInt
void sendInt(uint32_t num) override
Post an interrupt from a device that is connected to the GIC.
Definition: gic.cc:332
sc_core::sc_module
Definition: sc_module.hh:101
gem5::AddrRangeList
std::list< AddrRange > AddrRangeList
Convenience typedef for a collection of address ranges.
Definition: addr_range.hh:57
gem5::fastmodel::SCGIC::before_end_of_elaboration
void before_end_of_elaboration() override
Definition: gic.cc:297
gem5::fastmodel::SCGIC::signalInterrupt
SignalInterruptInitiatorSocket signalInterrupt
Definition: gic.hh:93
sc_module_name.hh
base_gic.hh
gem5::fastmodel::GIC::scGIC
SCGIC * scGIC
Definition: gic.hh:122
std::vector
STL vector class.
Definition: stl.hh:37
gem5::fastmodel::GIC::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: gic.cc:312
sc_core::sc_vector
Definition: sc_vector.hh:157
gem5::InvalidPortID
const PortID InvalidPortID
Definition: types.hh:253
gem5::fastmodel::GIC::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: gic.hh:139
gem5::fastmodel::GIC::sendPPInt
void sendPPInt(uint32_t num, uint32_t cpu) override
Interface call for private peripheral interrupts.
Definition: gic.cc:344
gem5::fastmodel::GIC::clearInt
void clearInt(uint32_t num) override
Clear an interrupt from a device that is connected to the GIC.
Definition: gic.cc:338
gem5::fastmodel::GIC::supportsVersion
bool supportsVersion(GicVersion version) override
Check if version supported.
Definition: gic.cc:356
gem5::BaseGic
Definition: base_gic.hh:72
gem5::fastmodel::SCGIC::PARAMS
PARAMS(SCFastModelGIC)
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
sc_core::sc_module_name
Definition: sc_module_name.hh:41
gem5::BaseGic::params
const Params & params() const
Definition: base_gic.cc:77
gem5::fastmodel::GIC::redistributors
std::vector< std::unique_ptr< TlmGicInitiator > > redistributors
Definition: gic.hh:120
gem5::fastmodel::SCGIC::Terminator::targets
Targets targets
Definition: gic.hh:75
gem5::GEM5_DEPRECATED_NAMESPACE
GEM5_DEPRECATED_NAMESPACE(GuestABI, guest_abi)
gem5::fastmodel::GIC::getAddrRanges
AddrRangeList getAddrRanges() const override
Every PIO device is obliged to provide an implementation that returns the address ranges the device r...
Definition: gic.hh:138
name
const std::string & name()
Definition: trace.cc:49
gem5::fastmodel::GIC::GIC
GIC(const FastModelGICParams &params)
Definition: gic.cc:303
amba_ports.hh
gem5::BaseGic::GicVersion
GicVersion
Definition: base_gic.hh:76
gem5::fastmodel::SCGIC::end_of_elaboration
void end_of_elaboration() override
Definition: gic.hh:98
gem5::fastmodel::GIC
Definition: gic.hh:110
gem5::fastmodel::GIC::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: gic.hh:140
gem5::fastmodel::SCGIC::Terminator::countUnbound
static int countUnbound(const Initiators &inits)
Definition: gic.cc:42
gem5::fastmodel::SCGIC
Definition: gic.hh:58
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
sc_gem5::TlmInitiatorBaseWrapper
Definition: tlm_port_wrapper.hh:40
gem5::fastmodel::SCGIC::Terminator::Terminator
Terminator(sc_core::sc_module_name _name, Initiators &inits)
Definition: gic.cc:51
gem5::fastmodel::GIC::TlmGicInitiator
sc_gem5::TlmInitiatorBaseWrapper< 64, svp_gicv3_comms::gicv3_comms_fw_if, svp_gicv3_comms::gicv3_comms_bw_if, 1, sc_core::SC_ONE_OR_MORE_BOUND > TlmGicInitiator
Definition: gic.hh:116
gem5::SignalInterruptInitiatorSocket
Definition: signal_interrupt.hh:60
gem5::fastmodel::SCGIC::Terminator
Definition: gic.hh:66
std::list< AddrRange >
sc_gem5::TlmTargetBaseWrapper
Definition: tlm_port_wrapper.hh:44
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::fastmodel::GIC::ambaM
AmbaInitiator ambaM
Definition: gic.hh:118
gem5::fastmodel::SCGIC::Terminator::sendTowardsCPU
void sendTowardsCPU(uint8_t len, const uint8_t *data) override
Definition: gic.cc:69
gem5::fastmodel::SCGIC::terminator
std::unique_ptr< Terminator > terminator
Definition: gic.hh:86
gem5::fastmodel::GIC::clearPPInt
void clearPPInt(uint32_t num, uint32_t cpu) override
Definition: gic.cc:350
gem5::fastmodel::SCGIC::_params
const SCFastModelGICParams & _params
Definition: gic.hh:87

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