gem5 v24.0.0.0
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inst_pb_trace.cc
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1/*
2 * Copyright (c) 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#include "cpu/inst_pb_trace.hh"
39
40#include "base/callback.hh"
41#include "base/output.hh"
42#include "cpu/static_inst.hh"
43#include "cpu/thread_context.hh"
44#include "debug/ExecEnable.hh"
45#include "params/InstPBTrace.hh"
46#include "proto/inst.pb.h"
47#include "sim/core.hh"
48#include "sim/cur_tick.hh"
49
50namespace gem5
51{
52
53namespace trace {
54
56
57void
59{
60 // We're trying to build an instruction trace so we just want macro-ops and
61 // instructions that aren't macro-oped
65 }
66
67 // If this instruction accessed memory lets record it
68 if (getMemValid())
70}
71
72InstPBTrace::InstPBTrace(const InstPBTraceParams &p)
73 : InstTracer(p), buf(nullptr), bufSize(0), curMsg(nullptr)
74{
75 // Create our output file
76 createTraceFile(p.file_name);
77}
78
79void
80InstPBTrace::createTraceFile(std::string filename)
81{
82 // Since there is only one output file for all tracers check if it exists
83 if (traceStream)
84 return;
85
87
88 // Output the header
89 ProtoMessage::InstHeader header_msg;
90 header_msg.set_obj_id("gem5 generated instruction trace");
91 header_msg.set_ver(0);
92 header_msg.set_tick_freq(sim_clock::Frequency);
93 header_msg.set_has_mem(true);
94 traceStream->write(header_msg);
95
96 // get a callback when we exit so we can close the file
97 registerExitCallback([this]() { closeStreams(); });
98}
99
100void
102{
103 if (curMsg) {
105 delete curMsg;
106 curMsg = NULL;
107 }
108
109 if (!traceStream)
110 return;
111
112 delete traceStream;
113 traceStream = NULL;
114}
115
120
123 const PCStateBase &pc, const StaticInstPtr mi)
124{
125 // Only record the trace if Exec debugging is enabled
126 if (!debug::ExecEnable)
127 return NULL;
128
129 return new InstPBTraceRecord(*this, when, tc, si, pc, mi);
130
131}
132
133void
135 const PCStateBase &pc)
136{
137 if (curMsg) {
138 //TODO if we are running multi-threaded I assume we'd need a lock here
140 delete curMsg;
141 curMsg = NULL;
142 }
143
144 size_t instSize = si->asBytes(buf.get(), bufSize);
145 if (instSize > bufSize) {
146 bufSize = instSize;
147 buf.reset(new uint8_t[bufSize]);
148 instSize = si->asBytes(buf.get(), bufSize);
149 }
150
151 // Create a new instruction message and fill out the fields
152 curMsg = new ProtoMessage::Inst;
153 curMsg->set_pc(pc.instAddr());
154 if (instSize == sizeof(uint32_t)) {
155 curMsg->set_inst(letoh(*reinterpret_cast<uint32_t *>(buf.get())));
156 } else if (instSize) {
157 curMsg->set_inst_bytes(
158 std::string(reinterpret_cast<const char *>(buf.get()), bufSize));
159 }
160 curMsg->set_cpuid(tc->cpuId());
161 curMsg->set_tick(curTick());
162 curMsg->set_type(static_cast<ProtoMessage::Inst_InstType>(si->opClass()));
163}
164
165void
167{
168 panic_if(!curMsg, "Memory access w/o msg?!");
169
170 // We do a poor job identifying macro-ops that are load/stores
171 curMsg->set_type(static_cast<ProtoMessage::Inst_InstType>(si->opClass()));
172
173 ProtoMessage::Inst::MemAccess *mem_msg = curMsg->add_mem_access();
174 mem_msg->set_addr(a);
175 mem_msg->set_size(s);
176 mem_msg->set_mem_flags(f);
177
178}
179
180} // namespace trace
181} // namespace gem5
A ProtoOutputStream wraps a coded stream, potentially with compression, based on looking at the file ...
Definition protoio.hh:91
void write(const google::protobuf::Message &msg)
Write a message to the stream, preprending it with the message size.
Definition protoio.cc:84
std::string resolve(const std::string &name) const
Returns relative file names prepended with name of this directory.
Definition output.cc:204
bool isFirstMicroop() const
bool isMicroop() const
ThreadContext is the external interface to all thread state for anything outside of the CPU.
virtual int cpuId() const =0
This in an instruction tracer that records the flow of instructions through multiple cpus and systems...
void dump() override
called by the cpu when the instruction commits.
InstPBTraceRecord * getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr si, const PCStateBase &pc, const StaticInstPtr mi=NULL) override
std::unique_ptr< uint8_t[]> buf
void closeStreams()
If there is a pending message still write it out and then close the file.
void createTraceFile(std::string filename)
Create the output file and write the header into it.
ProtoMessage::Inst * curMsg
This is the message were working on writing.
void traceMem(StaticInstPtr si, Addr a, Addr s, unsigned f)
Write a memory request to the trace file as part of the cur instruction.
InstPBTrace(const InstPBTraceParams &p)
void traceInst(ThreadContext *tc, StaticInstPtr si, const PCStateBase &pc)
Write an instruction to the trace file.
static ProtoOutputStream * traceStream
One output stream for the entire simulation.
unsigned getFlags() const
StaticInstPtr staticInst
Definition insttracer.hh:71
StaticInstPtr macroStaticInst
Definition insttracer.hh:73
ThreadContext * thread
Definition insttracer.hh:68
std::unique_ptr< PCStateBase > pc
Definition insttracer.hh:72
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition logging.hh:214
Bitfield< 4 > s
Bitfield< 6 > si
Bitfield< 14 > mi
Bitfield< 8 > a
Definition misc_types.hh:66
Bitfield< 6 > f
Definition misc_types.hh:68
Bitfield< 4 > pc
Bitfield< 0 > p
Tick Frequency
The simulated frequency of curTick(). (In ticks per second)
Definition core.cc:47
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
T letoh(T value)
Definition byteswap.hh:173
Tick curTick()
The universal simulation clock.
Definition cur_tick.hh:46
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
OutputDirectory simout
Definition output.cc:62
uint64_t Tick
Tick count type.
Definition types.hh:58
void registerExitCallback(const std::function< void()> &callback)
Register an exit callback.
Definition core.cc:143

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