29#ifndef __ARCH_MIPS_DECODER_HH__
30#define __ARCH_MIPS_DECODER_HH__
38#include "debug/Decode.hh"
39#include "params/MipsDecoder.hh"
83 DPRINTF(Decode,
"Decode: Decoded %s instruction: %#x\n",
84 si->getName(), mach_inst);
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
StaticInstPtr decode(PCStateBase &next_pc) override
Decode an instruction or fetch it from the code cache.
Decoder(const MipsDecoderParams &p)
void moreBytes(const PCStateBase &pc, Addr fetchPC) override
Feed data to the decoder.
static GenericISA::BasicDecodeCache< Decoder, ExtMachInst > defaultCache
A cache of decoded instruction objects.
StaticInstPtr decode(ExtMachInst mach_inst, Addr addr)
Decode a machine instruction.
StaticInstPtr decodeInst(ExtMachInst mach_inst)
Addr instAddr() const
Returns the memory address of the instruction this PC points to.
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.