46 namespace branch_prediction
62 if (
bi->hitBank > 0) {
63 if (abs (2 *
gtable[
bi->hitBank][
bi->hitBankIndex].
ctr + 1) == 1) {
64 if (
bi->longestMatchPred != taken) {
66 if (
bi->altBank > 0) {
70 if (
bi->altBank == 0){
80 if (abs (2 *
gtable[
bi->hitBank][
bi->hitBankIndex].
ctr + 1) == 1) {
87 if ((
bi->longestMatchPred !=
bi->altTaken) &&
88 (
bi->longestMatchPred == taken) &&
107 int dep =
bi->hitBank +
a;
110 int numAllocated = 0;
127 }
else { assert(
false); }
130 tCounter += (penalty - numAllocated);
169 uint32_t
pc = (uint32_t) pc_in;
176 uint32_t hpc = ((uint32_t) branch_pc);
177 hpc = (hpc ^(hpc >> 4));
200 assert(! speculative);
216 int tmp = (branch_pc << 1) + taken;
217 int path = branch_pc;
219 int maxt = (brtype & 1) ? 1 : 4;
221 for (
int t = 0;
t < maxt;
t++) {
222 bool dir = (tmp & 1);
224 int pathbit = (
path & 127);
239 if (
bi->hitBank > 0) {
240 return (abs(2 *
gtable[
bi->hitBank][
bi->hitBankIndex].
ctr + 1)) >=
245 return (bim == 0) || (bim == 3);
265 thirdH(0), pnb(
p.pnb), logPnb(
p.logPnb), pm(
p.pm), gnb(
p.gnb),
266 logGnb(
p.logGnb), gm(
p.gm)
271 for (int8_t &pos :
wl) {
294 unsigned int truncated_pc = branch_pc;
295 return ((truncated_pc << 1) +
bi->predBeforeSC) & ((1 <<
logBias) - 1);
302 return (((branch_pc ^ (branch_pc >> (
logBias - 1))) << 1)
303 +
bi->predBeforeSC) & ((1 <<
logBias) - 1);
316 return (
i >= (nbr - 2)) ? 1 : 0;
322 return ((branch_pc ^ (branch_pc >> 4)) & ((1 << (
logSizeUp)) - 1));
331 for (
int i = 0;
i < nbr;
i++) {
332 int64_t bhist = hist & ((int64_t) ((1 << length[
i]) - 1));
341 bool prev_pred_taken,
bool bias_bit,
bool use_conf_ctr,
342 int8_t conf_ctr,
unsigned conf_bits,
int hitBank,
int altBank,
343 int64_t phist,
int init_lsum)
345 bool pred_taken = prev_pred_taken;
348 bi->predBeforeSC = prev_pred_taken;
350 int lsum = init_lsum;
359 bi->scPred = (lsum >= 0);
361 if (pred_taken !=
bi->scPred) {
362 pred_taken =
bi->scPred;
365 if ((abs(lsum) < thres / 3))
366 pred_taken = (
firstH < 0) ?
bi->scPred : prev_pred_taken;
367 else if ((abs(lsum) < 2 * thres / 3))
368 pred_taken = (
secondH < 0) ?
bi->scPred : prev_pred_taken;
369 else if ((abs(lsum) < thres))
370 pred_taken = (
thirdH < 0) ?
bi->scPred : prev_pred_taken;
379 const MultiperspectivePerceptronTAGEParams &
p)
381 loopPredictor(
p.loop_predictor),
382 statisticalCorrector(
p.statistical_corrector)
385 "Speculative updates support is not implemented");
396 setExtraBits(numBitsTage + numBitsLoopPred + numBitsStatisticalCorrector);
408 unsigned long long int h =
g;
410 h ^= (
bi.getPC() ^ (
bi.getPC() >> 2));
430 for (
int i = 0;
i <
specs.size();
i += 1) {
443 for (
int i = 0;
i <
specs.size();
i += 1) {
447 short int max_weight = (1 << (
specs[
i]->width - 1)) - 1;
448 short int min_weight = -(1 << (
specs[
i]->width - 1));
450 if (*
c < max_weight) {
454 if (*
c > min_weight) {
466 unsigned int hpc = (
bi.getPC() ^ (
bi.getPC() >> 2));
467 unsigned int pc =
bi.getPC();
470 unsigned short recency_pc =
pc >> 2;
479 if (hpc % (
i + 2) == 0) {
490 if (hpc % (
i + 2) == 0) {
502 for (
int i = 0;
i < blurrypath_histories.size();
i += 1)
504 if (blurrypath_histories[
i].size() > 0) {
505 unsigned int z =
pc >>
i;
506 if (blurrypath_histories[
i][0] !=
z) {
507 memmove(&blurrypath_histories[
i][1],
508 &blurrypath_histories[
i][0],
509 sizeof(
unsigned int) *
510 (blurrypath_histories[
i].size() - 1));
511 blurrypath_histories[
i][0] =
z;
524 bp_history = (
void *)
bi;
534 init_lsum = -init_lsum;
539 bi->scBranchInfo, pred_taken,
false ,
543 bi->predictedTaken = pred_taken;
544 bi->lpBranchInfo->predTaken = pred_taken;
552 bool bias_bit,
int hitBank,
int altBank, int64_t phist)
554 bool scPred = (
bi->lsum >= 0);
556 if (
bi->predBeforeSC != scPred) {
557 if (abs(
bi->lsum) <
bi->thres) {
559 if (abs(
bi->lsum) <
bi->thres / 3) {
562 }
else if (abs(
bi->lsum) < 2 *
bi->thres / 3) {
565 }
else if (abs(
bi->lsum) <
bi->thres) {
573 if ((scPred != taken) || ((abs(
bi->lsum) <
bi->thres))) {
592 void *bp_history,
bool squashed,
603 tage->
squash(tid, taken,
bi->tageBranchInfo, corrTarget);
604 if (
bi->tageBranchInfo->condBranch) {
611 if (
bi->isUnconditional()) {
613 bi->scBranchInfo, corrTarget);
624 bool scPred = (
bi->scBranchInfo->lsum >= 0);
625 if ((scPred != taken) ||
626 ((abs(
bi->scBranchInfo->lsum) <
bi->scBranchInfo->thres))) {
630 bi->scBranchInfo, corrTarget,
false ,
636 bi->predictedTaken,
true);
643 uint32_t truncated_target = corrTarget;
644 uint32_t truncated_pc = instPC;
645 if (truncated_target < truncated_pc) {
661 bi->scBranchInfo, corrTarget);
664 false, inst, corrTarget);
677 bp_history = (
void *)
bi;
static std::stack< std::string > path
bool isDirectCtrl() const
bool isUncondCtrl() const
const unsigned instShiftAmt
Number of bits to shift instructions by for predictor addresses.
size_t getSizeInBits() const
void updateStats(bool taken, BranchInfo *bi)
Update the stats.
void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken, bool tage_pred, BranchInfo *bi, unsigned instShiftAmt)
Update LTAGE for conditional branches.
void squashLoop(BranchInfo *bi)
virtual bool calcConf(int index) const
bool loopPredict(ThreadID tid, Addr branch_pc, bool cond_branch, BranchInfo *bi, bool prev_pred_taken, unsigned instShiftAmt)
Get the loop prediction.
bool optionalAgeInc() const override
bool calcConf(int index) const override
unsigned getIndUpd(Addr branch_pc) const override
void gUpdate(Addr branch_pc, bool taken, int64_t hist, std::vector< int > &length, std::vector< int8_t > *tab, int nbr, int logs, std::vector< int8_t > &w, StatisticalCorrector::BranchInfo *bi) override
unsigned getIndBiasSK(Addr branch_pc, StatisticalCorrector::BranchInfo *bi) const override
unsigned getIndBias(Addr branch_pc, StatisticalCorrector::BranchInfo *bi, bool bias) const override
bool scPredict(ThreadID tid, Addr branch_pc, bool cond_branch, StatisticalCorrector::BranchInfo *bi, bool prev_pred_taken, bool bias_bit, bool use_conf_ctr, int8_t conf_ctr, unsigned conf_bits, int hitBank, int altBank, int64_t phist, int init_lsum) override
void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken, StatisticalCorrector::BranchInfo *bi, Addr corrTarget, bool b, int hitBank, int altBank, int64_t phist) override
std::vector< int8_t > * pgehl
unsigned getIndBiasBank(Addr branch_pc, StatisticalCorrector::BranchInfo *bi, int hitBank, int altBank) const override
int gIndexLogsSubstr(int nbr, int i) override
virtual void getBiasLSUM(Addr branch_pc, StatisticalCorrector::BranchInfo *bi, int &lsum) const =0
MPP_StatisticalCorrector(const MPP_StatisticalCorrectorParams &p)
std::vector< int8_t > * ggehl
void handleAllocAndUReset(bool alloc, bool taken, TAGEBase::BranchInfo *bi, int nrand) override
Handles Allocation and U bits reset on an update.
void resetUctr(uint8_t &u) override
Algorithm for resetting a single U counter.
int bindex(Addr pc_in) const override
Computes the index used to access the bimodal table.
std::vector< unsigned int > tunedHistoryLengths
void calculateParameters() override
Calculates the history lengths and some other paramters in derived classes.
void updatePathAndGlobalHistory(ThreadHistory &tHist, int brtype, bool taken, Addr branch_pc, Addr target)
void updateHistories(ThreadID tid, Addr branch_pc, bool taken, TAGEBase::BranchInfo *b, bool speculative, const StaticInstPtr &inst, Addr target) override
(Speculatively) updates global histories (path and direction).
void handleTAGEUpdate(Addr branch_pc, bool taken, TAGEBase::BranchInfo *bi) override
Handles the update of the TAGE entries.
bool isHighConfidence(TAGEBase::BranchInfo *bi) const override
void adjustAlloc(bool &alloc, bool taken, bool pred_taken) override
Extra calculation to tell whether TAGE allocaitons may happen or not on an update For this base TAGE ...
unsigned getUseAltIdx(TAGEBase::BranchInfo *bi, Addr branch_pc) override
Calculation of the index for useAltPredForNewlyAllocated On this base TAGE implementation it is alway...
void handleUReset() override
Handles the U bits reset.
bool lookup(ThreadID tid, Addr instPC, void *&bp_history) override
Looks up a given PC in the BP to see if it is taken or not taken.
void update(ThreadID tid, Addr instPC, bool taken, void *bp_history, bool squashed, const StaticInstPtr &inst, Addr corrTarget) override
Updates the BP with taken/not taken information.
int computePartialSum(ThreadID tid, MPPTAGEBranchInfo &bi) const
LoopPredictor * loopPredictor
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
MultiperspectivePerceptronTAGE(const MultiperspectivePerceptronTAGEParams &p)
StatisticalCorrector * statisticalCorrector
void uncondBranch(ThreadID tid, Addr pc, void *&bp_history) override
unsigned int getIndex(ThreadID tid, MPPTAGEBranchInfo &bi, const HistorySpec &spec, int index) const
void squash(ThreadID tid, void *bp_history) override
void updatePartial(ThreadID tid, MPPTAGEBranchInfo &bi, bool taken)
void updateHistories(ThreadID tid, MPPTAGEBranchInfo &bi, bool taken)
std::vector< ThreadData * > threadData
const unsigned long long int imli_mask4
std::vector< int > modpath_lengths
std::vector< int > modhist_indices
std::vector< int > modhist_lengths
std::vector< int > table_sizes
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
void setExtraBits(int bits)
Sets the starting number of storage bits to compute the number of table entries.
std::vector< HistorySpec * > specs
Predictor tables.
std::vector< int > modpath_indices
const unsigned long long int imli_mask1
void initGEHLTable(unsigned numLenghts, std::vector< int > lengths, std::vector< int8_t > *&table, unsigned logNumEntries, std::vector< int8_t > &w, int8_t wInitValue)
virtual void scHistoryUpdate(Addr branch_pc, const StaticInstPtr &inst, bool taken, BranchInfo *tage_bi, Addr corrTarget)
virtual void gUpdates(ThreadID tid, Addr pc, bool taken, BranchInfo *bi, int64_t phist)=0
void updateStats(bool taken, BranchInfo *bi)
const unsigned scCountersWidth
virtual bool scPredict(ThreadID tid, Addr branch_pc, bool cond_branch, BranchInfo *bi, bool prev_pred_taken, bool bias_bit, bool use_conf_ctr, int8_t conf_ctr, unsigned conf_bits, int hitBank, int altBank, int64_t phist, int init_lsum=0)
void ctrUpdate(T &ctr, bool taken, int nbits)
const unsigned chooserConfWidth
virtual size_t getSizeInBits() const
std::vector< int8_t > biasSK
virtual int gPredictions(ThreadID tid, Addr branch_pc, BranchInfo *bi, int &lsum, int64_t phist)=0
std::vector< int > pUpdateThreshold
virtual void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken, BranchInfo *bi, Addr corrTarget, bool bias_bit, int hitBank, int altBank, int64_t phist)
int64_t gIndex(Addr branch_pc, int64_t bhist, int logs, int nbr, int i)
std::vector< int8_t > bias
const unsigned pUpdateThresholdWidth
virtual void updateHistories(ThreadID tid, Addr branch_pc, bool taken, BranchInfo *b, bool speculative, const StaticInstPtr &inst=nullStaticInstPtr, Addr target=MaxAddr)
(Speculatively) updates global histories (path and direction).
const unsigned tagTableUBits
static void ctrUpdate(T &ctr, bool taken, int nbits)
Updates a direction counter based on the actual branch outcome.
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
bool isSpeculativeUpdateEnabled() const
virtual void updateStats(bool taken, BranchInfo *bi)
Update the stats.
const unsigned logRatioBiModalHystEntries
std::vector< bool > btableHysteresis
void updateGHist(uint8_t *&h, bool dir, uint8_t *tab, int &PT)
(Speculatively) updates the global branch history.
std::vector< bool > btablePrediction
const unsigned nHistoryTables
std::vector< ThreadHistory > threadHistory
std::vector< int > logTagTableSizes
void baseUpdate(Addr pc, bool taken, BranchInfo *bi)
Updates the bimodal predictor.
virtual void squash(ThreadID tid, bool taken, BranchInfo *bi, Addr target)
Restores speculatively updated path and direction histories.
virtual bool isHighConfidence(BranchInfo *bi) const
bool tagePredict(ThreadID tid, Addr branch_pc, bool cond_branch, BranchInfo *bi)
TAGE prediction called from TAGE::predict.
std::vector< bool > noSkip
const bool speculativeHistUpdate
int getPathHist(ThreadID tid) const
const unsigned tagTableCounterBits
virtual void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken, BranchInfo *bi, int nrand, Addr corrTarget, bool pred, bool preAdjustAlloc=false)
Update TAGE for conditional branches.
size_t getSizeInBits() const
std::enable_if_t< std::is_integral_v< T >, T > random()
Use the SFINAE idiom to choose an implementation based on whether the type is integral or floating po...
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
int16_t ThreadID
Thread index/ID type.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Branch information data type.
Base class to implement the predictor tables.
virtual unsigned int getHash(ThreadID tid, Addr pc, Addr pc2, int t) const =0
Gets the hash to index the table, using the pc of the branch, and the index of the table.
FoldedHistory * computeIndices
FoldedHistory * computeTags[2]