gem5
v24.0.0.0
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arch
sparc
regs
int.cc
Go to the documentation of this file.
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/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "
arch/sparc/regs/int.hh
"
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#include "
arch/sparc/isa.hh
"
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namespace
gem5
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{
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namespace
SparcISA
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{
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RegId
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IntRegClassOps::flatten
(
const
BaseISA
&isa,
const
RegId
&
id
)
const
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{
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auto
&sparc_isa =
static_cast<
const
SparcISA::ISA
&
>
(isa);
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return
{
flatIntRegClass
, sparc_isa.mapIntRegId(
id
.
index
())};
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}
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}
// namespace SparcISA
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}
// namespace gem5
gem5::BaseISA
Definition
isa.hh:59
gem5::RegId
Register ID: describe an architectural register with its class and index.
Definition
reg_class.hh:94
gem5::SparcISA::ISA
Definition
isa.hh:56
gem5::SparcISA::IntRegClassOps::flatten
RegId flatten(const BaseISA &isa, const RegId &id) const override
Flatten register id id using information in the ISA object isa.
Definition
int.cc:40
gem5::MipsISA::index
Bitfield< 30, 0 > index
Definition
pra_constants.hh:47
gem5::SparcISA::flatIntRegClass
constexpr RegClass flatIntRegClass
Definition
int.hh:83
gem5
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition
binary32.hh:36
isa.hh
int.hh
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