gem5 v24.1.0.1
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strided_gen.cc
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1/*
2 * Copyright (c) 2012-2013, 2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed here under. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
39
40#include <algorithm>
41
42#include "base/trace.hh"
43#include "debug/TrafficGen.hh"
44
45namespace gem5
46{
47
49 Tick duration, Addr cacheline_size,
50 Addr start_addr, Addr end_addr, Addr offset,
51 Addr block_size, Addr superblock_size, Addr stride_size,
52 Tick min_period, Tick max_period,
53 uint8_t read_percent, Addr data_limit)
54 : StochasticGen(obj, requestor_id, duration, start_addr, end_addr,
55 block_size, cacheline_size, min_period, max_period,
56 read_percent, data_limit),
57 offset(offset), superblockSize(superblock_size), strideSize(stride_size),
58 nextAddr(0), dataManipulated(0)
59{
60 assert(superblock_size % block_size == 0);
61 assert(offset % superblock_size == 0);
62 assert(stride_size % superblock_size == 0);
63}
64
65void
67{
68 // reset the address and the data counter
71}
72
75{
76 // choose if we generate a read or a write here
77 bool isRead = readPercent != 0 &&
78 (readPercent == 100 || rng->random(0, 100) < readPercent);
79
80 assert((readPercent == 0 && !isRead) || (readPercent == 100 && isRead) ||
81 readPercent != 100);
82
83 DPRINTF(TrafficGen, "StridedGen::getNextPacket: %c to addr %#x, size %d\n",
84 isRead ? 'r' : 'w', nextAddr, blocksize);
85
86 // Add the amount of data manipulated to the total
88
91
92 // increment the address
94
95 // if we have completed reading a block we need to jump
96 // (strideSize - blockSize) bytes to start reading the next block
97 if ((nextAddr - (startAddr + offset)) % superblockSize == 0) {
99 }
100
101 // If we have reached the end of the address space, reset the
102 // address to the start of the range
103 if (nextAddr >= endAddr) {
104 DPRINTF(TrafficGen, "Wrapping address to the start of "
105 "the range\n");
107 }
108
109 return pkt;
110}
111
112Tick
113StridedGen::nextPacketTick(bool elastic, Tick delay) const
114{
115 // Check to see if we have reached the data limit. If dataLimit is
116 // zero we do not have a data limit and therefore we will keep
117 // generating requests for the entire residency in this state.
119 DPRINTF(TrafficGen, "Data limit for StridedGen reached.\n");
120 // there are no more requests, therefore return MaxTick
121 return MaxTick;
122 } else {
123 // return the time when the next request should take place
124 Tick wait = rng->random(minPeriod, maxPeriod);
125
126 // compensate for the delay experienced to not be elastic, by
127 // default the value we generate is from the time we are
128 // asked, so the elasticity happens automatically
129 if (!elastic) {
130 if (wait < delay)
131 wait = 0;
132 else
133 wait -= delay;
134 }
135
136 return curTick() + wait;
137 }
138}
139
140} // namespace gem5
#define DPRINTF(x,...)
Definition trace.hh:209
PacketPtr getPacket(Addr addr, unsigned size, const MemCmd &cmd, Request::FlagsType flags=0)
Generate a new request and associated packet.
Definition base_gen.cc:55
Random::RandomPtr rng
Definition base_gen.hh:76
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
Abstract superclass for simulation objects.
const Addr startAddr
Start of address range.
Definition base_gen.hh:154
const Tick minPeriod
Request generation period.
Definition base_gen.hh:166
const Addr dataLimit
Maximum amount of data to manipulate.
Definition base_gen.hh:175
const Addr endAddr
End of address range.
Definition base_gen.hh:157
const Tick maxPeriod
Definition base_gen.hh:167
const Addr blocksize
Blocksize and address increment.
Definition base_gen.hh:160
const uint8_t readPercent
Percent of generated transactions that should be reads.
Definition base_gen.hh:172
Addr dataManipulated
Counter to determine the amount of data manipulated.
PacketPtr getNextPacket()
Get the next generated packet.
StridedGen(SimObject &obj, RequestorID requestor_id, Tick duration, Addr cacheline_size, Addr start_addr, Addr end_addr, Addr offset, Addr block_size, Addr superblock_size, Addr stride_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit)
Create a strided address sequence generator.
Addr nextAddr
Address of next request.
Tick nextPacketTick(bool elastic, Tick delay) const
Determine the tick when the next packet is available.
void enter()
Enter this generator state.
The traffic generator is a module that generates stimuli for the memory system, based on a collection...
Bitfield< 23, 0 > offset
Definition types.hh:144
Copyright (c) 2024 Arm Limited All rights reserved.
Definition binary32.hh:36
Tick curTick()
The universal simulation clock.
Definition cur_tick.hh:46
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
uint64_t Tick
Tick count type.
Definition types.hh:58
const Tick MaxTick
Definition types.hh:60
uint16_t RequestorID
Definition request.hh:95
Declaration of the strided generator that generates sequential requests.

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