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process.cc
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1 /*
2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
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14  * this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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27  *
28  * Authors: Gabe Black
29  * Ali Saidi
30  * Korey Sewell
31  */
32 
33 #include "arch/mips/process.hh"
34 
35 #include "arch/mips/isa_traits.hh"
38 #include "base/logging.hh"
39 #include "cpu/thread_context.hh"
40 #include "debug/Loader.hh"
41 #include "mem/page_table.hh"
42 #include "params/Process.hh"
43 #include "sim/aux_vector.hh"
44 #include "sim/process.hh"
45 #include "sim/process_impl.hh"
46 #include "sim/syscall_return.hh"
47 #include "sim/system.hh"
48 
49 using namespace std;
50 using namespace MipsISA;
51 
52 MipsProcess::MipsProcess(ProcessParams *params, ObjectFile *objFile)
53  : Process(params,
54  new EmulationPageTable(params->name, params->pid, PageBytes),
55  objFile)
56 {
57  fatal_if(params->useArchPT, "Arch page tables not implemented.");
58  // Set up stack. On MIPS, stack starts at the top of kuseg
59  // user address space. MIPS stack grows down from here
60  Addr stack_base = 0x7FFFFFFF;
61 
62  Addr max_stack_size = 8 * 1024 * 1024;
63 
64  // Set pointer for next thread stack. Reserve 8M for main stack.
65  Addr next_thread_stack_base = stack_base - max_stack_size;
66 
67  // Set up break point (Top of Heap)
68  Addr brk_point = image.maxAddr();
69  brk_point = roundUp(brk_point, PageBytes);
70 
71  // Set up region for mmaps. Start it 1GB above the top of the heap.
72  Addr mmap_end = brk_point + 0x40000000L;
73 
74  memState = make_shared<MemState>(brk_point, stack_base, max_stack_size,
75  next_thread_stack_base, mmap_end);
76 }
77 
78 void
80 {
82 
83  argsInit<uint32_t>(PageBytes);
84 }
85 
86 template<class IntType>
87 void
88 MipsProcess::argsInit(int pageSize)
89 {
90  int intSize = sizeof(IntType);
91 
93 
94  ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
95  if (elfObject)
96  {
97  // Set the system page size
98  auxv.emplace_back(M5_AT_PAGESZ, MipsISA::PageBytes);
99  // Set the frequency at which time() increments
100  auxv.emplace_back(M5_AT_CLKTCK, 100);
101  // For statically linked executables, this is the virtual
102  // address of the program header tables if they appear in the
103  // executable image.
104  auxv.emplace_back(M5_AT_PHDR, elfObject->programHeaderTable());
105  DPRINTF(Loader, "auxv at PHDR %08p\n",
106  elfObject->programHeaderTable());
107  // This is the size of a program header entry from the elf file.
108  auxv.emplace_back(M5_AT_PHENT, elfObject->programHeaderSize());
109  // This is the number of program headers from the original elf file.
110  auxv.emplace_back(M5_AT_PHNUM, elfObject->programHeaderCount());
111  // This is the base address of the ELF interpreter; it should be
112  // zero for static executables or contain the base address for
113  // dynamic executables.
114  auxv.emplace_back(M5_AT_BASE, getBias());
115  //The entry point to the program
116  auxv.emplace_back(M5_AT_ENTRY, objFile->entryPoint());
117  //Different user and group IDs
118  auxv.emplace_back(M5_AT_UID, uid());
119  auxv.emplace_back(M5_AT_EUID, euid());
120  auxv.emplace_back(M5_AT_GID, gid());
121  auxv.emplace_back(M5_AT_EGID, egid());
122  }
123 
124  // Calculate how much space we need for arg & env & auxv arrays.
125  int argv_array_size = intSize * (argv.size() + 1);
126  int envp_array_size = intSize * (envp.size() + 1);
127  int auxv_array_size = intSize * 2 * (auxv.size() + 1);
128 
129  int arg_data_size = 0;
130  for (vector<string>::size_type i = 0; i < argv.size(); ++i) {
131  arg_data_size += argv[i].size() + 1;
132  }
133  int env_data_size = 0;
134  for (vector<string>::size_type i = 0; i < envp.size(); ++i) {
135  env_data_size += envp[i].size() + 1;
136  }
137 
138  int space_needed =
139  argv_array_size +
140  envp_array_size +
141  auxv_array_size +
142  arg_data_size +
143  env_data_size;
144 
145  // set bottom of stack
146  memState->setStackMin(memState->getStackBase() - space_needed);
147  // align it
148  memState->setStackMin(roundDown(memState->getStackMin(), pageSize));
149  memState->setStackSize(memState->getStackBase() - memState->getStackMin());
150  // map memory
151  allocateMem(memState->getStackMin(), roundUp(memState->getStackSize(),
152  pageSize));
153 
154  // map out initial stack contents; leave room for argc
155  IntType argv_array_base = memState->getStackMin() + intSize;
156  IntType envp_array_base = argv_array_base + argv_array_size;
157  IntType auxv_array_base = envp_array_base + envp_array_size;
158  IntType arg_data_base = auxv_array_base + auxv_array_size;
159  IntType env_data_base = arg_data_base + arg_data_size;
160 
161  // write contents to stack
162  IntType argc = argv.size();
163 
164  argc = htole((IntType)argc);
165 
166  initVirtMem.writeBlob(memState->getStackMin(), &argc, intSize);
167 
168  copyStringArray(argv, argv_array_base, arg_data_base,
170 
171  copyStringArray(envp, envp_array_base, env_data_base,
173 
174  // Copy the aux vector
175  Addr auxv_array_end = auxv_array_base;
176  for (const auto &aux: auxv) {
177  initVirtMem.write(auxv_array_end, aux, GuestByteOrder);
178  auxv_array_end += sizeof(aux);
179  }
180 
181  // Write out the terminating zeroed auxilliary vector
182  const AuxVector<IntType> zero(0, 0);
183  initVirtMem.write(auxv_array_end, zero);
184  auxv_array_end += sizeof(zero);
185 
187 
188  tc->setIntReg(FirstArgumentReg, argc);
189  tc->setIntReg(FirstArgumentReg + 1, argv_array_base);
190  tc->setIntReg(StackPointerReg, memState->getStackMin());
191 
192  tc->pcState(getStartPC());
193 }
194 
195 
196 RegVal
198 {
199  assert(i < 6);
200  return tc->readIntReg(FirstArgumentReg + i++);
201 }
202 
203 void
205 {
206  if (sysret.successful()) {
207  // no error
209  tc->setIntReg(ReturnValueReg, sysret.returnValue());
210  } else {
211  // got an error, return details
212  tc->setIntReg(SyscallSuccessReg, (uint32_t)(-1));
213  tc->setIntReg(ReturnValueReg, sysret.errnoValue());
214  }
215 }
#define DPRINTF(x,...)
Definition: trace.hh:229
ObjectFile * objFile
Definition: process.hh:217
Addr programHeaderTable()
Definition: elf_object.hh:128
Bitfield< 7, 0 > L
Definition: int.hh:59
const std::string & name()
Definition: trace.cc:54
Bitfield< 7 > i
virtual TheISA::PCState pcState() const =0
virtual RegVal readIntReg(RegIndex reg_idx) const =0
bool successful() const
Was the system call successful?
std::vector< ContextID > contextIds
Definition: process.hh:167
void allocateMem(Addr vaddr, int64_t size, bool clobber=false)
Definition: process.cc:333
SETranslatingPortProxy initVirtMem
Definition: process.hh:183
uint64_t uid()
Definition: process.hh:87
uint64_t RegVal
Definition: types.hh:168
void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value)
Definition: process.cc:204
Overload hash function for BasicBlockRange type.
Definition: vec_reg.hh:586
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: process.cc:307
T roundUp(const T &val, const U &align)
This function is used to align addresses in memory.
Definition: intmath.hh:168
std::shared_ptr< MemState > memState
Definition: process.hh:283
ThreadContext is the external interface to all thread state for anything outside of the CPU...
int errnoValue() const
The errno value.
const ByteOrder GuestByteOrder
Definition: isa_traits.hh:42
STL vector class.
Definition: stl.hh:40
ThreadContext * getThreadContext(ContextID tid) const
Definition: system.hh:194
T htole(T value)
Definition: byteswap.hh:144
void writeBlob(Addr addr, const void *p, int size) const
Same as tryWriteBlob, but insists on success.
Definition: port_proxy.hh:189
Addr maxAddr() const
void copyStringArray(std::vector< std::string > &strings, AddrType array_ptr, AddrType data_ptr, const ByteOrder bo, PortProxy &memProxy)
Definition: process_impl.hh:43
uint64_t euid()
Definition: process.hh:88
Addr getStartPC()
Definition: process.cc:532
System * system
Definition: process.hh:170
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition: logging.hh:203
const RegIndex StackPointerReg
Definition: registers.hh:77
T roundDown(const T &val, const U &align)
This function is used to align addresses in memory.
Definition: intmath.hh:185
RegVal getSyscallArg(ThreadContext *tc, int &i)
Definition: process.cc:197
std::vector< std::string > envp
Definition: process.hh:221
virtual void setIntReg(RegIndex reg_idx, RegVal val)=0
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
int64_t returnValue() const
The return value.
const Addr PageBytes
Definition: isa_traits.hh:47
uint16_t programHeaderSize()
Definition: elf_object.hh:129
Declarations of a non-full system Page Table.
MipsProcess(ProcessParams *params, ObjectFile *objFile)
Definition: process.cc:52
uint16_t programHeaderCount()
Definition: elf_object.hh:130
static const int FirstArgumentReg
Definition: process.cc:54
void argsInit(int pageSize)
Definition: process.cc:88
Addr entryPoint() const
Definition: object_file.hh:131
uint64_t gid()
Definition: process.hh:89
void initState()
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: process.cc:79
const Addr PageBytes
Definition: isa_traits.hh:49
void write(Addr address, const T &data) const
Write object T to address.
Definition: port_proxy.hh:293
const RegIndex ReturnValueReg
Definition: registers.hh:81
std::vector< std::string > argv
Definition: process.hh:220
This class represents the return value from an emulated system call, including any errno setting...
Each instance of a Loader subclass will have a chance to try to load an object file when tryLoaders i...
Definition: process.hh:191
const RegIndex SyscallSuccessReg
Definition: registers.hh:87
Addr getBias()
Definition: process.cc:524
MemoryImage image
Definition: process.hh:218
uint64_t egid()
Definition: process.hh:90

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