gem5  v19.0.0.0
All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Modules Pages
base_gic.cc
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2012, 2017-2018 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
18  * redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution;
21  * neither the name of the copyright holders nor the names of its
22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  *
37  * Authors: Andreas Sandberg
38  */
39 
40 #include "dev/arm/base_gic.hh"
41 
42 #include "cpu/thread_context.hh"
43 #include "dev/arm/realview.hh"
44 #include "params/ArmInterruptPin.hh"
45 #include "params/ArmPPI.hh"
46 #include "params/ArmSPI.hh"
47 #include "params/BaseGic.hh"
48 
50  : PioDevice(p),
51  platform(p->platform)
52 {
53  RealView *const rv(dynamic_cast<RealView*>(p->platform));
54  // The platform keeps track of the GIC that is hooked up to the
55  // system. Due to quirks in gem5's configuration system, the
56  // platform can't take a GIC as parameter. Instead, we need to
57  // register with the platform when a new GIC is created. If we
58  // can't find a platform, something is seriously wrong.
59  fatal_if(!rv, "GIC model can't register with platform code");
60  rv->setGic(this);
61 }
62 
64 {
65 }
66 
67 void
69 {
71  getSystem()->setGIC(this);
72 }
73 
74 const BaseGic::Params *
76 {
77  return dynamic_cast<const Params *>(_params);
78 }
79 
80 ArmInterruptPinGen::ArmInterruptPinGen(const ArmInterruptPinParams *p)
81  : SimObject(p)
82 {
83 }
84 
85 ArmSPIGen::ArmSPIGen(const ArmSPIParams *p)
86  : ArmInterruptPinGen(p), pin(new ArmSPI(p->platform, p->num))
87 {
88 }
89 
92 {
93  return pin;
94 }
95 
96 ArmPPIGen::ArmPPIGen(const ArmPPIParams *p)
98 {
99 }
100 
103 {
104  panic_if(!tc, "Invalid Thread Context\n");
105  ContextID cid = tc->contextId();
106 
107  auto pin_it = pins.find(cid);
108 
109  if (pin_it != pins.end()) {
110  // PPI Pin Already generated
111  return pin_it->second;
112  } else {
113  // Generate PPI Pin
114  auto p = static_cast<const ArmPPIParams *>(_params);
115  ArmPPI *pin = new ArmPPI(p->platform, tc, p->num);
116 
117  pins.insert({cid, pin});
118 
119  return pin;
120  }
121 }
122 
124  Platform *_platform, ThreadContext *tc, uint32_t int_num)
125  : threadContext(tc), platform(dynamic_cast<RealView*>(_platform)),
126  intNum(int_num)
127 {
128  fatal_if(!platform, "Interrupt not connected to a RealView platform");
129 }
130 
131 void
133 {
135  "InterruptLine::setThreadContext called twice\n");
136 
137  threadContext = tc;
138 }
139 
140 ContextID
142 {
143  panic_if(!threadContext, "Per-context interrupt triggered without a " \
144  "call to InterruptLine::setThreadContext.\n");
145  return threadContext->contextId();
146 }
147 
149  Platform *_platform, uint32_t int_num)
150  : ArmInterruptPin(_platform, nullptr, int_num)
151 {
152 }
153 
154 void
156 {
158 }
159 
160 void
162 {
164 }
165 
167  Platform *_platform, ThreadContext *tc, uint32_t int_num)
168  : ArmInterruptPin(_platform, tc, int_num)
169 {
170 }
171 
172 void
174 {
176 }
177 
178 void
180 {
182 }
183 
184 ArmSPIGen *
185 ArmSPIParams::create()
186 {
187  return new ArmSPIGen(this);
188 }
189 
190 ArmPPIGen *
191 ArmPPIParams::create()
192 {
193  return new ArmPPIGen(this);
194 }
const uint32_t intNum
Interrupt number to generate.
Definition: base_gic.hh:222
ArmSPI * pin
Definition: base_gic.hh:157
ArmInterruptPinGen(const ArmInterruptPinParams *p)
Definition: base_gic.cc:80
void raise() override
Signal an interrupt.
Definition: base_gic.cc:155
RealView *const platform
Arm platform to use for interrupt generation.
Definition: base_gic.hh:219
virtual void clearInt(uint32_t num)=0
Clear an interrupt from a device that is connected to the GIC.
BaseGicParams Params
Definition: base_gic.hh:67
ArmSPIGen(const ArmSPIParams *p)
Definition: base_gic.cc:85
void clear() override
Clear a signalled interrupt.
Definition: base_gic.cc:161
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: io_device.cc:59
ArmPPIGen(const ArmPPIParams *p)
Definition: base_gic.cc:96
Shared Peripheral Interrupt Generator It is capable of generating one interrupt only: it maintains a ...
Definition: base_gic.hh:150
Declaration of top level class for the RealView platform chips.
ArmSPI(Platform *platform, uint32_t int_num)
Definition: base_gic.cc:148
ThreadContext is the external interface to all thread state for anything outside of the CPU...
ContextID targetContext() const
Get the target context ID of this interrupt.
Definition: base_gic.cc:141
virtual void sendPPInt(uint32_t num, uint32_t cpu)=0
Interface call for private peripheral interrupts.
virtual void sendInt(uint32_t num)=0
Post an interrupt from a device that is connected to the GIC.
ArmInterruptPin * get(ThreadContext *tc=nullptr) override
Definition: base_gic.cc:102
void setThreadContext(ThreadContext *tc)
Set the thread context owning this interrupt.
Definition: base_gic.cc:132
BaseGic * gic
Definition: realview.hh:65
ArmPPI(Platform *platform, ThreadContext *tc, uint32_t int_num)
Definition: base_gic.cc:166
void raise() override
Signal an interrupt.
Definition: base_gic.cc:173
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition: logging.hh:203
void clear() override
Clear a signalled interrupt.
Definition: base_gic.cc:179
This device is the base class which all devices senstive to an address range inherit from...
Definition: io_device.hh:102
ArmInterruptPin(Platform *platform, ThreadContext *tc, uint32_t int_num)
Definition: base_gic.cc:123
virtual ~BaseGic()
Definition: base_gic.cc:63
ArmInterruptPin * get(ThreadContext *tc=nullptr) override
Definition: base_gic.cc:91
const ThreadContext * threadContext
Pointer to the thread context that owns this interrupt in case it is a thread-/CPU-private interrupt...
Definition: base_gic.hh:216
void setGIC(BaseGic *gic)
Sets the pointer to the GIC.
Definition: system.hh:208
Base class for ARM GIC implementations.
void setGic(BaseGic *_gic)
Give platform a pointer to interrupt controller.
Definition: realview.hh:83
std::unordered_map< ContextID, ArmPPI * > pins
Definition: base_gic.hh:172
This SimObject is instantiated in the python world and serves as an ArmInterruptPin generator...
Definition: base_gic.hh:137
const SimObjectParams * _params
Cached copy of the object parameters.
Definition: sim_object.hh:110
virtual ContextID contextId() const =0
friend class ArmPPIGen
Definition: base_gic.hh:238
Private Peripheral Interrupt Generator Since PPIs are banked in the GIC, this class is capable of gen...
Definition: base_gic.hh:165
ArmSystem * getSystem() const
Definition: base_gic.hh:106
Bitfield< 0 > p
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:185
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: base_gic.cc:68
BaseGic(const Params *p)
Definition: base_gic.cc:49
Generic representation of an Arm interrupt pin.
Definition: base_gic.hh:178
Abstract superclass for simulation objects.
Definition: sim_object.hh:96
int ContextID
Globally unique thread context ID.
Definition: types.hh:231
virtual void clearPPInt(uint32_t num, uint32_t cpu)=0
const Params * params() const
Definition: base_gic.cc:75

Generated on Fri Feb 28 2020 16:27:00 for gem5 by doxygen 1.8.13