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malta.cc
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1 /*
2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are
7  * met: redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer;
9  * redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution;
12  * neither the name of the copyright holders nor the names of its
13  * contributors may be used to endorse or promote products derived from
14  * this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  *
28  * Authors: Ali Saidi
29  * Rick Strong
30  */
31 
36 #include "dev/mips/malta.hh"
37 
38 #include <deque>
39 #include <string>
40 #include <vector>
41 
42 #include "cpu/intr_control.hh"
43 #include "debug/Malta.hh"
44 #include "dev/mips/malta_cchip.hh"
45 #include "dev/mips/malta_io.hh"
46 #include "params/Malta.hh"
47 #include "sim/system.hh"
48 
49 using namespace std;
50 
52  : Platform(p), system(p->system)
53 {
54  for (int i = 0; i < Malta::Max_CPUs; i++)
55  intr_sum_type[i] = 0;
56 }
57 
58 void
60 {
61  //see {Linux-src}/arch/mips/mips-boards/sim/sim_setup.c
62  io->postIntr(0x10/*HW4*/);
63 }
64 
65 void
67 {
68  //FIXME: implement clearConsoleInt()
69  io->clearIntr(0x10/*HW4*/);
70 }
71 
72 void
74 {
75  panic("Malta::postPciInt() has not been implemented.");
76 }
77 
78 void
80 {
81  panic("Malta::clearPciInt() has not been implemented.");
82 }
83 
84 Addr
85 Malta::pciToDma(Addr pciAddr) const
86 {
87  panic("Malta::pciToDma() has not been implemented.");
88 }
89 
90 void
92 {
94 }
95 
96 void
98 {
100 }
101 
102 Malta *
103 MaltaParams::create()
104 {
105  return new Malta(this);
106 }
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:167
Emulation of the Malta CChip CSRs.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: malta.cc:97
Bitfield< 7 > i
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: malta.cc:91
Overload hash function for BasicBlockRange type.
Definition: vec_reg.hh:586
Definition: cprintf.cc:42
void postIntr(uint8_t interrupt)
Post an Interrupt to the CPU.
Definition: malta_io.cc:99
void clearIntr(uint8_t interrupt)
Clear an Interrupt to the CPU.
Definition: malta_io.cc:106
void clearPciInt(int line) override
Clear a posted PCI->CPU interrupt.
Definition: malta.cc:79
static const int Max_CPUs
Max number of CPUs in a Malta.
Definition: malta.hh:60
#define SERIALIZE_ARRAY(member, size)
Definition: serialize.hh:658
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
void postPciInt(int line) override
Cause the chipset to post a cpi interrupt to the CPU.
Definition: malta.cc:73
MaltaIO * io
Pointer to the MaltaIO device which has the RTC.
Definition: malta.hh:66
Bitfield< 15 > system
Definition: misc.hh:999
Top level class for Malta Chipset emulation.
Definition: malta.hh:56
#define UNSERIALIZE_ARRAY(member, size)
Definition: serialize.hh:661
std::ostream CheckpointOut
Definition: serialize.hh:68
void clearConsoleInt() override
Clear a posted CPU interrupt (id=55)
Definition: malta.cc:66
Malta(const Params *p)
Definition: malta.cc:51
MaltaParams Params
Constructor for the Malta Class.
Definition: malta.hh:84
void postConsoleInt() override
Cause the cpu to post a serial interrupt to the CPU.
Definition: malta.cc:59
Bitfield< 0 > p
int intr_sum_type[Malta::Max_CPUs]
Definition: malta.hh:74
virtual Addr pciToDma(Addr pciAddr) const
Definition: malta.cc:85
Malta I/O Space mapping including RTC/timer interrupts.
Declaration of top level class for the Malta chipset.

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