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arch
power
interrupts.hh
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2011 Google
3
* All rights reserved.
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*
5
* Redistribution and use in source and binary forms, with or without
6
* modification, are permitted provided that the following conditions are
7
* met: redistributions of source code must retain the above copyright
8
* notice, this list of conditions and the following disclaimer;
9
* redistributions in binary form must reproduce the above copyright
10
* notice, this list of conditions and the following disclaimer in the
11
* documentation and/or other materials provided with the distribution;
12
* neither the name of the copyright holders nor the names of its
13
* contributors may be used to endorse or promote products derived from
14
* this software without specific prior written permission.
15
*
16
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
*
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* Authors: Gabe Black
29
*/
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31
#ifndef __ARCH_POWER_INTERRUPT_HH__
32
#define __ARCH_POWER_INTERRUPT_HH__
33
34
#include "
arch/generic/interrupts.hh
"
35
#include "
base/logging.hh
"
36
#include "params/PowerInterrupts.hh"
37
38
class
BaseCPU
;
39
class
ThreadContext
;
40
41
namespace
PowerISA
{
42
43
class
Interrupts
:
public
BaseInterrupts
44
{
45
private
:
46
BaseCPU
*
cpu
;
47
48
public
:
49
typedef
PowerInterruptsParams
Params
;
50
51
const
Params *
52
params
()
const
53
{
54
return
dynamic_cast<
const
Params *
>
(
_params
);
55
}
56
57
Interrupts
(Params *
p
) :
BaseInterrupts
(p), cpu(NULL)
58
{}
59
60
void
61
setCPU
(
BaseCPU
* _cpu)
62
{
63
cpu = _cpu;
64
}
65
66
void
67
post
(
int
int_num,
int
index
)
68
{
69
panic
(
"Interrupts::post not implemented.\n"
);
70
}
71
72
void
73
clear
(
int
int_num,
int
index
)
74
{
75
panic
(
"Interrupts::clear not implemented.\n"
);
76
}
77
78
void
79
clearAll
()
80
{
81
panic
(
"Interrupts::clearAll not implemented.\n"
);
82
}
83
84
bool
85
checkInterrupts
(
ThreadContext
*tc)
const
86
{
87
panic
(
"Interrupts::checkInterrupts not implemented.\n"
);
88
}
89
90
Fault
91
getInterrupt
(
ThreadContext
*tc)
92
{
93
assert(
checkInterrupts
(tc));
94
panic
(
"Interrupts::getInterrupt not implemented.\n"
);
95
}
96
97
void
98
updateIntrInfo
(
ThreadContext
*tc)
99
{
100
panic
(
"Interrupts::updateIntrInfo not implemented.\n"
);
101
}
102
};
103
104
}
// namespace PowerISA
105
106
#endif // __ARCH_POWER_INTERRUPT_HH__
107
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition:
logging.hh:167
logging.hh
interrupts.hh
MipsISA::index
Bitfield< 30, 0 > index
Definition:
pra_constants.hh:46
PowerISA::Interrupts::clear
void clear(int int_num, int index)
Definition:
interrupts.hh:73
PowerISA::Interrupts::clearAll
void clearAll()
Definition:
interrupts.hh:79
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU...
Definition:
thread_context.hh:93
PowerISA::Interrupts
Definition:
interrupts.hh:43
BaseInterrupts
Definition:
interrupts.hh:39
PowerISA::Interrupts::getInterrupt
Fault getInterrupt(ThreadContext *tc)
Definition:
interrupts.hh:91
PowerISA::Interrupts::checkInterrupts
bool checkInterrupts(ThreadContext *tc) const
Definition:
interrupts.hh:85
PowerISA::Interrupts::Params
PowerInterruptsParams Params
Definition:
interrupts.hh:49
PowerISA
Definition:
decoder.cc:33
PowerISA::Interrupts::updateIntrInfo
void updateIntrInfo(ThreadContext *tc)
Definition:
interrupts.hh:98
PowerISA::Interrupts::setCPU
void setCPU(BaseCPU *_cpu)
Definition:
interrupts.hh:61
PowerISA::Interrupts::cpu
BaseCPU * cpu
Definition:
interrupts.hh:46
SimObject::_params
const SimObjectParams * _params
Cached copy of the object parameters.
Definition:
sim_object.hh:110
PowerISA::Interrupts::post
void post(int int_num, int index)
Definition:
interrupts.hh:67
BaseCPU
Definition:
cpu_dummy.hh:45
PowerISA::Interrupts::Interrupts
Interrupts(Params *p)
Definition:
interrupts.hh:57
PowerISA::Interrupts::params
const Params * params() const
Definition:
interrupts.hh:52
MipsISA::p
Bitfield< 0 > p
Definition:
pra_constants.hh:325
Fault
std::shared_ptr< FaultBase > Fault
Definition:
types.hh:240
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