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38 #ifndef __DEV_ARM_GENERIC_TIMER_HH__
39 #define __DEV_ARM_GENERIC_TIMER_HH__
58 class SystemCounterParams;
59 class GenericTimerParams;
60 class GenericTimerFrameParams;
61 class GenericTimerMemParams;
70 virtual void notify(
void) = 0;
179 const std::string _name;
214 std::string
name()
const {
return _name; }
234 uint64_t
value()
const;
239 void notify(
void)
override;
279 const GenericTimerParams *
params()
const;
340 return ret_val + incr_val;
351 void notify(
void)
override;
479 AccessBits accessBits;
488 AccessBitsEl0 accessBitsEl0;
532 static const
Addr COUNTER_CTRL_CNTCR = 0x00;
578 #endif // __DEV_ARM_GENERIC_TIMER_HH__
static const Addr TIMER_CTRL_CNTVOFF_LO
AddrRangeList getAddrRanges() const override
Every PIO device is obliged to provide an implementation that returns the address ranges the device r...
const ArmInterruptPin * irqVirt
void setTimerValue(uint32_t val)
Sets the TimerValue view of the timer.
std::string name() const
Returns the timer name.
uint64_t eventTargetValue(uint64_t val) const
uint64_t _increment
Value increment in each counter cycle.
void handleStream(CoreTimers::EventStream *ev_stream, ArchTimer *timer, RegVal old_cnt_ctl, RegVal cnt_ctl)
void timerCtrlWrite(Addr addr, size_t size, uint64_t data, bool is_sec)
ArmISA::CNTKCTL cntkctl
Kernel control register.
ArchTimerKvm(const std::string &name, ArmSystem &system, SimObject &parent, SystemCounter &sysctr, ArmInterruptPin *interrupt)
ArmSystem & system
ARM system containing this timer.
Tick whenValue(uint64_t target_val)
Returns the tick at which a certain counter value is reached.
std::vector< SystemCounterListener * > _listeners
Listeners to changes in counting speed.
BitUnion32(ArchTimerCtrl) Bitfield< 0 > enable
Control register.
const AddrRange timerRange
uint32_t cnttidr
ID register for reporting features of implemented timer frames.
const AddrRange counterStatusRange
ArchTimer physTimer
Physical and virtual timers.
EndBitUnion(ArchTimerCtrl) const std SimObject & _parent
Name of this timer.
RegVal readMiscReg(int misc_reg) override
Read a system register belonging to this device.
Base class for devices that use the MiscReg interfaces.
static const Addr COUNTER_CTRL_CNTID
void disable()
Disables the counter after a CNTCR.EN == 0.
ArchTimer(const std::string &name, SimObject &parent, SystemCounter &sysctr, ArmInterruptPin *interrupt)
static const Addr TIMER_CNTP_TVAL
BitUnion16(AccessBitsEl0) Bitfield< 9 > pten
static const Addr COUNTER_CTRL_CNTCV_LO
Basic support for object serialization.
bool hasReadableVoff() const
Indicates if CNTVOFF is readable for this frame.
void setVirtOffset(uint64_t new_offset)
Sets the virtual offset for this frame's virtual timer after a write to CNTVOFF.
void serialize(CheckpointOut &cp) const override
Serialize an object.
SystemCounter & systemCounter
System counter reference.
uint32_t _freq
Counter frequency (as specified by CNTFRQ).
void eventStreamCallback() const
Per-CPU architected timer.
void counterStatusWrite(Addr addr, size_t size, uint64_t data)
void unserialize(CheckpointIn &cp) override
Unserialize an object.
uint32_t freq() const
Returns the counter frequency.
bool hasEl0View() const
Indicates if this frame implements a second EL0 view.
uint64_t Tick
Tick count type.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
static void validateCounterRef(SystemCounter *sys_cnt)
Validates a System Counter reference.
ArchTimerCtrl _control
Value of the control register ({CNTP/CNTHP/CNTV}_CTL).
uint64_t timerRead(Addr addr, size_t size, bool is_sec, bool to_el0) const
CNTBase/CNTEL0Base (Memory-mapped timer frame)
void updateCounter()
Timer settings or the offset has changed, re-evaluate trigger condition and raise interrupt if necess...
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
static const Addr TIMER_CNTEL0ACR
uint32_t timerValue() const
Returns the TimerValue view of the timer.
size_t activeFreqEntry() const
Returns the currently active frequency table entry.
const ArmInterruptPin * irqPhysS
bool validKvmEnvironment() const
Verify gem5 configuration will support KVM emulation.
T mbits(T val, int first, int last)
Mask off the given bits in place like bits() but without shifting.
bool scheduleEvents() override
static const Addr COUNTER_STATUS_CNTCV_HI
static const Addr COUNTER_STATUS_CNTCV_LO
void setOffset(uint64_t val)
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Tick _updateTick
Counter cycle start Tick when the counter status affecting its value has been updated.
const AddrRange timerCtrlRange
void updateTick(void)
Updates the update tick, normalizes to the lower cycle start tick.
EndBitUnion(AccessBits) AccessBits accessBits
void notify(void) override
Called from the SystemCounter when a change in counting speed occurred Events should be rescheduled p...
const AddrRange counterCtrlRange
AddrRangeList addrRanges
All MMIO ranges GenericTimerFrame responds to.
void serialize(CheckpointOut &cp) const override
Serialize an object.
static bool validateAccessPerm(ArmSystem &sys, bool is_sec)
Validates an MMIO access permissions.
static const Addr TIMER_CNTPCT_LO
void schedNextEvent(EventStream &ev_stream, ArchTimer &timer)
Tick _period
Cached copy of the counter period (inverse of the frequency).
ArmISA::CNTHCTL cnthctl
Hypervisor control register.
std::vector< uint32_t > _freqTable
Frequency modes table with all possible frequencies for the counter.
void physEventStreamCallback()
void timerWrite(Addr addr, size_t size, uint64_t data, bool is_sec, bool to_el0)
DrainState
Object drain/handover states.
void setCompareValue(uint64_t val)
Sets the CompareValue view of the timer.
static const Addr TIMER_CTRL_CNTNSAR
void freqUpdateCallback()
Callback for the frequency update.
void enable()
Enables the counter after a CNTCR.EN == 1.
This device is the base class which all devices senstive to an address range inherit from.
static const Addr TIMER_CNTVOFF_HI
static constexpr size_t MAX_TIMER_FRAMES
Maximum architectural number of memory-mapped timer frames.
ThreadContext is the external interface to all thread state for anything outside of the CPU.
bool hasVirtualTimer() const
Indicates if this frame implements a virtual timer.
Interface for objects that might require draining before checkpointing.
DrainState drain() override
Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are pa...
static const Addr TIMER_CNTP_CVAL_HI
The AddrRange class encapsulates an address range, and supports a number of tests to check if two ran...
uint64_t counterStatusRead(Addr addr, size_t size) const
CNTReadBase (System counter status frame)
const GenericTimerParams * params() const
uint64_t increment() const
Returns the value increment.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
GenericTimer & parent
Generic Timer parent reference.
std::vector< GenericTimerFrame * > frames
Timer frame references.
static const Addr COUNTER_CTRL_CNTCV_HI
static const Addr TIMER_CNTP_CVAL_LO
void unserialize(CheckpointIn &cp) override
Unserialize an object.
static const Addr TIMER_CNTP_CTL
static const Addr TIMER_CNTV_TVAL
uint64_t compareValue() const
Returns the CompareValue view of the timer.
EventFunctionWrapper _freqUpdateEvent
Frequency update event handling.
void registerListener(SystemCounterListener *listener)
Called from System Counter Listeners to register.
void counterCtrlWrite(Addr addr, size_t size, uint64_t data, bool is_sec)
void notify(void) override
Called from the SystemCounter when a change in counting speed occurred Events should be rescheduled p...
AddrRangeList getAddrRanges() const override
Every PIO device is obliged to provide an implementation that returns the address ranges the device r...
SystemCounter(SystemCounterParams *const p)
GenericTimerMem(GenericTimerMemParams *const p)
static const Addr TIMER_CNTFRQ
RegVal readMiscReg(int misc_reg, unsigned cpu)
const ArmInterruptPin * irqPhysNS
static void validateFrameRange(const AddrRange &range)
Validates a Generic Timer register frame address range.
void serialize(CheckpointOut &cp) const override
Serialize an object.
EventFunctionWrapper event
CoreTimers & getTimers(int cpu_id)
uint64_t value() const
Returns the value of the counter which this timer relies on.
uint64_t counterCtrlRead(Addr addr, size_t size, bool is_sec) const
CNTControlBase (System counter control frame)
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
BitUnion8(AccessBits) Bitfield< 5 > rwpt
Reports access properties of the CNTBase register frame elements.
static constexpr size_t MAX_FREQ_ENTRIES
Maximum architectural number of frequency table entries.
uint64_t value()
Updates and returns the counter value.
void notifyListeners(void) const
Notifies counting speed changes to listeners.
bool enabled() const
Indicates if the counter is enabled.
SystemCounter & _systemCounter
static const Addr TIMER_CNTVCT_HI
uint32_t control() const
Sets the control register.
static const Addr TIMER_CNTV_CVAL_HI
Abstract class for elements whose events depend on the counting speed of the System Counter.
static const Addr COUNTER_CTRL_CNTSR
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
bool _enabled
Indicates if the counter is enabled.
void setValue(uint64_t new_value)
Sets the value explicitly from writes to CNTCR.CNTCV.
const ArmInterruptPin * irqHyp
uint8_t getAccessBits() const
Returns the access bits for this frame.
void counterLimitReached()
Called when the upcounter reaches the programmed value.
size_t _activeFreqEntry
Currently selected entry in the table, its contents should match _freq.
void updateValue(void)
Updates the counter value.
static const Addr COUNTER_CTRL_CNTSCR
static const Addr TIMER_CNTVCT_LO
void drainResume() override
Resume execution after a successful drain.
ArmInterruptPin *const _interrupt
virtual bool scheduleEvents()
EndBitUnion(CNTCR) BitUnion32(CNTSR) Bitfield< 31
void setControl(uint32_t val)
Overload hash function for BasicBlockRange type.
GenericTimer(GenericTimerParams *const p)
bool nonSecureAccess
Reports whether non-secure accesses are allowed to this frame.
uint32_t cntfrq
System counter frequency as visible from this core.
static const Addr TIMER_CNTVOFF_LO
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
void serialize(CheckpointOut &cp) const override
Serialize an object.
Generic representation of an Arm interrupt pin.
GenericTimerISA(GenericTimer &_parent, unsigned _cpu)
bool hasNonSecureAccess() const
Indicates if non-secure accesses are allowed to this frame.
void setMiscReg(int misc_reg, RegVal val) override
Write to a system register belonging to this device.
uint64_t _value
Counter value (as specified in CNTCV).
Tick period() const
Returns the counter period.
ThreadContext * threadContext
Thread (HW) context associated to this PE implementation.
virtual void notify(void)=0
Called from the SystemCounter when a change in counting speed occurred Events should be rescheduled p...
std::ostream CheckpointOut
static const Addr TIMER_CTRL_CNTTIDR
CoreTimers(GenericTimer &_parent, ArmSystem &system, unsigned cpu, ArmInterruptPin *_irqPhysS, ArmInterruptPin *_irqPhysNS, ArmInterruptPin *_irqVirt, ArmInterruptPin *_irqHyp)
uint64_t _offset
Offset relative to the physical timer (CNTVOFF)
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
void serialize(CheckpointOut &cp) const override
Serialize an object.
BitUnion32(CNTCR) Bitfield< 17
EventFunctionWrapper _counterLimitReachedEvent
SystemCounter & systemCounter
System counter reference.
uint64_t getVirtOffset() const
Returns the virtual offset for this frame if a virtual timer is implemented.
static const Addr TIMER_CTRL_CNTACR
void setNonSecureAccess()
Allows non-secure accesses after an enabling write to CNTCTLBase.CNTNSAR.
uint64_t _counterLimit
Programmed limit value for the upcounter ({CNTP/CNTHP/CNTV}_CVAL).
void virtEventStreamCallback()
void createTimers(unsigned cpus)
GenericTimerFrame(GenericTimerFrameParams *const p)
EndBitUnion(UserDescFlags) struct UserDesc32
Tick whenValue(uint64_t target_val)
static const Addr TIMER_CTRL_CNTVOFF_HI
void setMiscReg(int misc_reg, unsigned cpu, RegVal val)
void setAccessBits(uint8_t data)
Updates the access bits after a write to CNTCTLBase.CNTACR.
uint64_t timerCtrlRead(Addr addr, size_t size, bool is_sec) const
CNTCTLBase (Memory-mapped timer global control frame)
static const Addr TIMER_CNTV_CTL
static const Addr TIMER_CTRL_CNTFRQ
void freqUpdateSchedule(size_t new_freq_entry)
Schedules a counter frequency update after a CNTCR.FCREQ == 1 This complies with frequency transition...
std::vector< uint32_t > & freqTable()
Returns a reference to the frequency modes table.
static const Addr TIMER_CNTV_CVAL_LO
const AddrRangeList addrRanges
All MMIO ranges GenericTimerMem responds to.
std::vector< std::unique_ptr< CoreTimers > > timers
Per-CPU physical architected timers.
SystemCounter & systemCounter
System counter reference.
T bits(T val, int first, int last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Abstract superclass for simulation objects.
static const Addr TIMER_CNTPCT_HI
static const Addr COUNTER_CTRL_CNTFID
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