tlb.cc

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#include "arch/arm/fastmodel/iris/tlb.hh"
 
#include "arch/arm/fastmodel/iris/thread_context.hh"
#include "arch/generic/debugfaults.hh"
#include "params/IrisTLB.hh"
#include "sim/faults.hh"
 
namespace gem5
{
 
Fault
Iris::TLB::translateFunctional(
        const RequestPtr &req, gem5::ThreadContext *tc, BaseMMU::Mode mode)
{
    auto *itc = dynamic_cast<Iris::ThreadContext *>(tc);
    panic_if(!itc, "Failed to cast to Iris::ThreadContext *");
 
    Addr vaddr = req->getVaddr();
    Addr paddr = 0;
    bool success = itc->translateAddress(paddr, vaddr);
    if (!success) {
        return std::make_shared<GenericISA::M5PanicFault>(
                "Failed translation");
    } else {
        req->setPaddr(paddr);
        return NoFault;
    }
}
 
Fault
Iris::TLB::translateAtomic(
        const RequestPtr &req, gem5::ThreadContext *tc, BaseMMU::Mode mode)
{
    return translateFunctional(req, tc, mode);
}
 
void
Iris::TLB::translateTiming(const RequestPtr &req, gem5::ThreadContext *tc,
        BaseMMU::Translation *translation, BaseMMU::Mode mode)
{
    assert(translation);
    translation->finish(translateAtomic(req, tc, mode), req, tc, mode);
}
 
} // namespace gem5