gem5  v22.0.0.2
tlb.cc
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27 
29 
32 #include "params/IrisTLB.hh"
33 #include "sim/faults.hh"
34 
35 namespace gem5
36 {
37 
38 Fault
41 {
42  auto *itc = dynamic_cast<Iris::ThreadContext *>(tc);
43  panic_if(!itc, "Failed to cast to Iris::ThreadContext *");
44 
45  Addr vaddr = req->getVaddr();
46  Addr paddr = 0;
47  bool success = itc->translateAddress(paddr, vaddr);
48  if (!success) {
49  return std::make_shared<GenericISA::M5PanicFault>(
50  "Failed translation");
51  } else {
52  req->setPaddr(paddr);
53  return NoFault;
54  }
55 }
56 
57 Fault
60 {
61  return translateFunctional(req, tc, mode);
62 }
63 
64 void
67 {
68  assert(translation);
69  translation->finish(translateAtomic(req, tc, mode), req, tc, mode);
70 }
71 
72 } // namespace gem5
gem5::NoFault
constexpr decltype(nullptr) NoFault
Definition: types.hh:253
gem5::BaseMMU::Mode
Mode
Definition: mmu.hh:56
faults.hh
gem5::Iris::TLB::translateFunctional
Fault translateFunctional(const RequestPtr &req, gem5::ThreadContext *tc, BaseMMU::Mode mode) override
Definition: tlb.cc:39
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:94
gem5::Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:248
gem5::Iris::ThreadContext
Definition: thread_context.hh:53
gem5::RequestPtr
std::shared_ptr< Request > RequestPtr
Definition: request.hh:92
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::Iris::TLB::translateAtomic
Fault translateAtomic(const RequestPtr &req, gem5::ThreadContext *tc, BaseMMU::Mode mode) override
Definition: tlb.cc:58
tlb.hh
gem5::Iris::TLB::translateTiming
void translateTiming(const RequestPtr &req, gem5::ThreadContext *tc, BaseMMU::Translation *translation, BaseMMU::Mode mode) override
Definition: tlb.cc:65
gem5::BaseMMU::Translation
Definition: mmu.hh:58
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:204
gem5::MipsISA::vaddr
vaddr
Definition: pra_constants.hh:278
debugfaults.hh
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
thread_context.hh
gem5::BaseMMU::Translation::finish
virtual void finish(const Fault &fault, const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode)=0
gem5::ArmISA::mode
Bitfield< 4, 0 > mode
Definition: misc_types.hh:74

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