gem5  v22.1.0.0
armv8_cpu.hh
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37 
38 #ifndef __ARCH_ARM_KVM_ARMV8_CPU_HH__
39 #define __ARCH_ARM_KVM_ARMV8_CPU_HH__
40 
41 #include <set>
42 #include <vector>
43 
44 #include "arch/arm/kvm/base_cpu.hh"
45 #include "arch/arm/regs/int.hh"
46 #include "arch/arm/regs/misc.hh"
47 
48 namespace gem5
49 {
50 
51 struct ArmV8KvmCPUParams;
52 
82 class ArmV8KvmCPU : public BaseArmKvmCPU
83 {
84  public:
85  ArmV8KvmCPU(const ArmV8KvmCPUParams &params);
86  virtual ~ArmV8KvmCPU();
87 
88  void startup() override;
89 
90  void dump() const override;
91 
92  protected:
93  void updateKvmState() override;
94  void updateThreadContext() override;
95 
96  protected:
98  struct IntRegInfo
99  {
100  IntRegInfo(uint64_t _kvm, RegIndex _idx, const char *_name)
101  : kvm(_kvm), idx(_idx), name(_name) {}
102 
104  uint64_t kvm;
108  const char *name;
109  };
110 
112  struct MiscRegInfo
113  {
114  MiscRegInfo(uint64_t _kvm, ArmISA::MiscRegIndex _idx,
115  const char *_name, bool _is_device = false)
116  : kvm(_kvm), idx(_idx), name(_name), is_device(_is_device) {}
117 
119  uint64_t kvm;
123  const char *name;
125  bool is_device;
126  };
127 
139 
145  static const std::set<ArmISA::MiscRegIndex> deviceRegSet;
148 
151 };
152 
153 } // namespace gem5
154 
155 #endif // __ARCH_ARM_KVM_ARMV8_CPU_HH__
This is an implementation of a KVM-based ARMv8-compatible CPU.
Definition: armv8_cpu.hh:83
void updateKvmState() override
Update the KVM state from the current thread context.
Definition: armv8_cpu.cc:225
static const std::set< ArmISA::MiscRegIndex > deviceRegSet
Device registers (needing "effectful" MiscReg writes)
Definition: armv8_cpu.hh:145
void dump() const override
Dump the internal state to the terminal.
Definition: armv8_cpu.cc:158
ArmV8KvmCPU(const ArmV8KvmCPUParams &params)
Definition: armv8_cpu.cc:135
static const std::vector< ArmV8KvmCPU::IntRegInfo > intRegMap
Mapping between gem5 integer registers and integer registers in kvm.
Definition: armv8_cpu.hh:141
static const std::vector< ArmV8KvmCPU::MiscRegInfo > miscRegMap
Mapping between gem5 misc registers and registers in kvm.
Definition: armv8_cpu.hh:143
const std::vector< ArmV8KvmCPU::MiscRegInfo > & getSysRegMap() const
Get a map between system registers in kvm and gem5 registers.
Definition: armv8_cpu.cc:376
void startup() override
startup() is the final initialization call before simulation.
Definition: armv8_cpu.cc:145
std::vector< ArmV8KvmCPU::MiscRegInfo > sysRegMap
Cached mapping between system registers in kvm and misc regs in gem5.
Definition: armv8_cpu.hh:150
virtual ~ArmV8KvmCPU()
Definition: armv8_cpu.cc:140
static const std::vector< ArmV8KvmCPU::MiscRegInfo > miscRegIdMap
Mapping between gem5 ID misc registers and registers in kvm.
Definition: armv8_cpu.hh:147
void updateThreadContext() override
Update the current thread context with the KVM state.
Definition: armv8_cpu.cc:295
const std::string _name
Definition: named.hh:41
STL vector class.
Definition: stl.hh:37
const Params & params() const
Definition: sim_object.hh:176
MiscRegIndex
Definition: misc.hh:64
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint16_t RegIndex
Definition: types.hh:176
Mapping between integer registers in gem5 and KVM.
Definition: armv8_cpu.hh:99
IntRegInfo(uint64_t _kvm, RegIndex _idx, const char *_name)
Definition: armv8_cpu.hh:100
RegIndex idx
Register index in gem5.
Definition: armv8_cpu.hh:106
uint64_t kvm
Register index in KVM.
Definition: armv8_cpu.hh:104
const char * name
Name to use in debug dumps.
Definition: armv8_cpu.hh:108
Mapping between misc registers in gem5 and registers in KVM.
Definition: armv8_cpu.hh:113
MiscRegInfo(uint64_t _kvm, ArmISA::MiscRegIndex _idx, const char *_name, bool _is_device=false)
Definition: armv8_cpu.hh:114
ArmISA::MiscRegIndex idx
Register index in gem5.
Definition: armv8_cpu.hh:121
const char * name
Name to use in debug dumps.
Definition: armv8_cpu.hh:123
uint64_t kvm
Register index in KVM.
Definition: armv8_cpu.hh:119
bool is_device
is device register? (needs 'effectful' state update)
Definition: armv8_cpu.hh:125

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