gem5  v22.1.0.0
base_cpu.hh
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37 
38 #ifndef __ARCH_ARM_KVM_BASE_CPU_HH__
39 #define __ARCH_ARM_KVM_BASE_CPU_HH__
40 
41 #include <vector>
42 
43 #include "arch/arm/pcstate.hh"
44 #include "cpu/kvm/base.hh"
45 #include "dev/arm/base_gic.hh"
46 
47 struct kvm_reg_list;
48 struct kvm_vcpu_init;
49 
50 namespace gem5
51 {
52 
53 struct BaseArmKvmCPUParams;
54 
55 class BaseArmKvmCPU : public BaseKvmCPU
56 {
57  public:
58  BaseArmKvmCPU(const BaseArmKvmCPUParams &params);
59  virtual ~BaseArmKvmCPU();
60 
61  void startup() override;
62 
63  protected:
64  Tick kvmRun(Tick ticks) override;
65 
66  void
67  stutterPC(PCStateBase &pc) const override
68  {
69  pc.as<ArmISA::PCState>().setNPC(pc.instAddr());
70  }
71 
73  void ioctlRun() override;
74 
79 
86 
96 
97  protected:
99 
110  const RegIndexVector &getRegList() const;
111 
122  void kvmArmVCpuInit(const kvm_vcpu_init &init);
123 
124  private:
125  std::unique_ptr<kvm_reg_list> tryGetRegList(uint64_t nelem) const;
126 
134  bool getRegList(kvm_reg_list &regs) const;
135 
140 };
141 
142 } // namespace gem5
143 
144 #endif // __ARCH_ARM_KVM_BASE_CPU_HH__
Base class for ARM GIC implementations.
Generic representation of an Arm interrupt pin.
Definition: base_gic.hh:200
std::vector< uint64_t > RegIndexVector
Definition: base_cpu.hh:98
Tick kvmRun(Tick ticks) override
Request KVM to run the guest for a given number of ticks.
Definition: base_cpu.cc:117
void ioctlRun() override
Override for synchronizing state in kvm_run.
Definition: base_cpu.cc:171
bool fiqAsserted
Cached state of the FIQ line.
Definition: base_cpu.hh:78
bool irqAsserted
Cached state of the IRQ line.
Definition: base_cpu.hh:76
const RegIndexVector & getRegList() const
Get a list of registers supported by getOneReg() and setOneReg().
Definition: base_cpu.cc:191
void startup() override
startup() is the final initialization call before simulation.
Definition: base_cpu.cc:94
uint64_t prevDeviceIRQLevel
KVM records whether each in-kernel device IRQ is asserted or disasserted in the kvmRunState->s....
Definition: base_cpu.hh:95
BaseArmKvmCPU(const BaseArmKvmCPUParams &params)
Definition: base_cpu.cc:82
void stutterPC(PCStateBase &pc) const override
Modify a PCStatePtr's value so that its next PC is the current PC.
Definition: base_cpu.hh:67
RegIndexVector _regIndexList
Cached copy of the list of registers supported by KVM.
Definition: base_cpu.hh:139
virtual ~BaseArmKvmCPU()
Definition: base_cpu.cc:89
ArmInterruptPin * virtTimerPin
If the user-space GIC and the kernel-space timer are used simultaneously, set up this interrupt pin t...
Definition: base_cpu.hh:85
std::unique_ptr< kvm_reg_list > tryGetRegList(uint64_t nelem) const
void kvmArmVCpuInit(const kvm_vcpu_init &init)
Tell the kernel to initialize this CPU.
Definition: base_cpu.cc:220
Base class for KVM based CPU models.
Definition: base.hh:88
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: base.cc:109
const Params & params() const
Definition: sim_object.hh:176
Bitfield< 4 > pc
GenericISA::DelaySlotPCState< 4 > PCState
Definition: pcstate.hh:40
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Tick
Tick count type.
Definition: types.hh:58

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