gem5  v22.0.0.2
Classes | Public Member Functions | Protected Member Functions | Protected Attributes | Static Protected Attributes | List of all members
gem5::ArmV8KvmCPU Class Reference

This is an implementation of a KVM-based ARMv8-compatible CPU. More...

#include <armv8_cpu.hh>

Inheritance diagram for gem5::ArmV8KvmCPU:
gem5::BaseArmKvmCPU gem5::BaseKvmCPU


struct  IntRegInfo
 Mapping between integer registers in gem5 and KVM. More...
struct  MiscRegInfo
 Mapping between misc registers in gem5 and registers in KVM. More...

Public Member Functions

 ArmV8KvmCPU (const ArmV8KvmCPUParams &params)
virtual ~ArmV8KvmCPU ()
void startup () override
void dump () const override
 Dump the internal state to the terminal. More...
- Public Member Functions inherited from gem5::BaseArmKvmCPU
 BaseArmKvmCPU (const BaseArmKvmCPUParams &params)
virtual ~BaseArmKvmCPU ()
void startup () override
- Public Member Functions inherited from gem5::BaseKvmCPU
 BaseKvmCPU (const BaseKvmCPUParams &params)
virtual ~BaseKvmCPU ()
void init () override
void startup () override
void serializeThread (CheckpointOut &cp, ThreadID tid) const override
void unserializeThread (CheckpointIn &cp, ThreadID tid) override
DrainState drain () override
void drainResume () override
void notifyFork () override
void switchOut () override
void takeOverFrom (BaseCPU *cpu) override
void verifyMemoryMode () const override
PortgetDataPort () override
PortgetInstPort () override
void wakeup (ThreadID tid=0) override
void activateContext (ThreadID thread_num) override
void suspendContext (ThreadID thread_num) override
void deallocateContext (ThreadID thread_num)
void haltContext (ThreadID thread_num) override
long getVCpuID () const
ThreadContextgetContext (int tn) override
Counter totalInsts () const override
Counter totalOps () const override
void finishMMIOPending ()
 Callback from KvmCPUPort to transition the CPU out of RunningMMIOPending when all timing requests have completed. More...
void kick () const
 Force an exit from KVM. More...

Protected Member Functions

void updateKvmState () override
 Update the KVM state from the current thread context. More...
void updateThreadContext () override
 Update the current thread context with the KVM state. More...
const std::vector< ArmV8KvmCPU::MiscRegInfo > & getSysRegMap () const
 Get a map between system registers in kvm and gem5 registers. More...
- Protected Member Functions inherited from gem5::BaseArmKvmCPU
Tick kvmRun (Tick ticks) override
 Request KVM to run the guest for a given number of ticks. More...
void stutterPC (PCStateBase &pc) const override
 Modify a PCStatePtr's value so that its next PC is the current PC. More...
void ioctlRun () override
 Override for synchronizing state in kvm_run. More...
const RegIndexVectorgetRegList () const
 Get a list of registers supported by getOneReg() and setOneReg(). More...
void kvmArmVCpuInit (const kvm_vcpu_init &init)
 Tell the kernel to initialize this CPU. More...
- Protected Member Functions inherited from gem5::BaseKvmCPU
void tick ()
 Execute the CPU until the next event in the main event queue or until the guest needs service from gem5. More...
virtual uint64_t getHostCycles () const
 Get the value of the hardware cycle counter in the guest. More...
virtual Tick kvmRunDrain ()
 Request the CPU to run until draining completes. More...
struct kvm_run * getKvmRunState ()
 Get a pointer to the kvm_run structure containing all the input and output parameters from kvmRun(). More...
uint8_t * getGuestData (uint64_t offset) const
 Retrieve a pointer to guest data stored at the end of the kvm_run structure. More...
void kvmNonMaskableInterrupt ()
 Send a non-maskable interrupt to the guest. More...
void kvmInterrupt (const struct kvm_interrupt &interrupt)
 Send a normal interrupt to the guest. More...
std::string getAndFormatOneReg (uint64_t id) const
 Get and format one register for printout. More...
virtual bool archIsDrained () const
 Is the architecture specific code in a state that prevents draining? More...
Tick doMMIOAccess (Addr paddr, void *data, int size, bool write)
 Inject a memory mapped IO request into gem5. More...
int ioctl (int request, long p1) const
 vCPU ioctl interface. More...
int ioctl (int request, void *p1) const
int ioctl (int request) const
void getRegisters (struct kvm_regs &regs) const
 Get/Set the register state of the guest vCPU. More...
void setRegisters (const struct kvm_regs &regs)
void getSpecialRegisters (struct kvm_sregs &regs) const
void setSpecialRegisters (const struct kvm_sregs &regs)
void getFPUState (struct kvm_fpu &state) const
 Get/Set the guest FPU/vector state. More...
void setFPUState (const struct kvm_fpu &state)
void setOneReg (uint64_t id, const void *addr)
 Get/Set single register using the KVM_(SET|GET)_ONE_REG API. More...
void setOneReg (uint64_t id, uint64_t value)
void setOneReg (uint64_t id, uint32_t value)
void getOneReg (uint64_t id, void *addr) const
uint64_t getOneRegU64 (uint64_t id) const
uint32_t getOneRegU32 (uint64_t id) const
void syncThreadContext ()
 Update a thread context if the KVM state is dirty with respect to the cached thread context. More...
EventQueuedeviceEventQueue ()
 Get a pointer to the event queue owning devices. More...
void syncKvmState ()
 Update the KVM if the thread context is dirty. More...
virtual Tick handleKvmExit ()
 Main kvmRun exit handler, calls the relevant handleKvmExit* depending on exit type. More...
virtual Tick handleKvmExitIO ()
 The guest performed a legacy IO request (out/inp on x86) More...
virtual Tick handleKvmExitHypercall ()
 The guest requested a monitor service using a hypercall. More...
virtual Tick handleKvmExitIRQWindowOpen ()
 The guest exited because an interrupt window was requested. More...
virtual Tick handleKvmExitUnknown ()
 An unknown architecture dependent error occurred when starting the vCPU. More...
virtual Tick handleKvmExitException ()
 An unhandled virtualization exception occured. More...
virtual Tick handleKvmExitFailEntry ()
 KVM failed to start the virtualized CPU. More...
void setSignalMask (const sigset_t *mask)
 Set the signal mask used in kvmRun() More...

Protected Attributes

std::vector< ArmV8KvmCPU::MiscRegInfosysRegMap
 Cached mapping between system registers in kvm and misc regs in gem5. More...
- Protected Attributes inherited from gem5::BaseArmKvmCPU
bool irqAsserted
 Cached state of the IRQ line. More...
bool fiqAsserted
 Cached state of the FIQ line. More...
 If the user-space GIC and the kernel-space timer are used simultaneously, set up this interrupt pin to forward interrupt from the timer to the GIC when timer IRQ level change is intercepted. More...
uint64_t prevDeviceIRQLevel
 KVM records whether each in-kernel device IRQ is asserted or disasserted in the kvmRunState->s.regs.device_irq_level bit map, and guarantees at least one KVM exit when the level changes. More...
- Protected Attributes inherited from gem5::BaseKvmCPU
Status _status
 CPU run state. More...
KVMCpuPort dataPort
 Port for data requests. More...
KVMCpuPort instPort
 Unused dummy port for the instruction interface. More...
const bool alwaysSyncTC
 Be conservative and always synchronize the thread context on KVM entry/exit. More...
bool threadContextDirty
 Is the gem5 context dirty? Set to true to force an update of the KVM vCPU state upon the next call to kvmRun(). More...
bool kvmStateDirty
 Is the KVM state dirty? Set to true to force an update of the KVM vCPU state upon the next call to kvmRun(). More...
long vcpuID
 KVM internal ID of the vCPU. More...
pthread_t vcpuThread
 ID of the vCPU thread. More...

Static Protected Attributes

static const std::vector< ArmV8KvmCPU::IntRegInfointRegMap
 Mapping between gem5 integer registers and integer registers in kvm. More...
static const std::vector< ArmV8KvmCPU::MiscRegInfomiscRegMap
 Mapping between gem5 misc registers and registers in kvm. More...
static const std::set< ArmISA::MiscRegIndexdeviceRegSet
 Device registers (needing "effectful" MiscReg writes) More...
static const std::vector< ArmV8KvmCPU::MiscRegInfomiscRegIdMap
 Mapping between gem5 ID misc registers and registers in kvm. More...

Additional Inherited Members

- Public Attributes inherited from gem5::BaseKvmCPU
 A cached copy of a thread's state in the form of a SimpleThread object. More...
 ThreadContext object, provides an interface for external objects to modify this thread's state. More...
gem5::BaseKvmCPU::StatGroup stats
Counter ctrInsts
 Number of instructions executed by the CPU. More...
- Protected Types inherited from gem5::BaseArmKvmCPU
typedef std::vector< uint64_t > RegIndexVector
- Protected Types inherited from gem5::BaseKvmCPU
enum  Status {
  Idle, Running, RunningService, RunningMMIOPending,

Detailed Description

This is an implementation of a KVM-based ARMv8-compatible CPU.

Known limitations:

Definition at line 82 of file armv8_cpu.hh.

Constructor & Destructor Documentation

◆ ArmV8KvmCPU()

gem5::ArmV8KvmCPU::ArmV8KvmCPU ( const ArmV8KvmCPUParams &  params)

Definition at line 132 of file

◆ ~ArmV8KvmCPU()

gem5::ArmV8KvmCPU::~ArmV8KvmCPU ( )

Definition at line 137 of file

Member Function Documentation

◆ dump()

void gem5::ArmV8KvmCPU::dump ( ) const

◆ getSysRegMap()

const std::vector< ArmV8KvmCPU::MiscRegInfo > & gem5::ArmV8KvmCPU::getSysRegMap ( ) const

Get a map between system registers in kvm and gem5 registers.

This method returns a mapping between system registers in kvm and misc regs in gem5. The actual mapping is only created the first time the method is called and stored in a cache (ArmV8KvmCPU::sysRegMap).

Vector of kvm<->misc reg mappings.

Definition at line 371 of file

References gem5::ArmISA::decodeAArch64SysReg(), deviceRegSet, EXTRACT_FIELD, gem5::BaseArmKvmCPU::getRegList(), gem5::ArmISA::MISCREG_HYP_NS_WR, gem5::ArmISA::MISCREG_IMPLEMENTED, gem5::ArmISA::MISCREG_MON_NS0_WR, gem5::ArmISA::MISCREG_MON_NS1_WR, gem5::ArmISA::MISCREG_PRI_NS_WR, gem5::ArmISA::MISCREG_PRI_S_WR, gem5::ArmISA::MISCREG_USR_NS_WR, gem5::ArmISA::MISCREG_USR_S_WR, gem5::ArmISA::MISCREG_WARN_NOT_FAIL, gem5::ArmISA::miscRegInfo, gem5::ArmISA::miscRegName, gem5::X86ISA::reg, sysRegMap, and gem5::X86ISA::type.

Referenced by updateKvmState(), and updateThreadContext().

◆ startup()

void gem5::ArmV8KvmCPU::startup ( )

◆ updateKvmState()

void gem5::ArmV8KvmCPU::updateKvmState ( )

◆ updateThreadContext()

void gem5::ArmV8KvmCPU::updateThreadContext ( )

Member Data Documentation

◆ deviceRegSet

const std::set< MiscRegIndex > gem5::ArmV8KvmCPU::deviceRegSet
Initial value:

Device registers (needing "effectful" MiscReg writes)

Definition at line 145 of file armv8_cpu.hh.

Referenced by getSysRegMap().

◆ intRegMap

const std::vector< ArmV8KvmCPU::IntRegInfo > gem5::ArmV8KvmCPU::intRegMap
Initial value:
= {
{ INT_REG(regs.sp), int_reg::Sp0, "SP(EL0)" },
{ INT_REG(sp_el1), int_reg::Sp1, "SP(EL1)" },

Mapping between gem5 integer registers and integer registers in kvm.

Definition at line 141 of file armv8_cpu.hh.

Referenced by dump(), updateKvmState(), and updateThreadContext().

◆ miscRegIdMap

const std::vector< ArmV8KvmCPU::MiscRegInfo > gem5::ArmV8KvmCPU::miscRegIdMap
Initial value:

Mapping between gem5 ID misc registers and registers in kvm.

Definition at line 147 of file armv8_cpu.hh.

Referenced by dump(), and startup().

◆ miscRegMap

const std::vector< ArmV8KvmCPU::MiscRegInfo > gem5::ArmV8KvmCPU::miscRegMap
Initial value:
= {
MiscRegInfo(INT_REG(elr_el1), MISCREG_ELR_EL1, "ELR(EL1)"),
MiscRegInfo(CORE_REG(fp_regs.fpsr, U32), MISCREG_FPSR, "FPSR"),
MiscRegInfo(CORE_REG(fp_regs.fpcr, U32), MISCREG_FPCR, "FPCR"),

Mapping between gem5 misc registers and registers in kvm.

Definition at line 143 of file armv8_cpu.hh.

Referenced by dump(), updateKvmState(), and updateThreadContext().

◆ sysRegMap

std::vector<ArmV8KvmCPU::MiscRegInfo> gem5::ArmV8KvmCPU::sysRegMap

Cached mapping between system registers in kvm and misc regs in gem5.

Definition at line 150 of file armv8_cpu.hh.

Referenced by getSysRegMap().

The documentation for this class was generated from the following files:
#define INT_REG(name)
Definition: misc.hh:760
Definition: misc.hh:63
#define SYS_MPIDR_EL1
Definition: misc.hh:769
Definition: misc.hh:1099
Definition: misc.hh:615
Definition: misc.hh:64
Definition: misc.hh:541
Definition: misc.hh:761
Definition: misc.hh:613
Definition: misc.hh:67
Definition: misc.hh:623
Definition: misc.hh:622
#define CORE_REG(name, size)
Definition: misc.hh:69

Generated on Thu Jul 28 2022 13:32:57 for gem5 by doxygen 1.8.17