#include <decoder.hh>

Inheritance diagram for gem5::RiscvISA::Decoder:

Public Member Functions
	Decoder (const RiscvDecoderParams &p)

void	reset () override

bool	compressed (ExtMachInst inst)

void	moreBytes (const PCStateBase &pc, Addr fetchPC) override
	Feed data to the decoder.

StaticInstPtr	decode (PCStateBase &nextPC) override
	Decode an instruction or fetch it from the code cache.

Public Member Functions inherited from gem5::InstDecoder
template<typename MoreBytesType >
	InstDecoder (const InstDecoderParams &params, MoreBytesType *mb_buf)

virtual StaticInstPtr	fetchRomMicroop (MicroPC micropc, StaticInstPtr curMacroop)

template<class Type >
Type &	as ()

template<class Type >
const Type &	as () const

virtual void	takeOverFrom (InstDecoder *old)
	Take over the state from an old decoder when switching CPUs.

void *	moreBytesPtr () const

size_t	moreBytesSize () const

Addr	pcMask () const

bool	instReady () const
	Is an instruction ready to be decoded?

bool	needMoreBytes () const
	Can the decoder accept more data?

Public Member Functions inherited from gem5::SimObject
const Params &	params () const

	SimObject (const Params &p)

virtual	~SimObject ()

virtual void	init ()
	init() is called after all C++ SimObjects have been created and all ports are connected.

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint.

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint.

virtual void	regProbePoints ()
	Register probe points for this object.

virtual void	regProbeListeners ()
	Register probe listeners for this object.

ProbeManager *	getProbeManager ()
	Get the probe manager for this object.

virtual Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID)
	Get a port with a given name and index.

virtual void	startup ()
	startup() is the final initialization call before simulation.

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining.

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes.

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers.

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

Public Member Functions inherited from gem5::EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue.

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from gem5::Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section.

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object.

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from gem5::Drainable
DrainState	drainState () const
	Return the current drain state of an object.

virtual void	notifyFork ()
	Notify a child process of a fork.

Public Member Functions inherited from gem5::statistics::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group.

virtual	~Group ()

virtual void	regStats ()
	Callback to set stat parameters.

virtual void	resetStats ()
	Callback to reset stats.

virtual void	preDumpStats ()
	Callback before stats are dumped.

void	addStat (statistics::Info *info)
	Register a stat with this group.

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object.

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object.

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block.

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group.

void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block.

	Group ()=delete

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Public Member Functions inherited from gem5::Named
	Named (const std::string &name_)

virtual	~Named ()=default

virtual std::string	name () const

Protected Member Functions
virtual StaticInstPtr	decodeInst (ExtMachInst mach_inst)

StaticInstPtr	decode (ExtMachInst mach_inst, Addr addr)
	Decode a machine instruction.

Protected Member Functions inherited from gem5::Drainable
	Drainable ()

virtual	~Drainable ()

virtual void	drainResume ()
	Resume execution after a successful drain.

void	signalDrainDone () const
	Signal that an object is drained.

Protected Attributes
ExtMachInst	emi

uint32_t	machInst

uint32_t	vlen

uint32_t	elen

Protected Attributes inherited from gem5::InstDecoder
void *	_moreBytesPtr

size_t	_moreBytesSize

Addr	_pcMask

bool	instDone = false

bool	outOfBytes = true

Protected Attributes inherited from gem5::SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters.

Protected Attributes inherited from gem5::EventManager
EventQueue *	eventq
	A pointer to this object's event queue.

Private Attributes
decode_cache::InstMap< ExtMachInst >	instMap

bool	aligned

bool	mid

Additional Inherited Members
Public Types inherited from gem5::SimObject
typedef SimObjectParams	Params

Static Public Member Functions inherited from gem5::SimObject
static void	serializeAll (const std::string &cpt_dir)
	Create a checkpoint by serializing all SimObjects in the system.

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it.

static void	setSimObjectResolver (SimObjectResolver *resolver)
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

static SimObjectResolver *	getSimObjectResolver ()
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section.

static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it.

Detailed Description

Definition at line 51 of file decoder.hh.

Constructor & Destructor Documentation

◆ Decoder()

gem5::RiscvISA::Decoder::Decoder ( const RiscvDecoderParams & p )

Definition at line 42 of file decoder.cc.

References elen, gem5::RiscvISA::ISA::getVecElemLenInBits(), gem5::RiscvISA::ISA::getVecLenInBits(), gem5::RiscvISA::p, reset(), and vlen.

Member Function Documentation

◆ compressed()

bool gem5::RiscvISA::Decoder::compressed ( ExtMachInst inst )

inline

Definition at line 78 of file decoder.hh.

◆ decode() [1/2]

StaticInstPtr gem5::RiscvISA::Decoder::decode	(	ExtMachInst	mach_inst,
		Addr	addr )

protected

Decode a machine instruction.

Parameters

mach_inst The binary instruction to decode.

Return values

A	pointer to the corresponding StaticInst object.

Definition at line 93 of file decoder.cc.

References gem5::X86ISA::addr, gem5::RiscvISA::compressed, decodeInst(), DPRINTF, instMap, and gem5::ArmISA::si.

Referenced by decode().

◆ decode() [2/2]

StaticInstPtr gem5::RiscvISA::Decoder::decode ( PCStateBase & pc )

overridevirtual

Decode an instruction or fetch it from the code cache.

This method decodes the currently pending pre-decoded instruction. Data must be fed to the decoder using moreBytes() until instReady() is true before calling this method.

Parameters

pc	Instruction pointer that we are decoding.

Returns: A pointer to a static instruction or NULL if the decoder isn't ready (see instReady()).

Implements gem5::InstDecoder.

Definition at line 110 of file decoder.cc.

References gem5::PCStateBase::as(), gem5::RiscvISA::compressed, decode(), emi, gem5::InstDecoder::instDone, machInst, and gem5::GenericISA::PCStateWithNext::npc().

◆ decodeInst()

virtual StaticInstPtr gem5::RiscvISA::Decoder::decodeInst ( ExtMachInst mach_inst )

protectedvirtual

Referenced by decode().

◆ moreBytes()

void gem5::RiscvISA::Decoder::moreBytes	(	const PCStateBase &	pc,
		Addr	fetchPC )

overridevirtual

Feed data to the decoder.

A CPU model uses this interface to load instruction data into the decoder. Once enough data has been loaded (check with instReady()), a decoded instruction can be retrieved using decode(PCStateBase &).

This method is intended to support both fixed-length and variable-length instructions. Instruction data is fetch in MachInst blocks (which correspond to the size of a typical insturction). The method might need to be called multiple times if the instruction spans multiple blocks, in that case needMoreBytes() will return true and instReady() will return false.

The fetchPC parameter is used to indicate where in memory the instruction was fetched from. This is should be the same address as the pc. If fetching multiple blocks, it indicates where subsequent blocks are fetched from (pc + n * sizeof(MachInst)).

Parameters

pc	Instruction pointer that we are decoding.
fetchPC	The address this chunk was fetched from.

Implements gem5::InstDecoder.

Definition at line 59 of file decoder.cc.

References aligned, gem5::bits(), gem5::RiscvISA::compressed, DPRINTF, emi, gem5::InstDecoder::instDone, gem5::letoh(), machInst, mid, gem5::InstDecoder::outOfBytes, gem5::RiscvISA::pc, and gem5::replaceBits().

◆ reset()

void gem5::RiscvISA::Decoder::reset ( )

overridevirtual

Reimplemented from gem5::InstDecoder.

Definition at line 50 of file decoder.cc.

References aligned, emi, machInst, and mid.

Referenced by Decoder().

Member Data Documentation

◆ aligned

bool gem5::RiscvISA::Decoder::aligned

private

Definition at line 55 of file decoder.hh.

Referenced by moreBytes(), and reset().

◆ elen

uint32_t gem5::RiscvISA::Decoder::elen

protected

Definition at line 64 of file decoder.hh.

Referenced by Decoder().

◆ emi

ExtMachInst gem5::RiscvISA::Decoder::emi

protected

Definition at line 60 of file decoder.hh.

Referenced by decode(), moreBytes(), and reset().

◆ instMap

decode_cache::InstMap<ExtMachInst> gem5::RiscvISA::Decoder::instMap

private

Definition at line 54 of file decoder.hh.

Referenced by decode().

◆ machInst

uint32_t gem5::RiscvISA::Decoder::machInst

protected

Definition at line 61 of file decoder.hh.

Referenced by decode(), moreBytes(), and reset().

◆ mid

bool gem5::RiscvISA::Decoder::mid

private

Definition at line 56 of file decoder.hh.

Referenced by moreBytes(), and reset().

◆ vlen

uint32_t gem5::RiscvISA::Decoder::vlen

protected

Definition at line 63 of file decoder.hh.

Referenced by Decoder().

The documentation for this class was generated from the following files:

arch/riscv/decoder.hh
arch/riscv/decoder.cc

Public Member Functions

Protected Member Functions

Protected Attributes

Private Attributes

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

◆ Decoder()

Member Function Documentation

◆ compressed()

◆ decode() [1/2]

◆ decode() [2/2]

◆ decodeInst()

◆ moreBytes()

◆ reset()

Member Data Documentation

◆ aligned

◆ elen

◆ emi

◆ instMap

◆ machInst

◆ mid

◆ vlen