gem5  v21.1.0.2
isa_device.cc
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37 
38 #include "arch/arm/isa_device.hh"
39 
40 #include "arch/arm/regs/misc.hh"
41 #include "base/logging.hh"
42 
43 namespace gem5
44 {
45 
46 namespace ArmISA
47 {
48 
50  : isa(nullptr)
51 {
52 }
53 
54 void
56 {
57  assert(_isa);
58 
59  isa = _isa;
60 }
61 
62 void
64 {
65  warn("Ignoring write of 0x%lx to miscreg %s\n",
66  val,
67  miscRegName[misc_reg]);
68 }
69 
70 RegVal
72 {
73  warn("Returning zero for read from miscreg %s\n", miscRegName[misc_reg]);
74 
75  return 0;
76 }
77 
78 } // namespace ArmISA
79 } // namespace gem5
gem5::ArmISA::BaseISADevice::BaseISADevice
BaseISADevice()
Definition: isa_device.cc:49
isa_device.hh
gem5::ArmISA::BaseISADevice::setISA
virtual void setISA(ISA *isa)
Definition: isa_device.cc:55
warn
#define warn(...)
Definition: logging.hh:245
gem5::RegVal
uint64_t RegVal
Definition: types.hh:173
gem5::ArmISA::ISA
Definition: isa.hh:68
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:775
gem5::ArmISA::miscRegName
const char *const miscRegName[]
Definition: misc.hh:1172
gem5::ArmISA::BaseISADevice::isa
ISA * isa
Definition: isa_device.hh:87
gem5::ArmISA::DummyISADevice::setMiscReg
void setMiscReg(int misc_reg, RegVal val) override
Write to a system register belonging to this device.
Definition: isa_device.cc:63
gem5::ArmISA::DummyISADevice::readMiscReg
RegVal readMiscReg(int misc_reg) override
Read a system register belonging to this device.
Definition: isa_device.cc:71
misc.hh
logging.hh
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40

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