gem5  v21.1.0.2
gic.hh
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37 
38 #ifndef __ARCH_ARM_KVM_GIC_HH__
39 #define __ARCH_ARM_KVM_GIC_HH__
40 
41 #include "arch/arm/system.hh"
42 #include "cpu/kvm/device.hh"
43 #include "cpu/kvm/vm.hh"
44 #include "dev/arm/gic_v2.hh"
45 #include "dev/platform.hh"
46 
47 namespace gem5
48 {
49 
58 {
59  public:
71  KvmKernelGicV2(KvmVM &vm, Addr cpu_addr, Addr dist_addr,
72  unsigned it_lines);
73  virtual ~KvmKernelGicV2();
74 
75  KvmKernelGicV2(const KvmKernelGicV2 &other) = delete;
76  KvmKernelGicV2(const KvmKernelGicV2 &&other) = delete;
77  KvmKernelGicV2 &operator=(const KvmKernelGicV2 &&rhs) = delete;
78  KvmKernelGicV2 &operator=(const KvmKernelGicV2 &rhs) = delete;
79 
80  public:
91  void setSPI(unsigned spi);
97  void clearSPI(unsigned spi);
98 
105  void setPPI(unsigned vcpu, unsigned ppi);
106 
113  void clearPPI(unsigned vcpu, unsigned ppi);
114 
119 
121  uint32_t readDistributor(ContextID ctx, Addr daddr) override;
122  uint32_t readCpu(ContextID ctx, Addr daddr) override;
123 
124  void writeDistributor(ContextID ctx, Addr daddr,
125  uint32_t data) override;
126  void writeCpu(ContextID ctx, Addr daddr, uint32_t data) override;
127 
128  /* @} */
129 
130  protected:
139  void setIntState(unsigned type, unsigned vcpu, unsigned irq, bool high);
140 
148  uint32_t getGicReg(unsigned group, unsigned vcpu, unsigned offset);
149 
158  void setGicReg(unsigned group, unsigned vcpu, unsigned offset,
159  unsigned value);
160 
163 
166 };
167 
168 
169 struct MuxingKvmGicParams;
170 
171 class MuxingKvmGic : public GicV2
172 {
173  public: // SimObject / Serializable / Drainable
174  MuxingKvmGic(const MuxingKvmGicParams &p);
175  ~MuxingKvmGic();
176 
177  void startup() override;
178  DrainState drain() override;
179  void drainResume() override;
180 
181  public: // PioDevice
182  Tick read(PacketPtr pkt) override;
183  Tick write(PacketPtr pkt) override;
184 
185  public: // GicV2
186  void sendInt(uint32_t num) override;
187  void clearInt(uint32_t num) override;
188 
189  void sendPPInt(uint32_t num, uint32_t cpu) override;
190  void clearPPInt(uint32_t num, uint32_t cpu) override;
191 
192  protected: // GicV2
193  void updateIntState(int hint) override;
194 
195  protected:
198 
201 
202  private:
203  bool usingKvm;
204 
206  void fromGicV2ToKvm();
207  void fromKvmToGicV2();
208 
210 
212  ContextID ctx, Addr daddr);
214  ContextID ctx, Addr daddr);
215 
217  Addr daddr, size_t size);
219  Addr daddr, size_t size);
221  Addr daddr, size_t size);
223  Addr daddr, size_t size);
224 };
225 
226 } // namespace gem5
227 
228 #endif // __ARCH_ARM_KVM_GIC_HH__
gem5::MuxingKvmGic::system
System & system
System this interrupt controller belongs to.
Definition: gic.hh:197
gem5::KvmKernelGicV2::operator=
KvmKernelGicV2 & operator=(const KvmKernelGicV2 &&rhs)=delete
gem5::MuxingKvmGic::fromGicV2ToKvm
void fromGicV2ToKvm()
Multiplexing implementation.
Definition: gic.cc:413
gem5::MuxingKvmGic::MuxingKvmGic
MuxingKvmGic(const MuxingKvmGicParams &p)
Definition: gic.cc:170
data
const char data[]
Definition: circlebuf.test.cc:48
gem5::KvmKernelGicV2::clearSPI
void clearSPI(unsigned spi)
Clear a shared peripheral interrupt.
Definition: gic.cc:80
gem5::KvmKernelGicV2::setPPI
void setPPI(unsigned vcpu, unsigned ppi)
Raise a private peripheral interrupt.
Definition: gic.cc:86
gem5::MuxingKvmGic::drainResume
void drainResume() override
Resume execution after a successful drain.
Definition: gic.cc:205
gem5::MuxingKvmGic::clearPPInt
void clearPPInt(uint32_t num, uint32_t cpu) override
Definition: gic.cc:267
gem5::MuxingKvmGic
Definition: gic.hh:171
system.hh
gem5::KvmKernelGicV2::getGicReg
uint32_t getGicReg(unsigned group, unsigned vcpu, unsigned offset)
Get value of GIC register "from" a cpu.
Definition: gic.cc:113
gem5::BaseGicRegisters
Definition: base_gic.hh:127
gem5::KvmVM
KVM VM container.
Definition: vm.hh:297
gem5::MuxingKvmGic::sendPPInt
void sendPPInt(uint32_t num, uint32_t cpu) override
Interface call for private peripheral interrupts.
Definition: gic.cc:258
gem5::ArmISA::irq
Bitfield< 1 > irq
Definition: misc_types.hh:330
gem5::KvmKernelGicV2::setIntState
void setIntState(unsigned type, unsigned vcpu, unsigned irq, bool high)
Update the kernel's VGIC interrupt state.
Definition: gic.cc:98
gem5::PowerISA::to
Bitfield< 25, 21 > to
Definition: types.hh:96
gem5::MuxingKvmGic::~MuxingKvmGic
~MuxingKvmGic()
Definition: gic.cc:183
gem5::DrainState
DrainState
Object drain/handover states.
Definition: drain.hh:74
gem5::high
high
Definition: intmath.hh:176
gem5::System
Definition: system.hh:77
gem5::KvmKernelGicV2::kdev
KvmDevice kdev
Kernel interface to the GIC.
Definition: gic.hh:165
gem5::MuxingKvmGic::clearDistRange
void clearDistRange(BaseGicRegisters *to, Addr daddr, size_t size)
Definition: gic.cc:332
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::GicV2
Definition: gic_v2.hh:62
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::X86ISA::type
type
Definition: misc.hh:733
device.hh
gem5::KvmKernelGicV2::writeDistributor
void writeDistributor(ContextID ctx, Addr daddr, uint32_t data) override
Definition: gic.cc:155
gem5::KvmKernelGicV2::setSPI
void setSPI(unsigned spi)
Raise a shared peripheral interrupt.
Definition: gic.cc:74
gem5::KvmKernelGicV2::~KvmKernelGicV2
virtual ~KvmKernelGicV2()
Definition: gic.cc:69
gem5::MuxingKvmGic::clearInt
void clearInt(uint32_t num) override
Clear an interrupt from a device that is connected to the GIC.
Definition: gic.cc:248
gem5::ArmISA::offset
Bitfield< 23, 0 > offset
Definition: types.hh:144
gem5::KvmKernelGicV2::setGicReg
void setGicReg(unsigned group, unsigned vcpu, unsigned offset, unsigned value)
Set value of GIC register "from" a cpu.
Definition: gic.cc:127
gem5::KvmKernelGicV2::readDistributor
uint32_t readDistributor(ContextID ctx, Addr daddr) override
BaseGicRegisters interface.
Definition: gic.cc:141
platform.hh
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::KvmKernelGicV2::cpuRange
const AddrRange cpuRange
Address range for the CPU interfaces.
Definition: gic.hh:116
gem5::MuxingKvmGic::sendInt
void sendInt(uint32_t num) override
Post an interrupt from a device that is connected to the GIC.
Definition: gic.cc:238
vm.hh
gem5::MuxingKvmGic::copyDistRegister
void copyDistRegister(BaseGicRegisters *from, BaseGicRegisters *to, ContextID ctx, Addr daddr)
Definition: gic.cc:288
gem5::MuxingKvmGic::updateIntState
void updateIntState(int hint) override
See if some processor interrupt flags need to be enabled/disabled.
Definition: gic.cc:277
gem5::KvmKernelGicV2::readCpu
uint32_t readCpu(ContextID ctx, Addr daddr) override
Definition: gic.cc:148
gem5::MuxingKvmGic::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: gic.cc:220
gem5::KvmDevice
KVM device wrapper.
Definition: device.hh:60
gem5::MuxingKvmGic::kernelGic
KvmKernelGicV2 * kernelGic
Kernel GIC device.
Definition: gic.hh:200
gem5::KvmKernelGicV2::vm
KvmVM & vm
KVM VM in the parent system.
Definition: gic.hh:162
gem5::MuxingKvmGic::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: gic.cc:229
gem5::MuxingKvmGic::fromKvmToGicV2
void fromKvmToGicV2()
Definition: gic.cc:419
gem5::MuxingKvmGic::drain
DrainState drain() override
Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are pa...
Definition: gic.cc:197
gem5::ContextID
int ContextID
Globally unique thread context ID.
Definition: types.hh:246
gem5::MuxingKvmGic::usingKvm
bool usingKvm
Definition: gic.hh:203
gem5::KvmKernelGicV2::KvmKernelGicV2
KvmKernelGicV2(KvmVM &vm, Addr cpu_addr, Addr dist_addr, unsigned it_lines)
Instantiate a KVM in-kernel GIC model.
Definition: gic.cc:50
gem5::KvmKernelGicV2::clearPPI
void clearPPI(unsigned vcpu, unsigned ppi)
Clear a private peripheral interrupt.
Definition: gic.cc:92
gem5::AddrRange
The AddrRange class encapsulates an address range, and supports a number of tests to check if two ran...
Definition: addr_range.hh:71
gem5::MuxingKvmGic::startup
void startup() override
startup() is the final initialization call before simulation.
Definition: gic.cc:188
gem5::MuxingKvmGic::copyCpuRegister
void copyCpuRegister(BaseGicRegisters *from, BaseGicRegisters *to, ContextID ctx, Addr daddr)
Definition: gic.cc:297
gic_v2.hh
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::KvmKernelGicV2::writeCpu
void writeCpu(ContextID ctx, Addr daddr, uint32_t data) override
Definition: gic.cc:162
gem5::MuxingKvmGic::copyBankedDistRange
void copyBankedDistRange(BaseGicRegisters *from, BaseGicRegisters *to, Addr daddr, size_t size)
Definition: gic.cc:306
gem5::MuxingKvmGic::clearBankedDistRange
void clearBankedDistRange(BaseGicRegisters *to, Addr daddr, size_t size)
Definition: gic.cc:315
gem5::KvmKernelGicV2::distRange
const AddrRange distRange
Address range for the distributor interface.
Definition: gic.hh:118
gem5::MuxingKvmGic::copyDistRange
void copyDistRange(BaseGicRegisters *from, BaseGicRegisters *to, Addr daddr, size_t size)
Definition: gic.cc:324
gem5::KvmKernelGicV2
KVM in-kernel GIC abstraction.
Definition: gic.hh:57
gem5::MuxingKvmGic::copyGicState
void copyGicState(BaseGicRegisters *from, BaseGicRegisters *to)
Definition: gic.cc:340

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