gem5  v21.2.0.0
protocol_tester.cc
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31 
33 
34 #include <algorithm>
35 #include <ctime>
36 #include <fstream>
37 #include <random>
38 
43 #include "debug/ProtocolTest.hh"
44 #include "mem/request.hh"
45 #include "sim/sim_exit.hh"
46 #include "sim/system.hh"
47 
48 namespace gem5
49 {
50 
52  : ClockedObject(p),
53  _requestorId(p.system->getRequestorId(this)),
54  numCpuPorts(p.port_cpu_ports_connection_count),
55  numDmaPorts(p.port_dma_ports_connection_count),
56  numVectorPorts(p.port_cu_vector_ports_connection_count),
57  numSqcPorts(p.port_cu_sqc_ports_connection_count),
58  numScalarPorts(p.port_cu_scalar_ports_connection_count),
59  numTokenPorts(p.port_cu_token_ports_connection_count),
60  numCusPerSqc(p.cus_per_sqc),
61  numCusPerScalar(p.cus_per_scalar),
62  numWfsPerCu(p.wavefronts_per_cu),
63  numWisPerWf(p.workitems_per_wavefront),
64  numCuTokens(p.max_cu_tokens),
65  numAtomicLocs(p.num_atomic_locations),
66  numNormalLocsPerAtomic(p.num_normal_locs_per_atomic),
67  episodeLength(p.episode_length),
68  maxNumEpisodes(p.max_num_episodes),
69  debugTester(p.debug_tester),
70  cpuThreads(p.cpu_threads),
71  dmaThreads(p.dma_threads),
72  wfs(p.wavefronts)
73 {
74  int idx = 0; // global port index
75 
76  numCpus = numCpuPorts; // 1 cpu port per CPU
77  numDmas = numDmaPorts; // 1 dma port per DMA
78  numCus = numVectorPorts; // 1 vector port per CU
79 
80  // create all physical cpu's data ports
81  for (int i = 0; i < numCpuPorts; ++i) {
82  DPRINTF(ProtocolTest, "Creating %s\n",
83  csprintf("%s-cpuPort%d", name(), i));
84  cpuPorts.push_back(new SeqPort(csprintf("%s-cpuPort%d", name(), i),
85  this, i, idx));
86  idx++;
87  }
88 
89  // create all physical DMA data ports
90  for (int i = 0; i < numDmaPorts; ++i) {
91  DPRINTF(ProtocolTest, "Creating %s\n",
92  csprintf("%s-dmaPort%d", name(), i));
93  dmaPorts.push_back(new SeqPort(csprintf("%s-dmaPort%d", name(), i),
94  this, i, idx));
95  idx++;
96  }
97 
98  // create all physical gpu's data ports
99  for (int i = 0; i < numVectorPorts; ++i) {
100  DPRINTF(ProtocolTest, "Creating %s\n",
101  csprintf("%s-cuVectorPort%d", name(), i));
102  cuVectorPorts.push_back(new SeqPort(csprintf("%s-cuVectorPort%d",
103  name(), i),
104  this, i, idx));
105  idx++;
106  }
107 
108  for (int i = 0; i < numScalarPorts; ++i) {
109  DPRINTF(ProtocolTest, "Creating %s\n",
110  csprintf("%s-cuScalarPort%d", name(), i));
111  cuScalarPorts.push_back(new SeqPort(csprintf("%s-cuScalarPort%d",
112  name(), i),
113  this, i, idx));
114  idx++;
115  }
116 
117  for (int i = 0; i < numSqcPorts; ++i) {
118  DPRINTF(ProtocolTest, "Creating %s\n",
119  csprintf("%s-cuSqcPort%d", name(), i));
120  cuSqcPorts.push_back(new SeqPort(csprintf("%s-cuSqcPort%d",
121  name(), i),
122  this, i, idx));
123  idx++;
124  }
125 
126  for (int i = 0; i < numTokenPorts; ++i) {
127  cuTokenPorts.push_back(new GMTokenPort(csprintf("%s-cuTokenPort%d",
128  name(), i),
129  this, i));
130  cuTokenManagers.push_back(new TokenManager(numCuTokens));
131  cuTokenPorts[i]->setTokenManager(cuTokenManagers[i]);
132  }
133 
134  // create an address manager
137  nextEpisodeId = 0;
138 
139  if (!debugTester)
140  warn("Data race check is not enabled\n");
141 
142  sentExitSignal = false;
143 
144  // set random seed number
145  if (p.random_seed != 0) {
146  srand(p.random_seed);
147  } else {
148  srand(time(NULL));
149  }
150 
151  actionCount = 0;
152 
153  // create a new log file
154  logFile = simout.create(p.log_file);
155  assert(logFile);
156 
157  // print test configs
158  std::stringstream ss;
159  ss << "GPU Ruby test's configurations" << std::endl
160  << "\tNumber of CPUs: " << numCpus << std::endl
161  << "\tNumber of DMAs: " << numDmas << std::endl
162  << "\tNumber of CUs: " << numCus << std::endl
163  << "\tNumber of wavefronts per CU: " << numWfsPerCu << std::endl
164  << "\tWavefront size: " << numWisPerWf << std::endl
165  << "\tNumber of atomic locations: " << numAtomicLocs << std::endl
166  << "\tNumber of non-atomic locations: "
167  << numNormalLocsPerAtomic * numAtomicLocs << std::endl
168  << "\tEpisode length: " << episodeLength << std::endl
169  << "\tTest length (max number of episodes): " << maxNumEpisodes
170  << std::endl
171  << "\tRandom seed: " << p.random_seed
172  << std::endl;
173 
174  ccprintf(*(logFile->stream()), "%s", ss.str());
175  logFile->stream()->flush();
176 }
177 
179 {
180  for (int i = 0; i < cpuPorts.size(); ++i)
181  delete cpuPorts[i];
182  for (int i = 0; i < dmaPorts.size(); ++i)
183  delete dmaPorts[i];
184  for (int i = 0; i < cuVectorPorts.size(); ++i)
185  delete cuVectorPorts[i];
186  for (int i = 0; i < cuScalarPorts.size(); ++i)
187  delete cuScalarPorts[i];
188  for (int i = 0; i < cuSqcPorts.size(); ++i)
189  delete cuSqcPorts[i];
190  delete addrManager;
191 
192  // close the log file
194 }
195 
196 void
198 {
199  DPRINTF(ProtocolTest, "Attach threads to ports\n");
200 
201  // connect cpu threads to cpu's ports
202  for (int cpu_id = 0; cpu_id < numCpus; ++cpu_id) {
203  cpuThreads[cpu_id]->attachTesterThreadToPorts(this,
204  static_cast<SeqPort*>(cpuPorts[cpu_id]));
205  cpuThreads[cpu_id]->scheduleWakeup();
206  cpuThreads[cpu_id]->scheduleDeadlockCheckEvent();
207  }
208 
209  // connect dma threads to dma's ports
210  for (int dma_id = 0; dma_id < numDmas; ++dma_id) {
211  dmaThreads[dma_id]->attachTesterThreadToPorts(this,
212  static_cast<SeqPort*>(dmaPorts[dma_id]));
213  dmaThreads[dma_id]->scheduleWakeup();
214  dmaThreads[dma_id]->scheduleDeadlockCheckEvent();
215  }
216 
217  // connect gpu wavefronts to gpu's ports
218  int wfId = 0;
219  int vectorPortId = 0;
220  int sqcPortId = 0;
221  int scalarPortId = 0;
222 
223  for (int cu_id = 0; cu_id < numCus; ++cu_id) {
224  vectorPortId = cu_id;
225  sqcPortId = cu_id/numCusPerSqc;
226  scalarPortId = cu_id/numCusPerScalar;
227 
228  for (int i = 0; i < numWfsPerCu; ++i) {
229  wfId = cu_id * numWfsPerCu + i;
230  wfs[wfId]->attachTesterThreadToPorts(this,
231  static_cast<SeqPort*>(cuVectorPorts[vectorPortId]),
232  cuTokenPorts[vectorPortId],
233  static_cast<SeqPort*>(cuSqcPorts[sqcPortId]),
234  static_cast<SeqPort*>(cuScalarPorts[scalarPortId]));
235  wfs[wfId]->scheduleWakeup();
236  wfs[wfId]->scheduleDeadlockCheckEvent();
237  }
238  }
239 }
240 
241 Port&
242 ProtocolTester::getPort(const std::string &if_name, PortID idx)
243 {
244  if (if_name != "cpu_ports" && if_name != "dma_ports" &&
245  if_name != "cu_vector_ports" && if_name != "cu_sqc_ports" &&
246  if_name != "cu_scalar_ports" && if_name != "cu_token_ports") {
247  // pass along to super class
248  return ClockedObject::getPort(if_name, idx);
249  } else {
250  if (if_name == "cpu_ports") {
251  if (idx > numCpuPorts)
252  panic("ProtocolTester: unknown cpu port %d\n", idx);
253  return *cpuPorts[idx];
254  } else if (if_name == "dma_ports") {
255  if (idx > numDmaPorts)
256  panic("ProtocolTester: unknown dma port %d\n", idx);
257  return *dmaPorts[idx];
258  } else if (if_name == "cu_vector_ports") {
259  if (idx > numVectorPorts)
260  panic("ProtocolTester: unknown cu vect port %d\n", idx);
261  return *cuVectorPorts[idx];
262  } else if (if_name == "cu_sqc_ports") {
263  if (idx > numSqcPorts)
264  panic("ProtocolTester: unknown cu sqc port %d\n", idx);
265  return *cuSqcPorts[idx];
266  } else if (if_name == "cu_token_ports") {
267  if (idx > numTokenPorts)
268  panic("ProtocolTester: unknown cu token port %d\n", idx);
269  return *cuTokenPorts[idx];
270  } else {
271  assert(if_name == "cu_scalar_ports");
272  if (idx > numScalarPorts)
273  panic("ProtocolTester: unknown cu scal port %d\n", idx);
274  return *cuScalarPorts[idx];
275  }
276  }
277 
278  assert(false);
279 }
280 
281 bool
283 {
285  if (!sentExitSignal) {
286  // all done
287  inform("Total completed episodes: %d\n", nextEpisodeId - 1);
288  exitSimLoop("GPU Ruby Tester: Passed!");
289  sentExitSignal = true;
290  }
291  return true;
292  }
293  return false;
294 }
295 
296 bool
298  Location loc, bool isStore) const
299 {
300  if (debugTester) {
301  // go through all active episodes in all threads
302  for (const TesterThread* th : wfs) {
303  if (!th->checkDRF(atomic_loc, loc, isStore))
304  return false;
305  }
306 
307  for (const TesterThread* th : cpuThreads) {
308  if (!th->checkDRF(atomic_loc, loc, isStore))
309  return false;
310  }
311 
312  for (const TesterThread* th : dmaThreads) {
313  if (!th->checkDRF(atomic_loc, loc, isStore))
314  return false;
315  }
316  }
317 
318  return true;
319 }
320 
321 void
322 ProtocolTester::dumpErrorLog(std::stringstream& ss)
323 {
324  if (!sentExitSignal) {
325  // go through all threads and dump their outstanding requests
326  for (auto t : cpuThreads) {
327  t->printAllOutstandingReqs(ss);
328  }
329 
330  for (auto t : dmaThreads) {
331  t->printAllOutstandingReqs(ss);
332  }
333 
334  for (auto t : wfs) {
335  t->printAllOutstandingReqs(ss);
336  }
337 
338  // dump error log into a file
339  assert(logFile);
340  ccprintf(*(logFile->stream()), "%s", ss.str());
341  logFile->stream()->flush();
342 
343  sentExitSignal = true;
344  // terminate the simulation
345  panic("GPU Ruby Tester: Failed!\n");
346  }
347 }
348 
349 bool
351 {
352  // get the requesting thread from the original sender state
353  ProtocolTester::SenderState* senderState =
354  safe_cast<ProtocolTester::SenderState*>(pkt->senderState);
355  TesterThread *th = senderState->th;
356 
357  th->hitCallback(pkt);
358 
359  return true;
360 }
361 
362 } // namespace gem5
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:252
gem5::SimObject::getPort
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
Definition: sim_object.cc:126
gem5::ProtocolTester::dmaThreads
std::vector< DmaThread * > dmaThreads
Definition: protocol_tester.hh:177
gem5::ProtocolTester::sentExitSignal
bool sentExitSignal
Definition: protocol_tester.hh:197
warn
#define warn(...)
Definition: logging.hh:246
system.hh
gem5::ProtocolTester::numCusPerScalar
int numCusPerScalar
Definition: protocol_tester.hh:153
gem5::ProtocolTester::nextEpisodeId
int nextEpisodeId
Definition: protocol_tester.hh:190
gem5::ProtocolTester::ProtocolTester
ProtocolTester(const Params &p)
Definition: protocol_tester.cc:51
gem5::TesterThread::hitCallback
virtual void hitCallback(PacketPtr pkt)=0
gem5::ProtocolTester::cuTokenPorts
std::vector< GMTokenPort * > cuTokenPorts
Definition: protocol_tester.hh:174
gem5::ProtocolTester::numAtomicLocs
int numAtomicLocs
Definition: protocol_tester.hh:158
gem5::AddressManager
Definition: address_manager.hh:120
gem5::ProtocolTester::debugTester
bool debugTester
Definition: protocol_tester.hh:165
gem5::ProtocolTester::cuTokenManagers
std::vector< TokenManager * > cuTokenManagers
Definition: protocol_tester.hh:173
gem5::TokenManager
Definition: token_port.hh:130
gem5::ProtocolTester::numCus
int numCus
Definition: protocol_tester.hh:188
gem5::ProtocolTester::dmaPorts
std::vector< RequestPort * > dmaPorts
Definition: protocol_tester.hh:169
gem5::ProtocolTester::cpuPorts
std::vector< RequestPort * > cpuPorts
Definition: protocol_tester.hh:168
gem5::simout
OutputDirectory simout
Definition: output.cc:62
gem5::ProtocolTester::cuSqcPorts
std::vector< RequestPort * > cuSqcPorts
Definition: protocol_tester.hh:171
gem5::ProtocolTester::numScalarPorts
int numScalarPorts
Definition: protocol_tester.hh:150
gem5::ProtocolTester::numCpuPorts
int numCpuPorts
Definition: protocol_tester.hh:146
gem5::X86ISA::system
Bitfield< 15 > system
Definition: misc.hh:1003
gem5::ProtocolTester::numCusPerSqc
int numCusPerSqc
Definition: protocol_tester.hh:152
gem5::OutputDirectory::create
OutputStream * create(const std::string &name, bool binary=false, bool no_gz=false)
Creates a file in this directory (optionally compressed).
Definition: output.cc:210
gem5::csprintf
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:161
gem5::ProtocolTester::maxNumEpisodes
int maxNumEpisodes
Definition: protocol_tester.hh:163
gem5::ProtocolTester::init
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: protocol_tester.cc:197
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:67
gem5::TesterThread
Definition: tester_thread.hh:49
gem5::ProtocolTester::SeqPort
Definition: protocol_tester.hh:72
gem5::ProtocolTester::numDmas
int numDmas
Definition: protocol_tester.hh:187
sim_exit.hh
request.hh
gem5::ccprintf
void ccprintf(cp::Print &print)
Definition: cprintf.hh:130
gem5::exitSimLoop
void exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, bool serialize)
Schedule an event to exit the simulation loop (returning to Python) at the end of the current cycle (...
Definition: sim_events.cc:88
dma_thread.hh
gem5::ProtocolTester::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: protocol_tester.cc:242
gem5::ProtocolTester::logFile
OutputStream * logFile
Definition: protocol_tester.hh:199
gem5::OutputStream::stream
std::ostream * stream() const
Get the output underlying output stream.
Definition: output.hh:62
gem5::OutputDirectory::close
void close(OutputStream *file)
Closes an output file and free the corresponding OutputFile.
Definition: output.cc:147
gem5::ProtocolTester::cpuThreads
std::vector< CpuThread * > cpuThreads
Definition: protocol_tester.hh:176
gem5::Named::name
virtual std::string name() const
Definition: named.hh:47
gem5::ProtocolTester::numTokenPorts
int numTokenPorts
Definition: protocol_tester.hh:151
gem5::ProtocolTester::SenderState
Definition: protocol_tester.hh:100
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::ProtocolTester::numSqcPorts
int numSqcPorts
Definition: protocol_tester.hh:149
gem5::ProtocolTester::cuScalarPorts
std::vector< RequestPort * > cuScalarPorts
Definition: protocol_tester.hh:172
tester_thread.hh
gem5::ProtocolTester::numDmaPorts
int numDmaPorts
Definition: protocol_tester.hh:147
gem5::ProtocolTester::numWisPerWf
int numWisPerWf
Definition: protocol_tester.hh:155
gem5::ProtocolTester::SenderState::th
TesterThread * th
Definition: protocol_tester.hh:102
gem5::ProtocolTester::checkExit
bool checkExit()
Definition: protocol_tester.cc:282
gem5::ProtocolTester::numCuTokens
int numCuTokens
Definition: protocol_tester.hh:156
ss
std::stringstream ss
Definition: trace.test.cc:45
cpu_thread.hh
gem5::ProtocolTester::dumpErrorLog
void dumpErrorLog(std::stringstream &ss)
Definition: protocol_tester.cc:322
gem5::ArmISA::t
Bitfield< 5 > t
Definition: misc_types.hh:71
gpu_wavefront.hh
gem5::ProtocolTester::checkDRF
bool checkDRF(Location atomic_loc, Location loc, bool isStore) const
Definition: protocol_tester.cc:297
gem5::ProtocolTester::numWfsPerCu
int numWfsPerCu
Definition: protocol_tester.hh:154
gem5::Packet::senderState
SenderState * senderState
This packet's sender state.
Definition: packet.hh:534
gem5::ClockedObject
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
Definition: clocked_object.hh:234
gem5::ProtocolTester::numNormalLocsPerAtomic
int numNormalLocsPerAtomic
Definition: protocol_tester.hh:159
gem5::ProtocolTester::GMTokenPort
Definition: protocol_tester.hh:86
gem5::ProtocolTester::Params
ProtocolTesterParams Params
Definition: protocol_tester.hh:114
inform
#define inform(...)
Definition: logging.hh:247
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
protocol_tester.hh
gem5::ProtocolTester::numVectorPorts
int numVectorPorts
Definition: protocol_tester.hh:148
gem5::ProtocolTester::SeqPort::recvTimingResp
virtual bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
Definition: protocol_tester.cc:350
gem5::ProtocolTester::Location
AddressManager::Location Location
Definition: protocol_tester.hh:118
gem5::ProtocolTester::numCpus
int numCpus
Definition: protocol_tester.hh:186
gem5::ProtocolTester::episodeLength
int episodeLength
Definition: protocol_tester.hh:161
gem5::ProtocolTester::~ProtocolTester
~ProtocolTester()
Definition: protocol_tester.cc:178
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::ProtocolTester::actionCount
int actionCount
Definition: protocol_tester.hh:194
gem5::ProtocolTester::addrManager
AddressManager * addrManager
Definition: protocol_tester.hh:183
gem5::ProtocolTester::cuVectorPorts
std::vector< RequestPort * > cuVectorPorts
Definition: protocol_tester.hh:170
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:178
gem5::ProtocolTester::wfs
std::vector< GpuWavefront * > wfs
Definition: protocol_tester.hh:178

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