43#include "debug/ProtocolTest.hh"
53 _requestorId(
p.
system->getRequestorId(this)),
54 numCpuPorts(
p.port_cpu_ports_connection_count),
55 numDmaPorts(
p.port_dma_ports_connection_count),
56 numVectorPorts(
p.port_cu_vector_ports_connection_count),
57 numSqcPorts(
p.port_cu_sqc_ports_connection_count),
58 numScalarPorts(
p.port_cu_scalar_ports_connection_count),
59 numTokenPorts(
p.port_cu_token_ports_connection_count),
60 numCusPerSqc(
p.cus_per_sqc),
61 numCusPerScalar(
p.cus_per_scalar),
62 numWfsPerCu(
p.wavefronts_per_cu),
63 numWisPerWf(
p.workitems_per_wavefront),
64 numCuTokens(
p.max_cu_tokens),
65 numAtomicLocs(
p.num_atomic_locations),
66 numNormalLocsPerAtomic(
p.num_normal_locs_per_atomic),
67 episodeLength(
p.episode_length),
68 maxNumEpisodes(
p.max_num_episodes),
69 debugTester(
p.debug_tester),
70 cpuThreads(
p.cpu_threads),
71 dmaThreads(
p.dma_threads),
82 DPRINTF(ProtocolTest,
"Creating %s\n",
91 DPRINTF(ProtocolTest,
"Creating %s\n",
100 DPRINTF(ProtocolTest,
"Creating %s\n",
109 DPRINTF(ProtocolTest,
"Creating %s\n",
118 DPRINTF(ProtocolTest,
"Creating %s\n",
140 warn(
"Data race check is not enabled\n");
147 if (
p.random_seed != 0) {
151 "If `random_seed == 0` (or `random_seed` is unset) "
152 "ProtocolTester does not seed the RNG. This will NOT result in "
153 "the RNG generating different results each run. In this case the "
154 "RNG is seeded by a default value. This differs from behavior in "
155 "previous versions of gem5. Setting `random_seed` to a non-zero "
156 "value is strongly recommended."
167 std::stringstream
ss;
168 ss <<
"GPU Ruby test's configurations" << std::endl
169 <<
"\tNumber of CPUs: " <<
numCpus << std::endl
170 <<
"\tNumber of DMAs: " <<
numDmas << std::endl
171 <<
"\tNumber of CUs: " <<
numCus << std::endl
172 <<
"\tNumber of wavefronts per CU: " <<
numWfsPerCu << std::endl
173 <<
"\tWavefront size: " <<
numWisPerWf << std::endl
174 <<
"\tNumber of atomic locations: " <<
numAtomicLocs << std::endl
175 <<
"\tNumber of non-atomic locations: "
180 <<
"\tRandom seed: " <<
p.random_seed
208 DPRINTF(ProtocolTest,
"Attach threads to ports\n");
211 for (
int cpu_id = 0; cpu_id <
numCpus; ++cpu_id) {
212 cpuThreads[cpu_id]->attachTesterThreadToPorts(
this,
215 cpuThreads[cpu_id]->scheduleDeadlockCheckEvent();
219 for (
int dma_id = 0; dma_id <
numDmas; ++dma_id) {
220 dmaThreads[dma_id]->attachTesterThreadToPorts(
this,
223 dmaThreads[dma_id]->scheduleDeadlockCheckEvent();
228 int vectorPortId = 0;
230 int scalarPortId = 0;
232 for (
int cu_id = 0; cu_id <
numCus; ++cu_id) {
233 vectorPortId = cu_id;
239 wfs[wfId]->attachTesterThreadToPorts(
this,
244 wfs[wfId]->scheduleWakeup();
245 wfs[wfId]->scheduleDeadlockCheckEvent();
253 if (if_name !=
"cpu_ports" && if_name !=
"dma_ports" &&
254 if_name !=
"cu_vector_ports" && if_name !=
"cu_sqc_ports" &&
255 if_name !=
"cu_scalar_ports" && if_name !=
"cu_token_ports") {
259 if (if_name ==
"cpu_ports") {
261 panic(
"ProtocolTester: unknown cpu port %d\n", idx);
263 }
else if (if_name ==
"dma_ports") {
265 panic(
"ProtocolTester: unknown dma port %d\n", idx);
267 }
else if (if_name ==
"cu_vector_ports") {
269 panic(
"ProtocolTester: unknown cu vect port %d\n", idx);
271 }
else if (if_name ==
"cu_sqc_ports") {
273 panic(
"ProtocolTester: unknown cu sqc port %d\n", idx);
275 }
else if (if_name ==
"cu_token_ports") {
277 panic(
"ProtocolTester: unknown cu token port %d\n", idx);
280 assert(if_name ==
"cu_scalar_ports");
282 panic(
"ProtocolTester: unknown cu scal port %d\n", idx);
312 if (!th->checkDRF(atomic_loc, loc, isStore))
317 if (!th->checkDRF(atomic_loc, loc, isStore))
322 if (!th->checkDRF(atomic_loc, loc, isStore))
336 t->printAllOutstandingReqs(
ss);
340 t->printAllOutstandingReqs(
ss);
344 t->printAllOutstandingReqs(
ss);
354 panic(
"GPU Ruby Tester: Failed!\n");
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
virtual std::string name() const
void close(OutputStream *file)
Closes an output file and free the corresponding OutputFile.
OutputStream * create(const std::string &name, bool binary=false, bool no_gz=false)
Creates a file in this directory (optionally compressed).
std::ostream * stream() const
Get the output underlying output stream.
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
SenderState * senderState
This packet's sender state.
Ports are used to interface objects to each other.
virtual bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
ProtocolTester(const Params &p)
std::vector< GpuWavefront * > wfs
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
std::vector< RequestPort * > cuVectorPorts
AddressManager * addrManager
AddressManager::Location Location
std::vector< RequestPort * > cuSqcPorts
ProtocolTesterParams Params
std::vector< DmaThread * > dmaThreads
bool checkDRF(Location atomic_loc, Location loc, bool isStore) const
std::vector< GMTokenPort * > cuTokenPorts
int numNormalLocsPerAtomic
std::vector< CpuThread * > cpuThreads
std::vector< RequestPort * > cuScalarPorts
std::vector< RequestPort * > dmaPorts
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
std::vector< TokenManager * > cuTokenManagers
std::vector< RequestPort * > cpuPorts
void dumpErrorLog(std::stringstream &ss)
virtual void hitCallback(PacketPtr pkt)=0
#define panic(...)
This implements a cprintf based panic() function.
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
T safe_cast(U &&ref_or_ptr)
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
void exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, bool serialize)
Schedule an event to exit the simulation loop (returning to Python) at the end of the current cycle (...
std::string csprintf(const char *format, const Args &...args)
void ccprintf(cp::Print &print)
Declaration of a request, the overall memory request consisting of the parts of the request that are ...