gem5  v21.1.0.2
rtc.cc
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37 
38 #include "dev/riscv/rtc.hh"
39 
40 #include "dev/mc146818.hh"
41 #include "params/RiscvRTC.hh"
42 
43 namespace gem5
44 {
45 
46 RiscvRTC::RiscvRTC(const Params &params) :
47  SimObject(params),
48  rtc(this, params.name, params.time, params.bcd,
49  params.frequency, params.port_int_pin_connection_count)
50 {
51 }
52 
53 RiscvRTC::RTC::RTC(EventManager *em, const std::string &n,
54  const struct tm time, bool bcd, Tick frequency, int int_pin_count) :
55  MC146818(em, n, time, bcd, frequency)
56 {
57  for (int i = 0; i < int_pin_count; i++) {
58  intPin.emplace_back(new IntSourcePin<RTC>(
59  csprintf("%s.int_pin[%d]", n, i), i, this));
60  }
61 }
62 
63 void
65 {
66  for (auto &pin: intPin) {
67  pin->raise();
68  pin->lower();
69  }
70 }
71 
72 Port &
73 RiscvRTC::getPort(const std::string &if_name, PortID idx)
74 {
75  if (if_name == "int_pin")
76  return *rtc.intPin.at(idx);
77  else
78  panic("Getting invalid port " + if_name);
79 }
80 
81 void
83 {
84  rtc.startup();
85 }
86 
87 void
89 {
90  // Serialize the timer
91  rtc.serialize("rtc", cp);
92 }
93 
94 void
96 {
97  // Serialize the timer
98  rtc.unserialize("rtc", cp);
99 }
100 
101 } // namespace gem5
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:252
gem5::RiscvRTC::Params
RiscvRTCParams Params
Definition: rtc.hh:72
rtc.hh
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::RiscvRTC::RTC::intPin
std::vector< std::unique_ptr< IntSource > > intPin
Definition: rtc.hh:63
gem5::RiscvRTC::RTC::RTC
RTC(EventManager *em, const std::string &n, const struct tm time, bool bcd, Tick frequency, int int_pin_count)
Definition: rtc.cc:53
gem5::csprintf
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:161
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:66
gem5::RiscvRTC::RiscvRTC
RiscvRTC(const Params &params)
Definition: rtc.cc:46
gem5::RiscvRTC::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: rtc.cc:88
gem5::RiscvRTC::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: rtc.cc:95
gem5::X86ISA::em
Bitfield< 2 > em
Definition: misc.hh:608
gem5::EventManager
Definition: eventq.hh:987
gem5::MC146818::startup
virtual void startup()
Start ticking.
Definition: mc146818.cc:124
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::RiscvRTC::RTC::handleEvent
void handleEvent()
Definition: rtc.cc:64
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::PowerISA::tm
Bitfield< 32 > tm
Definition: misc.hh:107
name
const std::string & name()
Definition: trace.cc:49
gem5::RiscvRTC::startup
void startup() override
startup() is the final initialization call before simulation.
Definition: rtc.cc:82
gem5::RiscvRTC::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: rtc.cc:73
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
gem5::ArmISA::n
Bitfield< 31 > n
Definition: misc_types.hh:455
gem5::MC146818::serialize
void serialize(const std::string &base, CheckpointOut &cp) const
Serialize this object to the given output stream.
Definition: mc146818.cc:266
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::RiscvRTC::rtc
gem5::RiscvRTC::RTC rtc
gem5::IntSourcePin
Definition: intpin.hh:112
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::MC146818::unserialize
void unserialize(const std::string &base, CheckpointIn &cp)
Reconstruct the state of this object from a checkpoint.
Definition: mc146818.cc:286
gem5::MC146818
Real-Time Clock (MC146818)
Definition: mc146818.hh:41
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:177
mc146818.hh

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