40#include "debug/GarnetSyntheticTraffic.hh"
79 cachePort(
"GarnetSyntheticTraffic",
this),
82 blockSizeBits(
p.block_offset),
83 numDestinations(
p.num_dest),
84 simCycles(
p.sim_cycles),
85 numPacketsMax(
p.num_packets_max),
87 singleSender(
p.single_sender),
88 singleDest(
p.single_dest),
89 trafficType(
p.traffic_type),
92 precision(
p.precision),
93 responseLimit(
p.response_limit),
94 requestorId(
p.system->getRequestorId(
this))
98 schedule(tickEvent, 0);
101 if (trafficStringToEnum.count(trafficType) == 0) {
102 fatal(
"Unknown Traffic Type: %s!\n", traffic);
104 traffic = trafficStringToEnum[trafficType];
107 DPRINTF(GarnetSyntheticTraffic,
"Config Created: Name = %s , and id = %d\n",
114 if (if_name ==
"test")
131 "Completed injection of %s packet for address %x\n",
132 pkt->
isWrite() ?
"write" :
"read\n",
133 pkt->
req->getPaddr());
152 bool sendAllowedThisCycle;
153 double injRange = pow((
double) 10, (
double)
precision);
155 if (trySending <
injRate*injRange)
156 sendAllowedThisCycle =
true;
158 sendAllowedThisCycle =
false;
161 if (sendAllowedThisCycle) {
162 bool senderEnable =
true;
165 senderEnable =
false;
168 senderEnable =
false;
187 int radix = (int) sqrt(num_destinations);
192 int src_x =
id%radix;
193 int src_y =
id/radix;
201 dest_x = radix - src_x - 1;
202 dest_y = radix - src_y - 1;
205 unsigned int straight = source;
206 unsigned int reverse = source & 1;
208 int num_bits = (int) log2(num_destinations);
210 for (
int i = 1;
i < num_bits;
i++)
214 reverse |= (straight & 1);
223 dest_x = (src_x + 1) % radix;
227 if (source < num_destinations/2)
236 dest_x = (src_x + (int) ceil(radix/2) - 1) % radix;
249 unsigned access_size = 1;
285 if (injReqType < 0 || injReqType > 2)
291 if (injReqType == 0) {
294 req = std::make_shared<Request>(paddr, access_size,
flags,
296 }
else if (injReqType == 1) {
300 req = std::make_shared<Request>(
302 req->setPaddr(paddr);
306 req = std::make_shared<Request>(paddr, access_size,
flags,
316 "Generated packet with destination %d, embedded in address %x\n",
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
Cycles is a wrapper class for representing cycle counts, i.e.
virtual bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
virtual void recvReqRetry()
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
GarnetSyntheticTraffic * tester
void sendPkt(PacketPtr pkt)
GarnetSyntheticTrafficParams Params
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
const Cycles responseLimit
EventFunctionWrapper tickEvent
GarnetSyntheticTraffic(const Params &p)
std::map< std::string, TrafficType > trafficStringToEnum
void completeRequest(PacketPtr pkt)
void printAddr(Addr a)
Print state of address in memory system via PrintReq (for debugging).
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Command
List of all commands associated with a packet.
virtual std::string name() const
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
SenderState * senderState
This packet's sender state.
RequestPtr req
A pointer to the original request.
void dataDynamic(T *p)
Set the data pointer to a value that should have delete [] called on it.
bool sendTimingReq(PacketPtr pkt)
Attempt to send a timing request to the responder port by calling its corresponding receive function.
void printAddr(Addr a)
Inject a PrintReq for the given address to print the state of that address throughout the memory syst...
@ INST_FETCH
The request was an instruction fetch.
std::enable_if_t< std::is_integral_v< T >, T > random()
Use the SFINAE idiom to choose an implementation based on whether the type is integral or floating po...
bool scheduled() const
Determine if the current event is scheduled.
void schedule(Event &event, Tick when)
static const Priority CPU_Tick_Pri
CPU ticks must come after other associated CPU events (such as writebacks).
#define fatal(...)
This implements a cprintf based fatal() function.
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
std::shared_ptr< Request > RequestPtr
Tick curTick()
The universal simulation clock.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
void exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, bool serialize)
Schedule an event to exit the simulation loop (returning to Python) at the end of the current cycle (...
Declaration of the Packet class.
Declaration of a request, the overall memory request consisting of the parts of the request that are ...
Declaration of Statistics objects.
const std::string & name()