gem5 v24.1.0.1
Loading...
Searching...
No Matches
GarnetSyntheticTraffic.cc
Go to the documentation of this file.
1/*
2 * Copyright (c) 2016 Georgia Institute of Technology
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
30
31#include <cmath>
32#include <iomanip>
33#include <set>
34#include <string>
35#include <vector>
36
37#include "base/logging.hh"
38#include "base/statistics.hh"
39#include "debug/GarnetSyntheticTraffic.hh"
40#include "mem/packet.hh"
41#include "mem/port.hh"
42#include "mem/request.hh"
43#include "sim/sim_events.hh"
44#include "sim/stats.hh"
45#include "sim/system.hh"
46
47namespace gem5
48{
49
51
52bool
58
59void
61{
62 tester->doRetry();
63}
64
65void
67{
68 if (!cachePort.sendTimingReq(pkt)) {
69 retryPkt = pkt; // RubyPort will retry sending
70 }
72}
73
76 tickEvent([this]{ tick(); }, "GarnetSyntheticTraffic tick",
77 false, Event::CPU_Tick_Pri),
78 cachePort("GarnetSyntheticTraffic", this),
79 retryPkt(NULL),
80 size(p.memory_size),
81 blockSizeBits(p.block_offset),
82 numDestinations(p.num_dest),
83 simCycles(p.sim_cycles),
84 numPacketsMax(p.num_packets_max),
85 numPacketsSent(0),
86 singleSender(p.single_sender),
87 singleDest(p.single_dest),
88 trafficType(p.traffic_type),
89 injRate(p.inj_rate),
90 injVnet(p.inj_vnet),
91 precision(p.precision),
92 responseLimit(p.response_limit),
93 requestorId(p.system->getRequestorId(this))
94{
95 // set up counters
96 noResponseCycles = 0;
97 schedule(tickEvent, 0);
98
99 initTrafficType();
100 if (trafficStringToEnum.count(trafficType) == 0) {
101 fatal("Unknown Traffic Type: %s!\n", traffic);
102 }
103 traffic = trafficStringToEnum[trafficType];
104
105 id = TESTER_NETWORK++;
106 DPRINTF(GarnetSyntheticTraffic,"Config Created: Name = %s , and id = %d\n",
107 name(), id);
108}
109
110Port &
111GarnetSyntheticTraffic::getPort(const std::string &if_name, PortID idx)
112{
113 if (if_name == "test")
114 return cachePort;
115 else
116 return ClockedObject::getPort(if_name, idx);
117}
118
119void
124
125
126void
128{
130 "Completed injection of %s packet for address %x\n",
131 pkt->isWrite() ? "write" : "read\n",
132 pkt->req->getPaddr());
133
134 assert(pkt->isResponse());
136 delete pkt;
137}
138
139
140void
142{
144 fatal("%s deadlocked at cycle %d\n", name(), curTick());
145 }
146
147 // make new request based on injection rate
148 // (injection rate's range depends on precision)
149 // - generate a random number between 0 and 10^precision
150 // - send pkt if this number is < injRate*(10^precision)
151 bool sendAllowedThisCycle;
152 double injRange = pow((double) 10, (double) precision);
153 unsigned trySending = rng->random<unsigned>(0, (int) injRange);
154 if (trySending < injRate*injRange)
155 sendAllowedThisCycle = true;
156 else
157 sendAllowedThisCycle = false;
158
159 // always generatePkt unless fixedPkts or singleSender is enabled
160 if (sendAllowedThisCycle) {
161 bool senderEnable = true;
162
164 senderEnable = false;
165
166 if (singleSender >= 0 && id != singleSender)
167 senderEnable = false;
168
169 if (senderEnable)
170 generatePkt();
171 }
172
173 // Schedule wakeup
174 if (curTick() >= simCycles)
175 exitSimLoop("Network Tester completed simCycles");
176 else {
177 if (!tickEvent.scheduled())
179 }
180}
181
182void
184{
185 int num_destinations = numDestinations;
186 int radix = (int) sqrt(num_destinations);
187 unsigned destination = id;
188 int dest_x = -1;
189 int dest_y = -1;
190 int source = id;
191 int src_x = id%radix;
192 int src_y = id/radix;
193
194 if (singleDest >= 0)
195 {
197 } else if (traffic == UNIFORM_RANDOM_) {
198 destination = rng->random<unsigned>(0, num_destinations - 1);
199 } else if (traffic == BIT_COMPLEMENT_) {
200 dest_x = radix - src_x - 1;
201 dest_y = radix - src_y - 1;
202 destination = dest_y*radix + dest_x;
203 } else if (traffic == BIT_REVERSE_) {
204 unsigned int straight = source;
205 unsigned int reverse = source & 1; // LSB
206
207 int num_bits = (int) log2(num_destinations);
208
209 for (int i = 1; i < num_bits; i++)
210 {
211 reverse <<= 1;
212 straight >>= 1;
213 reverse |= (straight & 1); // LSB
214 }
215 destination = reverse;
216 } else if (traffic == BIT_ROTATION_) {
217 if (source%2 == 0)
218 destination = source/2;
219 else // (source%2 == 1)
220 destination = ((source/2) + (num_destinations/2));
221 } else if (traffic == NEIGHBOR_) {
222 dest_x = (src_x + 1) % radix;
223 dest_y = src_y;
224 destination = dest_y*radix + dest_x;
225 } else if (traffic == SHUFFLE_) {
226 if (source < num_destinations/2)
227 destination = source*2;
228 else
229 destination = (source*2 - num_destinations + 1);
230 } else if (traffic == TRANSPOSE_) {
231 dest_x = src_y;
232 dest_y = src_x;
233 destination = dest_y*radix + dest_x;
234 } else if (traffic == TORNADO_) {
235 dest_x = (src_x + (int) ceil(radix/2) - 1) % radix;
236 dest_y = src_y;
237 destination = dest_y*radix + dest_x;
238 }
239 else {
240 fatal("Unknown Traffic Type: %s!\n", traffic);
241 }
242
243 // The source of the packets is a cache.
244 // The destination of the packets is a directory.
245 // The destination bits are embedded in the address after byte-offset.
246 Addr paddr = destination;
247 paddr <<= blockSizeBits;
248 unsigned access_size = 1; // Does not affect Ruby simulation
249
250 // Modeling different coherence msg types over different msg classes.
251 //
252 // GarnetSyntheticTraffic assumes the Garnet_standalone coherence protocol
253 // which models three message classes/virtual networks.
254 // These are: request, forward, response.
255 // requests and forwards are "control" packets (typically 8 bytes),
256 // while responses are "data" packets (typically 72 bytes).
257 //
258 // Life of a packet from the tester into the network:
259 // (1) This function generatePkt() generates packets of one of the
260 // following 3 types (randomly) : ReadReq, INST_FETCH, WriteReq
261 // (2) mem/ruby/system/RubyPort.cc converts these to RubyRequestType_LD,
262 // RubyRequestType_IFETCH, RubyRequestType_ST respectively
263 // (3) mem/ruby/system/Sequencer.cc sends these to the cache controllers
264 // in the coherence protocol.
265 // (4) Network_test-cache.sm tags RubyRequestType:LD,
266 // RubyRequestType:IFETCH and RubyRequestType:ST as
267 // Request, Forward, and Response events respectively;
268 // and injects them into virtual networks 0, 1 and 2 respectively.
269 // It immediately calls back the sequencer.
270 // (5) The packet traverses the network (simple/garnet) and reaches its
271 // destination (Directory), and network stats are updated.
272 // (6) Network_test-dir.sm simply drops the packet.
273 //
274 MemCmd::Command requestType;
275
276 RequestPtr req = nullptr;
278
279 // Inject in specific Vnet
280 // Vnet 0 and 1 are for control packets (1-flit)
281 // Vnet 2 is for data packets (5-flit)
282 int injReqType = injVnet;
283
284 if (injReqType < 0 || injReqType > 2)
285 {
286 // randomly inject in any vnet
287 injReqType = rng->random(0, 2);
288 }
289
290 if (injReqType == 0) {
291 // generate packet for virtual network 0
292 requestType = MemCmd::ReadReq;
293 req = std::make_shared<Request>(paddr, access_size, flags,
295 } else if (injReqType == 1) {
296 // generate packet for virtual network 1
297 requestType = MemCmd::ReadReq;
299 req = std::make_shared<Request>(
300 0x0, access_size, flags, requestorId, 0x0, 0);
301 req->setPaddr(paddr);
302 } else { // if (injReqType == 2)
303 // generate packet for virtual network 2
304 requestType = MemCmd::WriteReq;
305 req = std::make_shared<Request>(paddr, access_size, flags,
307 }
308
309 req->setContext(id);
310
311 //No need to do functional simulation
312 //We just do timing simulation of the network
313
315 "Generated packet with destination %d, embedded in address %x\n",
316 destination, req->getPaddr());
317
318 PacketPtr pkt = new Packet(req, requestType);
319 pkt->dataDynamic(new uint8_t[req->getSize()]);
320 pkt->senderState = NULL;
321
322 sendPkt(pkt);
323}
324
325void
327{
328 trafficStringToEnum["bit_complement"] = BIT_COMPLEMENT_;
329 trafficStringToEnum["bit_reverse"] = BIT_REVERSE_;
330 trafficStringToEnum["bit_rotation"] = BIT_ROTATION_;
331 trafficStringToEnum["neighbor"] = NEIGHBOR_;
332 trafficStringToEnum["shuffle"] = SHUFFLE_;
333 trafficStringToEnum["tornado"] = TORNADO_;
334 trafficStringToEnum["transpose"] = TRANSPOSE_;
335 trafficStringToEnum["uniform_random"] = UNIFORM_RANDOM_;
336}
337
338void
345
346void
351
352} // namespace gem5
#define DPRINTF(x,...)
Definition trace.hh:209
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
Cycles is a wrapper class for representing cycle counts, i.e.
Definition types.hh:79
virtual bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
virtual void recvReqRetry()
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
GarnetSyntheticTrafficParams Params
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
std::map< std::string, TrafficType > trafficStringToEnum
void printAddr(Addr a)
Print state of address in memory system via PrintReq (for debugging).
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Command
List of all commands associated with a packet.
Definition packet.hh:85
virtual std::string name() const
Definition named.hh:47
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
bool isResponse() const
Definition packet.hh:598
SenderState * senderState
This packet's sender state.
Definition packet.hh:545
bool isWrite() const
Definition packet.hh:594
RequestPtr req
A pointer to the original request.
Definition packet.hh:377
void dataDynamic(T *p)
Set the data pointer to a value that should have delete [] called on it.
Definition packet.hh:1213
bool sendTimingReq(PacketPtr pkt)
Attempt to send a timing request to the responder port by calling its corresponding receive function.
Definition port.hh:603
void printAddr(Addr a)
Inject a PrintReq for the given address to print the state of that address throughout the memory syst...
Definition port.cc:178
@ INST_FETCH
The request was an instruction fetch.
Definition request.hh:115
bool scheduled() const
Determine if the current event is scheduled.
Definition eventq.hh:458
void schedule(Event &event, Tick when)
Definition eventq.hh:1012
static const Priority CPU_Tick_Pri
CPU ticks must come after other associated CPU events (such as writebacks).
Definition eventq.hh:207
#define fatal(...)
This implements a cprintf based fatal() function.
Definition logging.hh:200
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
uint8_t flags
Definition helpers.cc:87
Port Object Declaration.
Bitfield< 7 > i
Definition misc_types.hh:67
Bitfield< 8 > a
Definition misc_types.hh:66
Bitfield< 0 > p
Copyright (c) 2024 Arm Limited All rights reserved.
Definition binary32.hh:36
std::shared_ptr< Request > RequestPtr
Definition request.hh:94
Tick curTick()
The universal simulation clock.
Definition cur_tick.hh:46
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition types.hh:245
void exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, bool serialize)
Schedule an event to exit the simulation loop (returning to Python) at the end of the current cycle (...
Definition sim_events.cc:88
Declaration of the Packet class.
Declaration of a request, the overall memory request consisting of the parts of the request that are ...
Declaration of Statistics objects.
const std::string & name()
Definition trace.cc:48

Generated on Mon Jan 13 2025 04:28:32 for gem5 by doxygen 1.9.8