gem5 v24.0.0.0
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RubyPrefetcherProxy.hh
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1/*
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37
38#ifndef __MEM_RUBY_STRUCTURES_RUBY_PREFETCHER_WRAPPER_HH__
39#define __MEM_RUBY_STRUCTURES_RUBY_PREFETCHER_WRAPPER_HH__
40
41#include <unordered_map>
42
47
48namespace gem5
49{
50
51namespace ruby
52{
53
78{
79 public:
80
83 MessageBuffer *pf_queue);
84
86 void deschedulePrefetch();
87
90
94 void notifyPfHit(const RequestPtr& req, bool is_read,
95 const DataBlock& data_blk);
96 void notifyPfMiss(const RequestPtr& req, bool is_read,
97 const DataBlock& data_blk);
98 void notifyPfFill(const RequestPtr& req, const DataBlock& data_blk,
99 bool from_pf);
100 void notifyPfEvict(Addr blkAddr, bool hwPrefetched,
101 RequestorID requestorID);
102
104 void regProbePoints();
105
106 private:
107
110
112 void issuePrefetch();
113
116
119
122
124 std::unordered_map<Addr, PacketPtr> issuedPfPkts;
125
128
131
134
137
144
145 public:
146
149 bool inCache(Addr addr, bool is_secure) const override
150 {
151 return cacheCntrl->inCache(addr, is_secure);
152 }
153
154 bool hasBeenPrefetched(Addr addr, bool is_secure) const override
155 {
156 return cacheCntrl->hasBeenPrefetched(addr, is_secure);
157 }
158
159 bool hasBeenPrefetched(Addr addr, bool is_secure,
160 RequestorID requestor) const override
161 {
162 return cacheCntrl->hasBeenPrefetched(addr, is_secure, requestor);
163 }
164
165 bool inMissQueue(Addr addr, bool is_secure) const override
166 {
167 return cacheCntrl->inMissQueue(addr, is_secure);
168 }
169
170 bool coalesce() const override
171 { return cacheCntrl->coalesce(); }
172
173};
174
175} // namespace ruby
176} // namespace gem5
177
178#endif // __MEM_RUBY_STRUCTURES_RUBY_PREFETCHER_WRAPPER_HH__
Interface for things with names.
Definition named.hh:39
ProbePointArg generates a point for the class of Arg.
Definition probe.hh:264
virtual bool inCache(const Addr &addr, const bool &is_secure)
Functions needed by CacheAccessor.
virtual bool inMissQueue(const Addr &addr, const bool &is_secure)
virtual bool hasBeenPrefetched(const Addr &addr, const bool &is_secure)
This is a proxy for prefetcher class in classic memory.
bool coalesce() const override
Determine if cache is coalescing writes.
void regProbePoints()
Registers probes.
bool hasBeenPrefetched(Addr addr, bool is_secure) const override
Determine if address has been prefetched.
void issuePrefetch()
Issue prefetch to the contoller prefetch queue.
void notifyPfEvict(Addr blkAddr, bool hwPrefetched, RequestorID requestorID)
prefetch::Base * prefetcher
Prefetcher from classic memory.
ProbePointArg< CacheAccessProbeArg > * ppMiss
To probe when a cache miss occurs.
EventFunctionWrapper pfEvent
Prefetch event.
void notifyPfMiss(const RequestPtr &req, bool is_read, const DataBlock &data_blk)
ProbePointArg< CacheAccessProbeArg > * ppFill
To probe when a cache fill occurs.
void scheduleNextPrefetch()
Schedule the next ready prefetch.
void notifyPfHit(const RequestPtr &req, bool is_read, const DataBlock &data_blk)
Notify PF probes hit/miss/fill.
void completePrefetch(Addr addr)
Notifies a completed prefetch request.
AbstractController * cacheCntrl
Ruby cache controller.
bool inCache(Addr addr, bool is_secure) const override
Accessor functions.
void deschedulePrefetch()
Deschedled the ready prefetch event.
bool inMissQueue(Addr addr, bool is_secure) const override
Determine if address is in cache miss queue.
void notifyPfFill(const RequestPtr &req, const DataBlock &data_blk, bool from_pf)
bool hasBeenPrefetched(Addr addr, bool is_secure, RequestorID requestor) const override
Determine if address has been prefetched by the requestor.
ProbePointArg< CacheAccessProbeArg > * ppHit
To probe when a cache hit occurs.
MessageBuffer * pfQueue
Prefetch queue to the cache controller.
ProbePointArg< CacheDataUpdateProbeArg > * ppDataUpdate
To probe when the contents of a block are updated.
std::unordered_map< Addr, PacketPtr > issuedPfPkts
List of issued prefetch request packets.
RubyPrefetcherProxy(AbstractController *parent, prefetch::Base *prefetcher, MessageBuffer *pf_queue)
Miss and writeback queue declarations.
Bitfield< 3 > addr
Definition types.hh:84
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
std::shared_ptr< Request > RequestPtr
Definition request.hh:94
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
uint16_t RequestorID
Definition request.hh:95
Provides generic cache lookup functions.

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