gem5 v24.0.0.0
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#include <base.hh>
Classes | |
class | PrefetchEvictListener |
class | PrefetchInfo |
Class containing the information needed by the prefetch to train and generate new prefetch requests. More... | |
class | PrefetchListener |
struct | StatGroup |
Public Member Functions | |
Base (const BasePrefetcherParams &p) | |
virtual | ~Base ()=default |
virtual void | setParentInfo (System *sys, ProbeManager *pm, unsigned blk_size) |
virtual void | notify (const CacheAccessProbeArg &acc, const PrefetchInfo &pfi)=0 |
Notify prefetcher of cache access (may be any access or just misses, depending on cache parameters.) | |
virtual void | notifyFill (const CacheAccessProbeArg &acc) |
Notify prefetcher of cache fill. | |
virtual void | notifyEvict (const EvictionInfo &info) |
Notify prefetcher of cache eviction. | |
virtual PacketPtr | getPacket ()=0 |
virtual Tick | nextPrefetchReadyTime () const =0 |
void | prefetchUnused () |
void | incrDemandMhsrMisses () |
void | pfHitInCache () |
void | pfHitInMSHR () |
void | pfHitInWB () |
void | regProbeListeners () override |
Register probe points for this object. | |
void | probeNotify (const CacheAccessProbeArg &acc, bool miss) |
Process a notification event from the ProbeListener. | |
void | addEventProbe (SimObject *obj, const char *name) |
Add a SimObject and a probe name to listen events from. | |
void | addMMU (BaseMMU *mmu) |
Add a BaseMMU object to be used whenever a translation is needed. | |
Public Member Functions inherited from gem5::ClockedObject | |
ClockedObject (const ClockedObjectParams &p) | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
Public Member Functions inherited from gem5::SimObject | |
const Params & | params () const |
SimObject (const Params &p) | |
virtual | ~SimObject () |
virtual void | init () |
init() is called after all C++ SimObjects have been created and all ports are connected. | |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. | |
virtual void | regProbePoints () |
Register probe points for this object. | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. | |
virtual Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) |
Get a port with a given name and index. | |
virtual void | startup () |
startup() is the final initialization call before simulation. | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. | |
virtual void | memWriteback () |
Write back dirty buffers to memory using functional writes. | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
Public Member Functions inherited from gem5::EventManager | |
EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick) -1) |
This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. | |
void | setCurTick (Tick newVal) |
EventManager (EventManager &em) | |
Event manger manages events in the event queue. | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
Public Member Functions inherited from gem5::Serializable | |
Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from gem5::Drainable | |
DrainState | drainState () const |
Return the current drain state of an object. | |
virtual void | notifyFork () |
Notify a child process of a fork. | |
Public Member Functions inherited from gem5::statistics::Group | |
Group (Group *parent, const char *name=nullptr) | |
Construct a new statistics group. | |
virtual | ~Group () |
virtual void | regStats () |
Callback to set stat parameters. | |
virtual void | resetStats () |
Callback to reset stats. | |
virtual void | preDumpStats () |
Callback before stats are dumped. | |
void | addStat (statistics::Info *info) |
Register a stat with this group. | |
const std::map< std::string, Group * > & | getStatGroups () const |
Get all child groups associated with this object. | |
const std::vector< Info * > & | getStats () const |
Get all stats associated with this object. | |
void | addStatGroup (const char *name, Group *block) |
Add a stat block as a child of this block. | |
const Info * | resolveStat (std::string name) const |
Resolve a stat by its name within this group. | |
void | mergeStatGroup (Group *block) |
Merge the contents (stats & children) of a block to this block. | |
Group ()=delete | |
Group (const Group &)=delete | |
Group & | operator= (const Group &)=delete |
Public Member Functions inherited from gem5::Named | |
Named (const std::string &name_) | |
virtual | ~Named ()=default |
virtual std::string | name () const |
Public Member Functions inherited from gem5::Clocked | |
void | updateClockPeriod () |
Update the tick to the current tick. | |
Tick | clockEdge (Cycles cycles=Cycles(0)) const |
Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. | |
Cycles | curCycle () const |
Determine the current cycle, corresponding to a tick aligned to a clock edge. | |
Tick | nextCycle () const |
Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. | |
uint64_t | frequency () const |
Tick | clockPeriod () const |
double | voltage () const |
Cycles | ticksToCycles (Tick t) const |
Tick | cyclesToTicks (Cycles c) const |
Protected Member Functions | |
bool | observeAccess (const PacketPtr &pkt, bool miss, bool prefetched) const |
Determine if this access should be observed. | |
bool | samePage (Addr a, Addr b) const |
Determine if addresses are on the same page. | |
Addr | blockAddress (Addr a) const |
Determine the address of the block in which a lays. | |
Addr | blockIndex (Addr a) const |
Determine the address of a at block granularity. | |
Addr | pageAddress (Addr a) const |
Determine the address of the page in which a lays. | |
Addr | pageOffset (Addr a) const |
Determine the page-offset of a | |
Addr | pageIthBlockAddress (Addr page, uint32_t i) const |
Build the address of the i-th block inside the page. | |
Protected Member Functions inherited from gem5::Drainable | |
Drainable () | |
virtual | ~Drainable () |
virtual void | drainResume () |
Resume execution after a successful drain. | |
void | signalDrainDone () const |
Signal that an object is drained. | |
Protected Member Functions inherited from gem5::Clocked | |
Clocked (ClockDomain &clk_domain) | |
Create a clocked object and set the clock domain based on the parameters. | |
Clocked (Clocked &)=delete | |
Clocked & | operator= (Clocked &)=delete |
virtual | ~Clocked () |
Virtual destructor due to inheritance. | |
void | resetClock () const |
Reset the object's clock using the current global tick value. | |
virtual void | clockPeriodUpdated () |
A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. | |
Protected Attributes | |
System * | system |
Pointer to the parent system. | |
ProbeManager * | probeManager |
Pointer to the parent cache's probe manager. | |
unsigned | blkSize |
The block size of the parent cache. | |
unsigned | lBlkSize |
log_2(block size of the parent cache). | |
const bool | onMiss |
Only consult prefetcher on cache misses? | |
const bool | onRead |
Consult prefetcher on reads? | |
const bool | onWrite |
Consult prefetcher on reads? | |
const bool | onData |
Consult prefetcher on data accesses? | |
const bool | onInst |
Consult prefetcher on instruction accesses? | |
const RequestorID | requestorId |
Request id for prefetches. | |
const Addr | pageBytes |
const bool | prefetchOnAccess |
Prefetch on every access, not just misses. | |
const bool | prefetchOnPfHit |
Prefetch on hit on prefetched lines. | |
const bool | useVirtualAddresses |
Use Virtual Addresses for prefetching. | |
gem5::prefetch::Base::StatGroup | prefetchStats |
uint64_t | issuedPrefetches |
Total prefetches issued. | |
uint64_t | usefulPrefetches |
Total prefetches that has been useful. | |
BaseMMU * | mmu |
Registered mmu for address translations. | |
Protected Attributes inherited from gem5::SimObject | |
const SimObjectParams & | _params |
Cached copy of the object parameters. | |
Protected Attributes inherited from gem5::EventManager | |
EventQueue * | eventq |
A pointer to this object's event queue. | |
Private Types | |
using | EvictionInfo = CacheDataUpdateProbeArg |
Private Attributes | |
std::vector< ProbeListener * > | listeners |
Additional Inherited Members | |
Public Types inherited from gem5::ClockedObject | |
using | Params = ClockedObjectParams |
Parameters of ClockedObject. | |
Public Types inherited from gem5::SimObject | |
typedef SimObjectParams | Params |
Static Public Member Functions inherited from gem5::SimObject | |
static void | serializeAll (const std::string &cpt_dir) |
Create a checkpoint by serializing all SimObjects in the system. | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. | |
static void | setSimObjectResolver (SimObjectResolver *resolver) |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
static SimObjectResolver * | getSimObjectResolver () |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
Static Public Member Functions inherited from gem5::Serializable | |
static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. | |
static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
Generate a checkpoint file so that the serialization can be routed to it. | |
Public Attributes inherited from gem5::ClockedObject | |
PowerState * | powerState |
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private |
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virtualdefault |
void gem5::prefetch::Base::addEventProbe | ( | SimObject * | obj, |
const char * | name ) |
Add a SimObject and a probe name to listen events from.
obj | The SimObject pointer to listen from |
name | The probe name |
Definition at line 292 of file base.cc.
References gem5::SimObject::getProbeManager(), listeners, and gem5::Named::name().
void Base::addMMU | ( | BaseMMU * | mmu | ) |
Add a BaseMMU object to be used whenever a translation is needed.
This is generally required when the prefetcher is allowed to generate page crossing references and/or uses virtual addresses for training.
mmu | pointer to the BaseMMU object to add |
Definition at line 299 of file base.cc.
References fatal_if, gem5::ArmISA::m, and mmu.
Determine the address of the block in which a lays.
Definition at line 202 of file base.cc.
References gem5::ArmISA::a, and blkSize.
Referenced by gem5::prefetch::Tagged::calculatePrefetch(), and gem5::prefetch::Queued::notify().
Determine the address of a at block granularity.
Definition at line 208 of file base.cc.
References gem5::ArmISA::a, and lBlkSize.
Referenced by gem5::prefetch::IrregularStreamBuffer::calculatePrefetch(), and pageIthBlockAddress().
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pure virtual |
Implemented in gem5::prefetch::Multi, and gem5::prefetch::Queued.
Referenced by gem5::BaseCache::getNextQueueEntry(), and gem5::ruby::RubyPrefetcherProxy::issuePrefetch().
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inline |
Definition at line 412 of file base.hh.
References gem5::prefetch::Base::StatGroup::demandMshrMisses, and prefetchStats.
Referenced by gem5::BaseCache::handleTimingReqMiss().
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pure virtual |
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pure virtual |
Notify prefetcher of cache access (may be any access or just misses, depending on cache parameters.)
Implemented in gem5::prefetch::Multi, and gem5::prefetch::Queued.
Referenced by probeNotify().
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inlinevirtual |
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inlinevirtual |
Notify prefetcher of cache fill.
Reimplemented in gem5::prefetch::BOP, gem5::prefetch::Multi, and gem5::prefetch::SBOOE.
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Determine if this access should be observed.
pkt | The memory request causing the event |
miss | whether this event comes from a cache miss |
prefetched | on a hit, this indicates the block was prefetched |
Definition at line 168 of file base.cc.
References gem5::MemCmd::CleanEvict, gem5::Packet::cmd, gem5::X86ISA::inv, gem5::Packet::isInvalidate(), gem5::Packet::isRead(), onData, onInst, onMiss, onRead, onWrite, prefetchOnAccess, prefetchOnPfHit, and gem5::Packet::req.
Referenced by probeNotify().
Determine the address of the page in which a lays.
Definition at line 214 of file base.cc.
References gem5::ArmISA::a, pageBytes, and gem5::roundDown().
Build the address of the i-th block inside the page.
Definition at line 226 of file base.cc.
References blockIndex(), and lBlkSize.
Determine the page-offset of a
Definition at line 220 of file base.cc.
References gem5::ArmISA::a, and pageBytes.
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inline |
Definition at line 418 of file base.hh.
References gem5::prefetch::Base::StatGroup::pfHitInCache, and prefetchStats.
Referenced by gem5::BaseCache::getNextQueueEntry().
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inline |
Definition at line 424 of file base.hh.
References gem5::prefetch::Base::StatGroup::pfHitInMSHR, and prefetchStats.
Referenced by gem5::BaseCache::getNextQueueEntry().
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inline |
Definition at line 430 of file base.hh.
References gem5::prefetch::Base::StatGroup::pfHitInWB, and prefetchStats.
Referenced by gem5::BaseCache::getNextQueueEntry().
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Definition at line 406 of file base.hh.
References gem5::prefetch::Base::StatGroup::pfUnused, and prefetchStats.
Referenced by gem5::BaseCache::invalidateBlock().
void Base::probeNotify | ( | const CacheAccessProbeArg & | acc, |
bool | miss ) |
Process a notification event from the ProbeListener.
acc | probe arg encapsulating the memory request causing the event |
miss | whether this event comes from a cache miss |
Definition at line 232 of file base.cc.
References gem5::CacheAccessProbeArg::cache, gem5::Packet::cmd, gem5::CacheAccessor::coalesce(), gem5::Packet::getAddr(), gem5::CacheAccessor::hasBeenPrefetched(), gem5::Packet::isCleanEviction(), gem5::Packet::isSecure(), gem5::MemCmd::isSWPrefetch(), gem5::Packet::isWrite(), notify(), observeAccess(), panic, gem5::prefetch::Base::StatGroup::pfUseful, gem5::prefetch::Base::StatGroup::pfUsefulButMiss, gem5::CacheAccessProbeArg::pkt, prefetchStats, gem5::Packet::req, requestorId, usefulPrefetches, and useVirtualAddresses.
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overridevirtual |
Register probe points for this object.
If no probes were added by the configuration scripts, connect to the parent cache using the probe "Miss". Also connect to "Hit", if the cache is configured to prefetch on accesses.
Reimplemented from gem5::SimObject.
Definition at line 272 of file base.cc.
References listeners, and probeManager.
Determine if addresses are on the same page.
Definition at line 196 of file base.cc.
References gem5::ArmISA::a, gem5::ArmISA::b, pageBytes, and gem5::roundDown().
Referenced by gem5::prefetch::Queued::insert(), and gem5::prefetch::Queued::notify().
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Reimplemented in gem5::prefetch::Multi.
Definition at line 118 of file base.cc.
References blkSize, gem5::floorLog2(), lBlkSize, probeManager, and system.
Referenced by gem5::prefetch::Multi::setParentInfo().
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The block size of the parent cache.
Definition at line 286 of file base.hh.
Referenced by gem5::prefetch::SignaturePath::addPrefetch(), blockAddress(), gem5::prefetch::SignaturePath::calculatePrefetch(), gem5::prefetch::STeMS::calculatePrefetch(), gem5::prefetch::Stride::calculatePrefetch(), gem5::prefetch::Tagged::calculatePrefetch(), gem5::prefetch::STeMS::checkForActiveGenerationsEnd(), gem5::prefetch::Queued::createPrefetchRequest(), gem5::prefetch::Queued::insert(), setParentInfo(), gem5::prefetch::BOP::tag(), and gem5::prefetch::Queued::translationComplete().
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Total prefetches issued.
Definition at line 372 of file base.hh.
Referenced by gem5::prefetch::SignaturePathV2::calculateLookaheadConfidence(), gem5::prefetch::Queued::getMaxPermittedPrefetches(), gem5::prefetch::Multi::getPacket(), and gem5::prefetch::Queued::getPacket().
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log_2(block size of the parent cache).
Definition at line 289 of file base.hh.
Referenced by blockIndex(), gem5::prefetch::BOP::calculatePrefetch(), gem5::prefetch::IrregularStreamBuffer::calculatePrefetch(), gem5::prefetch::PIF::calculatePrefetch(), gem5::prefetch::SBOOE::calculatePrefetch(), gem5::prefetch::PIF::notifyRetiredInst(), pageIthBlockAddress(), and setParentInfo().
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Definition at line 102 of file base.hh.
Referenced by addEventProbe(), and regProbeListeners().
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Registered mmu for address translations.
Definition at line 377 of file base.hh.
Referenced by addMMU(), gem5::prefetch::Queued::notify(), gem5::prefetch::Queued::processMissingTranslations(), gem5::prefetch::Queued::DeferredPacket::startTranslation(), and gem5::prefetch::Queued::translationComplete().
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Consult prefetcher on data accesses?
Definition at line 301 of file base.hh.
Referenced by observeAccess().
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Consult prefetcher on instruction accesses?
Definition at line 304 of file base.hh.
Referenced by observeAccess().
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Only consult prefetcher on cache misses?
Definition at line 292 of file base.hh.
Referenced by observeAccess().
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Definition at line 309 of file base.hh.
Referenced by gem5::prefetch::SignaturePath::addPrefetch(), gem5::prefetch::SignaturePath::calculatePrefetch(), pageAddress(), pageOffset(), and samePage().
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Prefetch on every access, not just misses.
Definition at line 312 of file base.hh.
Referenced by observeAccess().
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Prefetch on hit on prefetched lines.
Definition at line 315 of file base.hh.
Referenced by observeAccess().
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Pointer to the parent cache's probe manager.
Definition at line 283 of file base.hh.
Referenced by regProbeListeners(), and setParentInfo().
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Request id for prefetches.
Definition at line 307 of file base.hh.
Referenced by gem5::prefetch::Queued::createPrefetchRequest(), gem5::prefetch::Queued::insert(), probeNotify(), and gem5::prefetch::Queued::translationComplete().
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Pointer to the parent system.
Definition at line 280 of file base.hh.
Referenced by gem5::prefetch::Queued::insert(), and setParentInfo().
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Total prefetches that has been useful.
Definition at line 374 of file base.hh.
Referenced by gem5::prefetch::SignaturePathV2::calculateLookaheadConfidence(), gem5::prefetch::Queued::getMaxPermittedPrefetches(), and probeNotify().
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Use Virtual Addresses for prefetching.
Definition at line 318 of file base.hh.
Referenced by gem5::prefetch::Queued::insert(), and probeNotify().