gem5 v24.0.0.0
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#include <interrupts.hh>
Public Types | |
using | Params = RiscvInterruptsParams |
Public Types inherited from gem5::BaseInterrupts | |
using | Params = BaseInterruptsParams |
Public Types inherited from gem5::SimObject | |
typedef SimObjectParams | Params |
Public Member Functions | |
Interrupts (const Params &p) | |
std::bitset< NumInterruptTypes > | globalMask () const |
bool | checkNonMaskableInterrupt () const |
bool | checkInterrupt (int num) const |
bool | checkInterrupts () const override |
Fault | getInterrupt () override |
void | updateIntrInfo () override |
void | post (int int_num, int index) override |
void | clear (int int_num, int index) override |
void | postNMI () |
void | clearNMI () |
void | clearAll () override |
uint64_t | readIP () const |
uint64_t | readIE () const |
void | setIP (const uint64_t &val) |
void | setIE (const uint64_t &val) |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
Port & | getPort (const std::string &if_name, PortID idx) override |
Get a port with a given name and index. | |
void | raiseInterruptPin (uint32_t num) |
void | lowerInterruptPin (uint32_t num) |
Public Member Functions inherited from gem5::BaseInterrupts | |
BaseInterrupts (const Params &p) | |
virtual void | setThreadContext (ThreadContext *_tc) |
Public Member Functions inherited from gem5::SimObject | |
const Params & | params () const |
SimObject (const Params &p) | |
virtual | ~SimObject () |
virtual void | init () |
init() is called after all C++ SimObjects have been created and all ports are connected. | |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. | |
virtual void | regProbePoints () |
Register probe points for this object. | |
virtual void | regProbeListeners () |
Register probe listeners for this object. | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. | |
virtual void | startup () |
startup() is the final initialization call before simulation. | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. | |
virtual void | memWriteback () |
Write back dirty buffers to memory using functional writes. | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
Public Member Functions inherited from gem5::EventManager | |
EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick) -1) |
This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. | |
void | setCurTick (Tick newVal) |
EventManager (EventManager &em) | |
Event manger manages events in the event queue. | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
Public Member Functions inherited from gem5::Serializable | |
Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from gem5::Drainable | |
DrainState | drainState () const |
Return the current drain state of an object. | |
virtual void | notifyFork () |
Notify a child process of a fork. | |
Public Member Functions inherited from gem5::statistics::Group | |
Group (Group *parent, const char *name=nullptr) | |
Construct a new statistics group. | |
virtual | ~Group () |
virtual void | regStats () |
Callback to set stat parameters. | |
virtual void | resetStats () |
Callback to reset stats. | |
virtual void | preDumpStats () |
Callback before stats are dumped. | |
void | addStat (statistics::Info *info) |
Register a stat with this group. | |
const std::map< std::string, Group * > & | getStatGroups () const |
Get all child groups associated with this object. | |
const std::vector< Info * > & | getStats () const |
Get all stats associated with this object. | |
void | addStatGroup (const char *name, Group *block) |
Add a stat block as a child of this block. | |
const Info * | resolveStat (std::string name) const |
Resolve a stat by its name within this group. | |
void | mergeStatGroup (Group *block) |
Merge the contents (stats & children) of a block to this block. | |
Group ()=delete | |
Group (const Group &)=delete | |
Group & | operator= (const Group &)=delete |
Public Member Functions inherited from gem5::Named | |
Named (const std::string &name_) | |
virtual | ~Named ()=default |
virtual std::string | name () const |
Private Attributes | |
std::bitset< NumInterruptTypes > | ip |
std::bitset< NumInterruptTypes > | ie |
std::vector< gem5::IntSinkPin< Interrupts > * > | localInterruptPins |
Additional Inherited Members | |
Static Public Member Functions inherited from gem5::SimObject | |
static void | serializeAll (const std::string &cpt_dir) |
Create a checkpoint by serializing all SimObjects in the system. | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. | |
static void | setSimObjectResolver (SimObjectResolver *resolver) |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
static SimObjectResolver * | getSimObjectResolver () |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
Static Public Member Functions inherited from gem5::Serializable | |
static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. | |
static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
Generate a checkpoint file so that the serialization can be routed to it. | |
Protected Member Functions inherited from gem5::Drainable | |
Drainable () | |
virtual | ~Drainable () |
virtual void | drainResume () |
Resume execution after a successful drain. | |
void | signalDrainDone () const |
Signal that an object is drained. | |
Protected Attributes inherited from gem5::BaseInterrupts | |
ThreadContext * | tc = nullptr |
Protected Attributes inherited from gem5::SimObject | |
const SimObjectParams & | _params |
Cached copy of the object parameters. | |
Protected Attributes inherited from gem5::EventManager | |
EventQueue * | eventq |
A pointer to this object's event queue. | |
Definition at line 59 of file interrupts.hh.
using gem5::RiscvISA::Interrupts::Params = RiscvInterruptsParams |
Definition at line 67 of file interrupts.hh.
gem5::RiscvISA::Interrupts::Interrupts | ( | const Params & | p | ) |
Definition at line 39 of file interrupts.cc.
References gem5::csprintf(), gem5::RiscvISA::i, localInterruptPins, and gem5::RiscvISA::p.
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inlineoverridevirtual |
Implements gem5::BaseInterrupts.
Definition at line 80 of file interrupts.hh.
References checkNonMaskableInterrupt(), globalMask(), ie, and ip.
Referenced by getInterrupt().
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inline |
Definition at line 74 of file interrupts.hh.
References gem5::RiscvISA::MISCREG_NMIE, gem5::RiscvISA::MISCREG_NMIP, gem5::ThreadContext::readMiscReg(), and gem5::BaseInterrupts::tc.
Referenced by checkInterrupts(), and getInterrupt().
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overridevirtual |
Reimplemented from gem5::BaseInterrupts.
Definition at line 190 of file interrupts.cc.
References clearNMI(), DPRINTF, gem5::RiscvISA::index, gem5::RiscvISA::INT_NMI, and ip.
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overridevirtual |
Reimplemented from gem5::BaseInterrupts.
Definition at line 201 of file interrupts.cc.
References clearNMI(), DPRINTF, and ip.
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inline |
Definition at line 94 of file interrupts.hh.
References gem5::RiscvISA::MISCREG_NMIP, gem5::ThreadContext::setMiscReg(), and gem5::BaseInterrupts::tc.
Referenced by clear(), and clearAll().
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overridevirtual |
Implements gem5::BaseInterrupts.
Definition at line 130 of file interrupts.cc.
References checkInterrupt(), checkInterrupts(), checkNonMaskableInterrupt(), gem5::ThreadContext::getIsaPtr(), globalMask(), gem5::ArmISA::id, gem5::RiscvISA::INT_EXT_MACHINE, gem5::RiscvISA::INT_EXT_SUPER, gem5::RiscvISA::INT_EXT_USER, gem5::RiscvISA::INT_LOCAL_0, gem5::RiscvISA::INT_LOCAL_1, gem5::RiscvISA::INT_LOCAL_10, gem5::RiscvISA::INT_LOCAL_11, gem5::RiscvISA::INT_LOCAL_12, gem5::RiscvISA::INT_LOCAL_13, gem5::RiscvISA::INT_LOCAL_14, gem5::RiscvISA::INT_LOCAL_15, gem5::RiscvISA::INT_LOCAL_16, gem5::RiscvISA::INT_LOCAL_17, gem5::RiscvISA::INT_LOCAL_18, gem5::RiscvISA::INT_LOCAL_19, gem5::RiscvISA::INT_LOCAL_2, gem5::RiscvISA::INT_LOCAL_20, gem5::RiscvISA::INT_LOCAL_21, gem5::RiscvISA::INT_LOCAL_22, gem5::RiscvISA::INT_LOCAL_23, gem5::RiscvISA::INT_LOCAL_24, gem5::RiscvISA::INT_LOCAL_25, gem5::RiscvISA::INT_LOCAL_26, gem5::RiscvISA::INT_LOCAL_27, gem5::RiscvISA::INT_LOCAL_28, gem5::RiscvISA::INT_LOCAL_29, gem5::RiscvISA::INT_LOCAL_3, gem5::RiscvISA::INT_LOCAL_30, gem5::RiscvISA::INT_LOCAL_31, gem5::RiscvISA::INT_LOCAL_32, gem5::RiscvISA::INT_LOCAL_33, gem5::RiscvISA::INT_LOCAL_34, gem5::RiscvISA::INT_LOCAL_35, gem5::RiscvISA::INT_LOCAL_36, gem5::RiscvISA::INT_LOCAL_37, gem5::RiscvISA::INT_LOCAL_38, gem5::RiscvISA::INT_LOCAL_39, gem5::RiscvISA::INT_LOCAL_4, gem5::RiscvISA::INT_LOCAL_40, gem5::RiscvISA::INT_LOCAL_41, gem5::RiscvISA::INT_LOCAL_42, gem5::RiscvISA::INT_LOCAL_43, gem5::RiscvISA::INT_LOCAL_44, gem5::RiscvISA::INT_LOCAL_45, gem5::RiscvISA::INT_LOCAL_46, gem5::RiscvISA::INT_LOCAL_47, gem5::RiscvISA::INT_LOCAL_5, gem5::RiscvISA::INT_LOCAL_6, gem5::RiscvISA::INT_LOCAL_7, gem5::RiscvISA::INT_LOCAL_8, gem5::RiscvISA::INT_LOCAL_9, gem5::RiscvISA::INT_SOFTWARE_MACHINE, gem5::RiscvISA::INT_SOFTWARE_SUPER, gem5::RiscvISA::INT_SOFTWARE_USER, gem5::RiscvISA::INT_TIMER_MACHINE, gem5::RiscvISA::INT_TIMER_SUPER, gem5::RiscvISA::INT_TIMER_USER, gem5::RiscvISA::mask, gem5::NoFault, gem5::RiscvISA::RV32, gem5::RiscvISA::RV64, and gem5::BaseInterrupts::tc.
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overridevirtual |
Get a port with a given name and index.
This is used at binding time and returns a reference to a protocol-agnostic port.
gem5 has a request and response port interface. All memory objects are connected together via ports. These ports provide a rigid interface between these memory objects. These ports implement three different memory system modes: timing, atomic, and functional. The most important mode is the timing mode and here timing mode is used for conducting cycle-level timing experiments. The other modes are only used in special circumstances and should not be used to conduct cycle-level timing experiments. The other modes are only used in special circumstances. These ports allow SimObjects to communicate with each other.
if_name | Port name |
idx | Index in the case of a VectorPort |
Reimplemented from gem5::SimObject.
Definition at line 235 of file interrupts.cc.
References gem5::SimObject::getPort(), and localInterruptPins.
std::bitset< NumInterruptTypes > gem5::RiscvISA::Interrupts::globalMask | ( | ) | const |
Definition at line 58 of file interrupts.cc.
References gem5::RiscvISA::INTERRUPT, gem5::ArmISA::mask, gem5::RiscvISA::mask, gem5::RiscvISA::MISCREG_ISA, gem5::RiscvISA::MISCREG_MIDELEG, gem5::RiscvISA::MISCREG_PRV, gem5::RiscvISA::MISCREG_SIDELEG, gem5::RiscvISA::MISCREG_STATUS, panic, gem5::RiscvISA::PRV_M, gem5::RiscvISA::PRV_S, gem5::RiscvISA::PRV_U, gem5::ThreadContext::readMiscReg(), gem5::ThreadContext::readMiscRegNoEffect(), gem5::ArmISA::status, and gem5::BaseInterrupts::tc.
Referenced by checkInterrupts(), and getInterrupt().
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inline |
Definition at line 110 of file interrupts.hh.
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Reimplemented from gem5::BaseInterrupts.
Definition at line 179 of file interrupts.cc.
References DPRINTF, gem5::RiscvISA::index, gem5::RiscvISA::INT_NMI, ip, and postNMI().
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inline |
Definition at line 93 of file interrupts.hh.
References gem5::RiscvISA::MISCREG_NMIP, gem5::ThreadContext::setMiscReg(), and gem5::BaseInterrupts::tc.
Referenced by post().
void gem5::RiscvISA::Interrupts::raiseInterruptPin | ( | uint32_t | num | ) |
Definition at line 209 of file interrupts.cc.
References gem5::ThreadContext::getCpuPtr(), gem5::BaseCPU::postInterrupt(), gem5::BaseInterrupts::tc, and gem5::ThreadContext::threadId().
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Definition at line 99 of file interrupts.hh.
References ie.
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Definition at line 98 of file interrupts.hh.
References ip.
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overridevirtual |
Serialize an object.
Output an object's state into the current checkpoint section.
cp | Checkpoint state |
Implements gem5::Serializable.
Definition at line 215 of file interrupts.cc.
References ie, ip, and SERIALIZE_SCALAR.
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inline |
Definition at line 101 of file interrupts.hh.
References ie, and gem5::X86ISA::val.
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inline |
Definition at line 100 of file interrupts.hh.
References ip, and gem5::X86ISA::val.
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overridevirtual |
Unserialize an object.
Read an object's state from the current checkpoint section.
cp | Checkpoint state |
Implements gem5::Serializable.
Definition at line 224 of file interrupts.cc.
References ie, ip, and UNSERIALIZE_SCALAR.
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inlineoverridevirtual |
Implements gem5::BaseInterrupts.
Definition at line 87 of file interrupts.hh.
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private |
Definition at line 63 of file interrupts.hh.
Referenced by checkInterrupt(), checkInterrupts(), readIE(), serialize(), setIE(), and unserialize().
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private |
Definition at line 62 of file interrupts.hh.
Referenced by checkInterrupt(), checkInterrupts(), clear(), clearAll(), post(), readIP(), serialize(), setIP(), and unserialize().
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private |
Definition at line 65 of file interrupts.hh.
Referenced by getPort(), and Interrupts().