gem5 v24.0.0.0
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gem5::VectorRegisterFile Class Reference

#include <vector_register_file.hh>

Inheritance diagram for gem5::VectorRegisterFile:
gem5::RegisterFile gem5::SimObject gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Public Types

using VecRegContainer = TheGpuISA::VecRegContainerU32
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 

Public Member Functions

 VectorRegisterFile (const VectorRegisterFileParams &p)
 
 ~VectorRegisterFile ()
 
virtual bool operandsReady (Wavefront *w, GPUDynInstPtr ii) const override
 
virtual void scheduleWriteOperands (Wavefront *w, GPUDynInstPtr ii) override
 
virtual void scheduleWriteOperandsFromLoad (Wavefront *w, GPUDynInstPtr ii) override
 
virtual void waveExecuteInst (Wavefront *w, GPUDynInstPtr ii) override
 
void setParent (ComputeUnit *_computeUnit) override
 
VecRegContainerreadWriteable (int regIdx)
 
const VecRegContainerread (int regIdx) const
 
void write (int regIdx, const VecRegContainer &value)
 
void printReg (Wavefront *wf, int regIdx) const
 
- Public Member Functions inherited from gem5::RegisterFile
 RegisterFile (const RegisterFileParams &p)
 
virtual ~RegisterFile ()
 
int numRegs () const
 
virtual bool regBusy (int idx) const
 
virtual void markReg (int regIdx, bool value)
 
virtual void enqRegFreeEvent (uint32_t regIdx, uint64_t delay)
 
virtual void enqRegBusyEvent (uint32_t regIdx, uint64_t delay)
 
virtual bool canScheduleReadOperands (Wavefront *w, GPUDynInstPtr ii)
 
virtual bool canScheduleWriteOperands (Wavefront *w, GPUDynInstPtr ii)
 
virtual void scheduleReadOperands (Wavefront *w, GPUDynInstPtr ii)
 
virtual bool operandReadComplete (Wavefront *w, GPUDynInstPtr ii)
 
virtual bool canScheduleWriteOperandsFromLoad (Wavefront *w, GPUDynInstPtr ii)
 
virtual void exec ()
 
virtual std::string dump () const
 
virtual void dispatchInstruction (GPUDynInstPtr ii)
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void init ()
 init() is called after all C++ SimObjects have been created and all ports are connected.
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint.
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint.
 
virtual void regProbePoints ()
 Register probe points for this object.
 
virtual void regProbeListeners ()
 Register probe listeners for this object.
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object.
 
virtual PortgetPort (const std::string &if_name, PortID idx=InvalidPortID)
 Get a port with a given name and index.
 
virtual void startup ()
 startup() is the final initialization call before simulation.
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining.
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes.
 
virtual void memInvalidate ()
 Invalidate the contents of memory buffers.
 
void serialize (CheckpointOut &cp) const override
 Serialize an object.
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object.
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue.
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section.
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object.
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object.
 
virtual void notifyFork ()
 Notify a child process of a fork.
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group.
 
virtual ~Group ()
 
virtual void regStats ()
 Callback to set stat parameters.
 
virtual void resetStats ()
 Callback to reset stats.
 
virtual void preDumpStats ()
 Callback before stats are dumped.
 
void addStat (statistics::Info *info)
 Register a stat with this group.
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object.
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object.
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block.
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group.
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block.
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 

Private Attributes

std::vector< VecRegContainerregFile
 

Additional Inherited Members

- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system.
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it.
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section.
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it.
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
virtual void drainResume ()
 Resume execution after a successful drain.
 
void signalDrainDone () const
 Signal that an object is drained.
 
- Protected Attributes inherited from gem5::RegisterFile
ComputeUnitcomputeUnit
 
int simdId
 
std::vector< bool > busy
 
int _numRegs
 
gem5::RegisterFile::RegisterFileStats stats
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters.
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue.
 

Detailed Description

Definition at line 47 of file vector_register_file.hh.

Member Typedef Documentation

◆ VecRegContainer

using gem5::VectorRegisterFile::VecRegContainer = TheGpuISA::VecRegContainerU32

Definition at line 50 of file vector_register_file.hh.

Constructor & Destructor Documentation

◆ VectorRegisterFile()

gem5::VectorRegisterFile::VectorRegisterFile ( const VectorRegisterFileParams & p)

Definition at line 49 of file vector_register_file.cc.

References gem5::RegisterFile::numRegs(), gem5::X86ISA::reg, and regFile.

◆ ~VectorRegisterFile()

gem5::VectorRegisterFile::~VectorRegisterFile ( )
inline

Definition at line 53 of file vector_register_file.hh.

Member Function Documentation

◆ operandsReady()

bool gem5::VectorRegisterFile::operandsReady ( Wavefront * w,
GPUDynInstPtr ii ) const
overridevirtual

◆ printReg()

void gem5::VectorRegisterFile::printReg ( Wavefront * wf,
int regIdx ) const
inline

◆ read()

const VecRegContainer & gem5::VectorRegisterFile::read ( int regIdx) const
inline

Definition at line 77 of file vector_register_file.hh.

References regFile.

◆ readWriteable()

VecRegContainer & gem5::VectorRegisterFile::readWriteable ( int regIdx)
inline

Definition at line 70 of file vector_register_file.hh.

References regFile.

◆ scheduleWriteOperands()

void gem5::VectorRegisterFile::scheduleWriteOperands ( Wavefront * w,
GPUDynInstPtr ii )
overridevirtual

if the instruction is a load with EXEC = 0, then we do not mark the reg. We do this to avoid a deadlock that can occur because a load reserves its destination regs before checking its exec mask, and in the cas it is 0, it will not send/recv any packets, and therefore it will never free its dst reg(s)

Reimplemented from gem5::RegisterFile.

Definition at line 99 of file vector_register_file.cc.

References gem5::RegisterFile::markReg().

◆ scheduleWriteOperandsFromLoad()

◆ setParent()

void gem5::VectorRegisterFile::setParent ( ComputeUnit * _computeUnit)
inlineoverridevirtual

Reimplemented from gem5::RegisterFile.

Definition at line 63 of file vector_register_file.hh.

References gem5::RegisterFile::setParent().

◆ waveExecuteInst()

◆ write()

void gem5::VectorRegisterFile::write ( int regIdx,
const VecRegContainer & value )
inline

Definition at line 84 of file vector_register_file.hh.

References regFile.

Member Data Documentation

◆ regFile

std::vector<VecRegContainer> gem5::VectorRegisterFile::regFile
private

Definition at line 107 of file vector_register_file.hh.

Referenced by printReg(), read(), readWriteable(), VectorRegisterFile(), and write().


The documentation for this class was generated from the following files:

Generated on Tue Jun 18 2024 16:24:15 for gem5 by doxygen 1.11.0