gem5 v24.0.0.0
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capstone.cc
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1/*
2 * Copyright (c) 2023 Arm Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#include "cpu/capstone.hh"
39
40#include "base/output.hh"
41
42namespace gem5
43{
44
45namespace trace
46{
47
48std::string
50 const PCStateBase &pc,
51 const loader::SymbolTable *symtab) const
52{
53 std::string inst_dist;
54 if (inst->isPseudo() || inst->isMicroop()) {
55 // Capstone doesn't have any visibility over microops nor over
56 // gem5 pseudo ops. Use native disassembler instead
57 inst_dist = InstDisassembler::disassemble(inst, pc, symtab);
58 } else {
59 // Stripping the extended fields from the ExtMachInst
60 auto mach_inst = inst->getEMI() & mask(inst->size() * 8);
61
62 cs_insn *insn;
63 // capstone disassembler
64 if (const csh *curr_handle = currHandle(pc); curr_handle != nullptr) {
65 size_t count = cs_disasm(*curr_handle, (uint8_t*)&mach_inst,
66 inst->size(), 0, 0, &insn);
67
68 // As we are passing only one instruction, we are expecting one instruction only
69 // being disassembled
70 assert(count <= 1);
71
72 for (int idx = 0; idx < count; idx++) {
73 inst_dist += csprintf(" %s %s", insn[idx].mnemonic, insn[idx].op_str);
74 }
75 } else {
76 // No valid handle; return an invalid string
77 inst_dist += " capstone failure";
78 }
79 }
80
81 return inst_dist;
82}
83
88
89} // namespace trace
90} // namespace gem5
SimObjectParams Params
virtual uint64_t getEMI() const
bool isPseudo() const
size_t size() const
bool isMicroop() const
std::string disassemble(StaticInstPtr inst, const PCStateBase &pc, const loader::SymbolTable *symtab) const override
Definition capstone.cc:49
CapstoneDisassembler(const Params &p)
Definition capstone.cc:84
virtual const csh * currHandle(const PCStateBase &pc) const =0
Return a pointer to the current capstone handle (csh).
The base InstDisassembler class provides a one-API interface to disassemble the instruction passed as...
virtual std::string disassemble(StaticInstPtr inst, const PCStateBase &pc, const loader::SymbolTable *symtab) const
Bitfield< 3, 0 > mask
Definition pcstate.hh:63
Bitfield< 4 > pc
Bitfield< 0 > p
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
std::string csprintf(const char *format, const Args &...args)
Definition cprintf.hh:161

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