gem5  v22.0.0.2
fetch_stage.cc
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31 
33 
35 #include "gpu-compute/wavefront.hh"
36 
37 namespace gem5
38 {
39 
40 FetchStage::FetchStage(const ComputeUnitParams &p, ComputeUnit &cu)
41  : numVectorALUs(p.num_SIMDs), computeUnit(cu),
42  _name(cu.name() + ".FetchStage"), stats(&cu)
43 {
44  for (int j = 0; j < numVectorALUs; ++j) {
45  FetchUnit newFetchUnit(p, cu);
46  _fetchUnit.push_back(newFetchUnit);
47  }
48 }
49 
51 {
52  _fetchUnit.clear();
53 }
54 
55 void
57 {
58  for (int j = 0; j < numVectorALUs; ++j) {
59  _fetchUnit[j].bindWaveList(&computeUnit.wfList[j]);
60  _fetchUnit[j].init();
61  }
62 }
63 
64 void
66 {
67  for (int j = 0; j < numVectorALUs; ++j) {
68  _fetchUnit[j].exec();
69  }
70 }
71 
72 void
74 {
75  ComputeUnit::SQCPort::SenderState *sender_state =
76  safe_cast<ComputeUnit::SQCPort::SenderState*>(pkt->senderState);
77 
78  Wavefront *wavefront = sender_state->wavefront;
79 
80  const unsigned num_instructions = pkt->req->getSize() /
81  sizeof(TheGpuISA::RawMachInst);
82 
83  stats.instFetchInstReturned.sample(num_instructions);
84  uint32_t simdId = wavefront->simdId;
85  _fetchUnit[simdId].processFetchReturn(pkt);
86 }
87 
88 void
90 {
91  _fetchUnit[wavefront->simdId].fetch(pkt, wavefront);
92 }
93 
95  : statistics::Group(parent, "FetchStage"),
96  ADD_STAT(instFetchInstReturned, "For each instruction fetch request "
97  "received record how many instructions you got from it")
98 {
99  instFetchInstReturned.init(1, 32, 1);
100 }
101 
102 } // namespace gem5
gem5::ComputeUnit::SQCPort::SenderState
Definition: compute_unit.hh:662
gem5::FetchStage::numVectorALUs
int numVectorALUs
Definition: fetch_stage.hh:69
gem5::ComputeUnit::wfList
std::vector< std::vector< Wavefront * > > wfList
Definition: compute_unit.hh:291
gem5::FetchStage::~FetchStage
~FetchStage()
Definition: fetch_stage.cc:50
gem5::FetchStage::processFetchReturn
void processFetchReturn(PacketPtr pkt)
Definition: fetch_stage.cc:73
gem5::FetchStage::exec
void exec()
Definition: fetch_stage.cc:65
fetch_stage.hh
gem5::Packet::req
RequestPtr req
A pointer to the original request.
Definition: packet.hh:374
gem5::Wavefront
Definition: wavefront.hh:60
gem5::FetchStage::init
void init()
Definition: fetch_stage.cc:56
compute_unit.hh
gem5::ComputeUnit::SQCPort::SenderState::wavefront
Wavefront * wavefront
Definition: compute_unit.hh:664
gem5::FetchStage::FetchStage
FetchStage(const ComputeUnitParams &p, ComputeUnit &cu)
Definition: fetch_stage.cc:40
gem5::FetchUnit
Definition: fetch_unit.hh:55
gem5::FetchStage::fetch
void fetch(PacketPtr pkt, Wavefront *wave)
Definition: fetch_stage.cc:89
gem5::statistics::DistBase::sample
void sample(const U &v, int n=1)
Add a value to the distribtion n times.
Definition: statistics.hh:1328
gem5::FetchStage::FetchStageStats::instFetchInstReturned
statistics::Distribution instFetchInstReturned
Definition: fetch_stage.hh:82
wavefront.hh
gem5::FetchStage::stats
gem5::FetchStage::FetchStageStats stats
gem5::ArmISA::j
Bitfield< 24 > j
Definition: misc_types.hh:57
gem5::ComputeUnit
Definition: compute_unit.hh:201
gem5::FetchStage::computeUnit
ComputeUnit & computeUnit
Definition: fetch_stage.hh:70
gem5::statistics::Distribution::init
Distribution & init(Counter min, Counter max, Counter bkt)
Set the parameters of this distribution.
Definition: statistics.hh:2113
gem5::VegaISA::p
Bitfield< 54 > p
Definition: pagetable.hh:70
gem5::FetchStage::FetchStageStats::FetchStageStats
FetchStageStats(statistics::Group *parent)
Definition: fetch_stage.cc:94
ADD_STAT
#define ADD_STAT(n,...)
Convenience macro to add a stat to a statistics group.
Definition: group.hh:75
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:291
gem5::FetchStage::_fetchUnit
std::vector< FetchUnit > _fetchUnit
Definition: fetch_stage.hh:74
gem5::Packet::senderState
SenderState * senderState
This packet's sender state.
Definition: packet.hh:542
name
const std::string & name()
Definition: trace.cc:49
gem5::statistics::Group
Statistics container.
Definition: group.hh:93
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::Gcn3ISA::RawMachInst
uint64_t RawMachInst
used to represnt a GPU inst in its raw format.
Definition: gpu_types.hh:42
gem5::Wavefront::simdId
const int simdId
Definition: wavefront.hh:99

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