gem5 v24.0.0.0
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gem5::FetchUnit Class Reference

#include <fetch_unit.hh>

Classes

class  FetchBufDesc
 fetch buffer descriptor. More...
 
class  SystemHubEvent
 

Public Member Functions

 FetchUnit (const ComputeUnitParams &p, ComputeUnit &cu)
 
 ~FetchUnit ()
 
void init ()
 
void exec ()
 
void bindWaveList (std::vector< Wavefront * > *list)
 
void initiateFetch (Wavefront *wavefront)
 
void fetch (PacketPtr pkt, Wavefront *wavefront)
 
void processFetchReturn (PacketPtr pkt)
 
void flushBuf (int wfSlotId)
 

Static Public Attributes

static uint32_t globalFetchUnitID
 

Private Attributes

bool timingSim
 
ComputeUnitcomputeUnit
 
TheGpuISA::Decoder decoder
 
Scheduler fetchScheduler
 
std::vector< Wavefront * > fetchQueue
 
std::vector< std::pair< Wavefront *, bool > > fetchStatusQueue
 
std::vector< Wavefront * > * waveList
 
std::vector< FetchBufDescfetchBuf
 
int fetchDepth
 number of cache lines we can fetch and buffer.
 

Detailed Description

Definition at line 55 of file fetch_unit.hh.

Constructor & Destructor Documentation

◆ FetchUnit()

gem5::FetchUnit::FetchUnit ( const ComputeUnitParams & p,
ComputeUnit & cu )

Definition at line 52 of file fetch_unit.cc.

◆ ~FetchUnit()

gem5::FetchUnit::~FetchUnit ( )

Definition at line 58 of file fetch_unit.cc.

References fetchQueue, and fetchStatusQueue.

Member Function Documentation

◆ bindWaveList()

void gem5::FetchUnit::bindWaveList ( std::vector< Wavefront * > * list)

Definition at line 339 of file fetch_unit.cc.

References waveList.

◆ exec()

void gem5::FetchUnit::exec ( )

now we check if any of the fetch buffers have buffered instruction data that can be decoded and sent to its wavefront's instruction buffer. then we check if any of the fetch buffer entries can be released. we only check if we can release a buffer

Definition at line 84 of file fetch_unit.cc.

References gem5::Scheduler::chooseWave(), computeUnit, fetchBuf, fetchQueue, fetchScheduler, fetchStatusQueue, gem5::Wavefront::getStatus(), initiateFetch(), gem5::Shader::n_wf, gem5::Wavefront::pendingFetch, gem5::Wavefront::S_RUNNING, gem5::Wavefront::S_WAITCNT, gem5::ComputeUnit::shader, gem5::Wavefront::stopFetch(), and gem5::Wavefront::wfSlotId.

◆ fetch()

void gem5::FetchUnit::fetch ( PacketPtr pkt,
Wavefront * wavefront )

this is necessary because the GPU TLB receives packets instead of requests. when the translation is complete, all relevent fields in the request will be populated, but not in the packet. here we create the new packet so we can set the size, addr, and proper flags.

if we have not reserved an entry in the fetch buffer, stop fetching. this can happen due to a branch instruction flushing the fetch buffer while an ITLB or I-cache request is still pending, in the same cycle another instruction is trying to fetch.

For full system, if this is a device request we need to set the requestor ID of the packet to the GPU memory manager so it is routed through Ruby as a memory request and not a PIO request.

we should have reserved an entry in the fetch buffer for this cache line. here we get the pointer to the entry used to buffer this request's line data.

Definition at line 230 of file fetch_unit.cc.

References gem5::Packet::cmd, computeUnit, gem5::ComputeUnit::cu_id, gem5::Packet::dataStatic(), DPRINTF, gem5::Wavefront::dropFetch, fetchBuf, gem5::Wavefront::pendingFetch, processFetchReturn(), gem5::Packet::req, gem5::ComputeUnit::SQCPort::retries, gem5::Packet::senderState, gem5::RequestPort::sendFunctional(), gem5::AMDGPUSystemHub::sendRequest(), gem5::RequestPort::sendTimingReq(), gem5::ComputeUnit::shader, gem5::Wavefront::simdId, gem5::ComputeUnit::sqcPort, gem5::Shader::systemHub, timingSim, gem5::ComputeUnit::vramRequestorId(), and gem5::Wavefront::wfSlotId.

Referenced by initiateFetch().

◆ flushBuf()

void gem5::FetchUnit::flushBuf ( int wfSlotId)

◆ init()

◆ initiateFetch()

void gem5::FetchUnit::initiateFetch ( Wavefront * wavefront)

◆ processFetchReturn()

Member Data Documentation

◆ computeUnit

ComputeUnit& gem5::FetchUnit::computeUnit
private

Definition at line 258 of file fetch_unit.hh.

Referenced by exec(), fetch(), init(), initiateFetch(), and processFetchReturn().

◆ decoder

TheGpuISA::Decoder gem5::FetchUnit::decoder
private

Definition at line 259 of file fetch_unit.hh.

Referenced by init().

◆ fetchBuf

std::vector<FetchBufDesc> gem5::FetchUnit::fetchBuf
private

Definition at line 279 of file fetch_unit.hh.

Referenced by exec(), fetch(), flushBuf(), init(), initiateFetch(), and processFetchReturn().

◆ fetchDepth

int gem5::FetchUnit::fetchDepth
private

number of cache lines we can fetch and buffer.

this includes the currently fetched line (i.e., the line that corresponds to the WF's current PC), as well as any lines that may be prefetched.

Definition at line 286 of file fetch_unit.hh.

Referenced by gem5::FetchUnit::FetchBufDesc::flushBuf(), init(), and gem5::FetchUnit::FetchBufDesc::reserveBuf().

◆ fetchQueue

std::vector<Wavefront*> gem5::FetchUnit::fetchQueue
private

Definition at line 269 of file fetch_unit.hh.

Referenced by exec(), init(), and ~FetchUnit().

◆ fetchScheduler

Scheduler gem5::FetchUnit::fetchScheduler
private

Definition at line 265 of file fetch_unit.hh.

Referenced by exec(), and init().

◆ fetchStatusQueue

std::vector<std::pair<Wavefront*, bool> > gem5::FetchUnit::fetchStatusQueue
private

Definition at line 274 of file fetch_unit.hh.

Referenced by exec(), init(), and ~FetchUnit().

◆ globalFetchUnitID

uint32_t gem5::FetchUnit::globalFetchUnitID
static

Definition at line 67 of file fetch_unit.hh.

◆ timingSim

bool gem5::FetchUnit::timingSim
private

Definition at line 257 of file fetch_unit.hh.

Referenced by fetch(), init(), and initiateFetch().

◆ waveList

std::vector<Wavefront*>* gem5::FetchUnit::waveList
private

Definition at line 277 of file fetch_unit.hh.

Referenced by bindWaveList(), and init().


The documentation for this class was generated from the following files:

Generated on Tue Jun 18 2024 16:24:11 for gem5 by doxygen 1.11.0