gem5 v24.0.0.0
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host.hh
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1/*
2 * Copyright (c) 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#ifndef __DEV_PCI_HOST_HH__
39#define __DEV_PCI_HOST_HH__
40
41#include "dev/io_device.hh"
42#include "dev/pci/types.hh"
43
44namespace gem5
45{
46
47struct PciHostParams;
48struct GenericPciHostParams;
49
50class PciDevice;
51class Platform;
52
75class PciHost : public PioDevice
76{
77 public:
78 PciHost(const PciHostParams &p);
79 virtual ~PciHost();
80
81 public:
95 {
96 friend class gem5::PciHost;
97
98 protected:
107
108 public:
109 DeviceInterface() = delete;
110 void operator=(const DeviceInterface &) = delete;
111
112 const std::string name() const;
113
117 void postInt();
118
122 void clearInt();
123
132
141
150
151 protected:
153
156 };
157
167 PciBusAddr bus_addr, PciIntPin pin);
168
171 protected:
183 virtual void postInt(const PciBusAddr &bus_addr, PciIntPin pin) = 0;
184
191 virtual void clearInt(const PciBusAddr &bus_addr, PciIntPin pin) = 0;
192
201 virtual Addr pioAddr(const PciBusAddr &bus_addr, Addr pci_addr) const = 0;
202
211 virtual Addr memAddr(const PciBusAddr &bus_addr, Addr pci_addr) const = 0;
212
213
222 virtual Addr dmaAddr(const PciBusAddr &bus_addr, Addr pci_addr) const = 0;
223
226 protected:
234
241 const PciDevice *getDevice(const PciBusAddr &addr) const;
242
243 private:
245 std::map<PciBusAddr, PciDevice *> devices;
246};
247
277{
278 public:
279 GenericPciHost(const GenericPciHostParams &p);
280 virtual ~GenericPciHost();
281
282 public: // PioDevice
283 Tick read(PacketPtr pkt) override;
284 Tick write(PacketPtr pkt) override;
285
286 AddrRangeList getAddrRanges() const override;
287
288 protected: // PciHost
289 Addr pioAddr(const PciBusAddr &bus_addr, Addr pci_addr) const override {
290 return pciPioBase + pci_addr;
291 }
292
293 Addr memAddr(const PciBusAddr &bus_addr, Addr pci_addr) const override {
294 return pciMemBase + pci_addr;
295 }
296
297 Addr dmaAddr(const PciBusAddr &bus_addr, Addr pci_addr) const override {
298 return pciDmaBase + pci_addr;
299 }
300
301 protected: // Configuration address space handling
311
312 protected: // Interrupt handling
313 void postInt(const PciBusAddr &addr, PciIntPin pin) override;
314 void clearInt(const PciBusAddr &addr, PciIntPin pin) override;
315
316 virtual uint32_t mapPciInterrupt(const PciBusAddr &bus_addr,
317 PciIntPin pin) const;
318
319 protected:
321
324 const uint8_t confDeviceBits;
325
329};
330
331} // namespace gem5
332
333#endif // __DEV_PCI_HOST_HH__
Configurable generic PCI host interface.
Definition host.hh:277
const uint8_t confDeviceBits
Definition host.hh:324
virtual uint32_t mapPciInterrupt(const PciBusAddr &bus_addr, PciIntPin pin) const
Definition host.cc:215
const Addr confBase
Definition host.hh:322
AddrRangeList getAddrRanges() const override
Every PIO device is obliged to provide an implementation that returns the address ranges the device r...
Definition host.cc:182
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition host.cc:161
GenericPciHost(const GenericPciHostParams &p)
Definition host.cc:121
const Addr pciMemBase
Definition host.hh:327
virtual std::pair< PciBusAddr, Addr > decodeAddress(Addr address)
Decode a configuration space address.
Definition host.cc:188
const Addr confSize
Definition host.hh:323
virtual ~GenericPciHost()
Definition host.cc:131
Addr memAddr(const PciBusAddr &bus_addr, Addr pci_addr) const override
Calculate the physical address of a non-prefetchable memory location in the PCI address space.
Definition host.hh:293
Addr pioAddr(const PciBusAddr &bus_addr, Addr pci_addr) const override
Calculate the physical address of an IO location on the PCI bus.
Definition host.hh:289
void postInt(const PciBusAddr &addr, PciIntPin pin) override
Post an interrupt to the CPU.
Definition host.cc:202
const Addr pciDmaBase
Definition host.hh:328
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition host.cc:137
Platform & platform
Definition host.hh:320
Addr dmaAddr(const PciBusAddr &bus_addr, Addr pci_addr) const override
Calculate the physical address of a prefetchable memory location in the PCI address space.
Definition host.hh:297
void clearInt(const PciBusAddr &addr, PciIntPin pin) override
Post an interrupt to the CPU.
Definition host.cc:208
const Addr pciPioBase
Definition host.hh:326
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
PCI device, base implementation is only config space.
Definition device.hh:270
Callback interface from PCI devices to the host.
Definition host.hh:95
void postInt()
Post a PCI interrupt to the CPU.
Definition host.cc:105
const PciIntPin interruptPin
Definition host.hh:155
void operator=(const DeviceInterface &)=delete
const std::string name() const
Definition host.cc:98
Addr pioAddr(Addr addr) const
Calculate the physical address of an IO location on the PCI bus.
Definition host.hh:131
Addr dmaAddr(Addr addr) const
Calculate the physical address of a prefetchable memory location in the PCI address space.
Definition host.hh:149
Addr memAddr(Addr addr) const
Calculate the physical address of a non-prefetchable memory location in the PCI address space.
Definition host.hh:140
const PciBusAddr busAddr
Definition host.hh:154
void clearInt()
Clear a posted PCI interrupt.
Definition host.cc:113
The PCI host describes the interface between PCI devices and a simulated system.
Definition host.hh:76
virtual Addr dmaAddr(const PciBusAddr &bus_addr, Addr pci_addr) const =0
Calculate the physical address of a prefetchable memory location in the PCI address space.
std::map< PciBusAddr, PciDevice * > devices
Currently registered PCI devices.
Definition host.hh:245
virtual void postInt(const PciBusAddr &bus_addr, PciIntPin pin)=0
Post an interrupt to the CPU.
PciHost(const PciHostParams &p)
Definition host.cc:51
virtual void clearInt(const PciBusAddr &bus_addr, PciIntPin pin)=0
Post an interrupt to the CPU.
virtual Addr pioAddr(const PciBusAddr &bus_addr, Addr pci_addr) const =0
Calculate the physical address of an IO location on the PCI bus.
virtual ~PciHost()
Definition host.cc:56
virtual Addr memAddr(const PciBusAddr &bus_addr, Addr pci_addr) const =0
Calculate the physical address of a non-prefetchable memory location in the PCI address space.
PciDevice * getDevice(const PciBusAddr &addr)
Retrieve a PCI device from its bus address.
Definition host.cc:76
virtual DeviceInterface registerDevice(PciDevice *device, PciBusAddr bus_addr, PciIntPin pin)
Register a PCI device with the host.
Definition host.cc:61
This device is the base class which all devices senstive to an address range inherit from.
Definition io_device.hh:103
STL pair class.
Definition stl.hh:58
Bitfield< 0 > p
Bitfield< 3 > addr
Definition types.hh:84
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
PciIntPin
Definition types.hh:67
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
uint64_t Tick
Tick count type.
Definition types.hh:58

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